11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4bb898558SAl Viro #include <linux/pm.h> 5bb898558SAl Viro #include <linux/delay.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/fixmap.h> 9bb898558SAl Viro #include <asm/apicdef.h> 10bb898558SAl Viro #include <asm/processor.h> 11bb898558SAl Viro #include <asm/system.h> 12bb898558SAl Viro #include <asm/cpufeature.h> 13bb898558SAl Viro #include <asm/msr.h> 14bb898558SAl Viro 15bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 16bb898558SAl Viro 17bb898558SAl Viro /* 18bb898558SAl Viro * Debugging macros 19bb898558SAl Viro */ 20bb898558SAl Viro #define APIC_QUIET 0 21bb898558SAl Viro #define APIC_VERBOSE 1 22bb898558SAl Viro #define APIC_DEBUG 2 23bb898558SAl Viro 24bb898558SAl Viro /* 25bb898558SAl Viro * Define the default level of output to be very little 26bb898558SAl Viro * This can be turned up by using apic=verbose for more 27bb898558SAl Viro * information and apic=debug for _lots_ of information. 28bb898558SAl Viro * apic_verbosity is defined in apic.c 29bb898558SAl Viro */ 30bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 31bb898558SAl Viro if ((v) <= apic_verbosity) \ 32bb898558SAl Viro printk(s, ##a); \ 33bb898558SAl Viro } while (0) 34bb898558SAl Viro 35bb898558SAl Viro 36bb898558SAl Viro extern void generic_apic_probe(void); 37bb898558SAl Viro 38bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 39bb898558SAl Viro 40bb898558SAl Viro extern unsigned int apic_verbosity; 41bb898558SAl Viro extern int local_apic_timer_c2_ok; 42bb898558SAl Viro 43bb898558SAl Viro extern int disable_apic; 440939e4fdSIngo Molnar 450939e4fdSIngo Molnar #ifdef CONFIG_SMP 460939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 470939e4fdSIngo Molnar #else /* CONFIG_SMP */ 480939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 490939e4fdSIngo Molnar { 500939e4fdSIngo Molnar } 510939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 520939e4fdSIngo Molnar 530939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 540939e4fdSIngo Molnar { 550939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 560939e4fdSIngo Molnar __inquire_remote_apic(apicid); 570939e4fdSIngo Molnar } 580939e4fdSIngo Molnar 59bb898558SAl Viro /* 60bb898558SAl Viro * Basic functions accessing APICs. 61bb898558SAl Viro */ 62bb898558SAl Viro #ifdef CONFIG_PARAVIRT 63bb898558SAl Viro #include <asm/paravirt.h> 64bb898558SAl Viro #else 65bb898558SAl Viro #define setup_boot_clock setup_boot_APIC_clock 66bb898558SAl Viro #define setup_secondary_clock setup_secondary_APIC_clock 67bb898558SAl Viro #endif 68bb898558SAl Viro 69bb898558SAl Viro extern int is_vsmp_box(void); 70bb898558SAl Viro extern void xapic_wait_icr_idle(void); 71bb898558SAl Viro extern u32 safe_xapic_wait_icr_idle(void); 72bb898558SAl Viro extern void xapic_icr_write(u32, u32); 73bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 74bb898558SAl Viro 75bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 76bb898558SAl Viro { 77bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 78bb898558SAl Viro 79bb898558SAl Viro alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 80bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 81bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 82bb898558SAl Viro } 83bb898558SAl Viro 84bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 85bb898558SAl Viro { 86bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 87bb898558SAl Viro } 88bb898558SAl Viro 89bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 90bb898558SAl Viro { 91bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 92bb898558SAl Viro reg == APIC_LVR) 93bb898558SAl Viro return; 94bb898558SAl Viro 95bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 96bb898558SAl Viro } 97bb898558SAl Viro 98bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 99bb898558SAl Viro { 100bb898558SAl Viro u32 low, high; 101bb898558SAl Viro 102bb898558SAl Viro if (reg == APIC_DFR) 103bb898558SAl Viro return -1; 104bb898558SAl Viro 105bb898558SAl Viro rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 106bb898558SAl Viro return low; 107bb898558SAl Viro } 108bb898558SAl Viro 109bb898558SAl Viro #ifndef CONFIG_X86_32 110b6b301aaSJaswinder Singh extern int x2apic; 111bb898558SAl Viro extern void check_x2apic(void); 112bb898558SAl Viro extern void enable_x2apic(void); 113bb898558SAl Viro extern void enable_IR_x2apic(void); 114bb898558SAl Viro extern void x2apic_icr_write(u32 low, u32 id); 115bb898558SAl Viro static inline int x2apic_enabled(void) 116bb898558SAl Viro { 117bb898558SAl Viro int msr, msr2; 118bb898558SAl Viro 119bb898558SAl Viro if (!cpu_has_x2apic) 120bb898558SAl Viro return 0; 121bb898558SAl Viro 122bb898558SAl Viro rdmsr(MSR_IA32_APICBASE, msr, msr2); 123bb898558SAl Viro if (msr & X2APIC_ENABLE) 124bb898558SAl Viro return 1; 125bb898558SAl Viro return 0; 126bb898558SAl Viro } 127bb898558SAl Viro #else 128bb898558SAl Viro #define x2apic_enabled() 0 129bb898558SAl Viro #endif 130bb898558SAl Viro 131bb898558SAl Viro struct apic_ops { 132bb898558SAl Viro u32 (*read)(u32 reg); 133bb898558SAl Viro void (*write)(u32 reg, u32 v); 134bb898558SAl Viro u64 (*icr_read)(void); 135bb898558SAl Viro void (*icr_write)(u32 low, u32 high); 136bb898558SAl Viro void (*wait_icr_idle)(void); 137bb898558SAl Viro u32 (*safe_wait_icr_idle)(void); 138bb898558SAl Viro }; 139bb898558SAl Viro 140bb898558SAl Viro extern struct apic_ops *apic_ops; 141bb898558SAl Viro 142bb898558SAl Viro #define apic_read (apic_ops->read) 143bb898558SAl Viro #define apic_write (apic_ops->write) 144bb898558SAl Viro #define apic_icr_read (apic_ops->icr_read) 145bb898558SAl Viro #define apic_icr_write (apic_ops->icr_write) 146bb898558SAl Viro #define apic_wait_icr_idle (apic_ops->wait_icr_idle) 147bb898558SAl Viro #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle) 148bb898558SAl Viro 149bb898558SAl Viro extern int get_physical_broadcast(void); 150bb898558SAl Viro 151bb898558SAl Viro #ifdef CONFIG_X86_64 152bb898558SAl Viro static inline void ack_x2APIC_irq(void) 153bb898558SAl Viro { 154bb898558SAl Viro /* Docs say use 0 for future compatibility */ 155bb898558SAl Viro native_apic_msr_write(APIC_EOI, 0); 156bb898558SAl Viro } 157bb898558SAl Viro #endif 158bb898558SAl Viro 159bb898558SAl Viro 160bb898558SAl Viro static inline void ack_APIC_irq(void) 161bb898558SAl Viro { 162bb898558SAl Viro /* 163bb898558SAl Viro * ack_APIC_irq() actually gets compiled as a single instruction 164bb898558SAl Viro * ... yummie. 165bb898558SAl Viro */ 166bb898558SAl Viro 167bb898558SAl Viro /* Docs say use 0 for future compatibility */ 168bb898558SAl Viro apic_write(APIC_EOI, 0); 169bb898558SAl Viro } 170bb898558SAl Viro 171bb898558SAl Viro extern int lapic_get_maxlvt(void); 172bb898558SAl Viro extern void clear_local_APIC(void); 173bb898558SAl Viro extern void connect_bsp_APIC(void); 174bb898558SAl Viro extern void disconnect_bsp_APIC(int virt_wire_setup); 175bb898558SAl Viro extern void disable_local_APIC(void); 176bb898558SAl Viro extern void lapic_shutdown(void); 177bb898558SAl Viro extern int verify_local_APIC(void); 178bb898558SAl Viro extern void cache_APIC_registers(void); 179bb898558SAl Viro extern void sync_Arb_IDs(void); 180bb898558SAl Viro extern void init_bsp_APIC(void); 181bb898558SAl Viro extern void setup_local_APIC(void); 182bb898558SAl Viro extern void end_local_APIC_setup(void); 183bb898558SAl Viro extern void init_apic_mappings(void); 184bb898558SAl Viro extern void setup_boot_APIC_clock(void); 185bb898558SAl Viro extern void setup_secondary_APIC_clock(void); 186bb898558SAl Viro extern int APIC_init_uniprocessor(void); 187bb898558SAl Viro extern void enable_NMI_through_LVT0(void); 188bb898558SAl Viro 189bb898558SAl Viro /* 190bb898558SAl Viro * On 32bit this is mach-xxx local 191bb898558SAl Viro */ 192bb898558SAl Viro #ifdef CONFIG_X86_64 193bb898558SAl Viro extern void early_init_lapic_mapping(void); 194bb898558SAl Viro extern int apic_is_clustered_box(void); 195bb898558SAl Viro #else 196bb898558SAl Viro static inline int apic_is_clustered_box(void) 197bb898558SAl Viro { 198bb898558SAl Viro return 0; 199bb898558SAl Viro } 200bb898558SAl Viro #endif 201bb898558SAl Viro 202bb898558SAl Viro extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 203bb898558SAl Viro extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 204bb898558SAl Viro 205bb898558SAl Viro 206bb898558SAl Viro #else /* !CONFIG_X86_LOCAL_APIC */ 207bb898558SAl Viro static inline void lapic_shutdown(void) { } 208bb898558SAl Viro #define local_apic_timer_c2_ok 1 209bb898558SAl Viro static inline void init_apic_mappings(void) { } 210d3ec5caeSIvan Vecera static inline void disable_local_APIC(void) { } 211bb898558SAl Viro 212bb898558SAl Viro #endif /* !CONFIG_X86_LOCAL_APIC */ 213bb898558SAl Viro 2141965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 215