11965aae3SH. Peter Anvin #ifndef _ASM_X86_APIC_H 21965aae3SH. Peter Anvin #define _ASM_X86_APIC_H 3bb898558SAl Viro 4bb898558SAl Viro #include <linux/pm.h> 5bb898558SAl Viro #include <linux/delay.h> 6bb898558SAl Viro 7bb898558SAl Viro #include <asm/alternative.h> 8bb898558SAl Viro #include <asm/fixmap.h> 9bb898558SAl Viro #include <asm/apicdef.h> 10bb898558SAl Viro #include <asm/processor.h> 11bb898558SAl Viro #include <asm/system.h> 12bb898558SAl Viro #include <asm/cpufeature.h> 13bb898558SAl Viro #include <asm/msr.h> 14bb898558SAl Viro 15bb898558SAl Viro #define ARCH_APICTIMER_STOPS_ON_C3 1 16bb898558SAl Viro 17bb898558SAl Viro /* 18bb898558SAl Viro * Debugging macros 19bb898558SAl Viro */ 20bb898558SAl Viro #define APIC_QUIET 0 21bb898558SAl Viro #define APIC_VERBOSE 1 22bb898558SAl Viro #define APIC_DEBUG 2 23bb898558SAl Viro 24bb898558SAl Viro /* 25bb898558SAl Viro * Define the default level of output to be very little 26bb898558SAl Viro * This can be turned up by using apic=verbose for more 27bb898558SAl Viro * information and apic=debug for _lots_ of information. 28bb898558SAl Viro * apic_verbosity is defined in apic.c 29bb898558SAl Viro */ 30bb898558SAl Viro #define apic_printk(v, s, a...) do { \ 31bb898558SAl Viro if ((v) <= apic_verbosity) \ 32bb898558SAl Viro printk(s, ##a); \ 33bb898558SAl Viro } while (0) 34bb898558SAl Viro 35bb898558SAl Viro 36160d8dacSIngo Molnar #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 37bb898558SAl Viro extern void generic_apic_probe(void); 38160d8dacSIngo Molnar #else 39160d8dacSIngo Molnar static inline void generic_apic_probe(void) 40160d8dacSIngo Molnar { 41160d8dacSIngo Molnar } 42160d8dacSIngo Molnar #endif 43bb898558SAl Viro 44bb898558SAl Viro #ifdef CONFIG_X86_LOCAL_APIC 45bb898558SAl Viro 46bb898558SAl Viro extern unsigned int apic_verbosity; 47bb898558SAl Viro extern int local_apic_timer_c2_ok; 48bb898558SAl Viro 49bb898558SAl Viro extern int disable_apic; 500939e4fdSIngo Molnar 510939e4fdSIngo Molnar #ifdef CONFIG_SMP 520939e4fdSIngo Molnar extern void __inquire_remote_apic(int apicid); 530939e4fdSIngo Molnar #else /* CONFIG_SMP */ 540939e4fdSIngo Molnar static inline void __inquire_remote_apic(int apicid) 550939e4fdSIngo Molnar { 560939e4fdSIngo Molnar } 570939e4fdSIngo Molnar #endif /* CONFIG_SMP */ 580939e4fdSIngo Molnar 590939e4fdSIngo Molnar static inline void default_inquire_remote_apic(int apicid) 600939e4fdSIngo Molnar { 610939e4fdSIngo Molnar if (apic_verbosity >= APIC_DEBUG) 620939e4fdSIngo Molnar __inquire_remote_apic(apicid); 630939e4fdSIngo Molnar } 640939e4fdSIngo Molnar 65bb898558SAl Viro /* 66bb898558SAl Viro * Basic functions accessing APICs. 67bb898558SAl Viro */ 68bb898558SAl Viro #ifdef CONFIG_PARAVIRT 69bb898558SAl Viro #include <asm/paravirt.h> 70bb898558SAl Viro #else 71bb898558SAl Viro #define setup_boot_clock setup_boot_APIC_clock 72bb898558SAl Viro #define setup_secondary_clock setup_secondary_APIC_clock 73bb898558SAl Viro #endif 74bb898558SAl Viro 75bb898558SAl Viro extern int is_vsmp_box(void); 76bb898558SAl Viro extern void xapic_wait_icr_idle(void); 77bb898558SAl Viro extern u32 safe_xapic_wait_icr_idle(void); 78bb898558SAl Viro extern void xapic_icr_write(u32, u32); 79bb898558SAl Viro extern int setup_profiling_timer(unsigned int); 80bb898558SAl Viro 81bb898558SAl Viro static inline void native_apic_mem_write(u32 reg, u32 v) 82bb898558SAl Viro { 83bb898558SAl Viro volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); 84bb898558SAl Viro 85bb898558SAl Viro alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, 86bb898558SAl Viro ASM_OUTPUT2("=r" (v), "=m" (*addr)), 87bb898558SAl Viro ASM_OUTPUT2("0" (v), "m" (*addr))); 88bb898558SAl Viro } 89bb898558SAl Viro 90bb898558SAl Viro static inline u32 native_apic_mem_read(u32 reg) 91bb898558SAl Viro { 92bb898558SAl Viro return *((volatile u32 *)(APIC_BASE + reg)); 93bb898558SAl Viro } 94bb898558SAl Viro 95bb898558SAl Viro static inline void native_apic_msr_write(u32 reg, u32 v) 96bb898558SAl Viro { 97bb898558SAl Viro if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 98bb898558SAl Viro reg == APIC_LVR) 99bb898558SAl Viro return; 100bb898558SAl Viro 101bb898558SAl Viro wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); 102bb898558SAl Viro } 103bb898558SAl Viro 104bb898558SAl Viro static inline u32 native_apic_msr_read(u32 reg) 105bb898558SAl Viro { 106bb898558SAl Viro u32 low, high; 107bb898558SAl Viro 108bb898558SAl Viro if (reg == APIC_DFR) 109bb898558SAl Viro return -1; 110bb898558SAl Viro 111bb898558SAl Viro rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 112bb898558SAl Viro return low; 113bb898558SAl Viro } 114bb898558SAl Viro 11506cd9a7dSYinghai Lu #ifdef CONFIG_X86_X2APIC 116b6b301aaSJaswinder Singh extern int x2apic; 117bb898558SAl Viro extern void check_x2apic(void); 118bb898558SAl Viro extern void enable_x2apic(void); 119bb898558SAl Viro extern void enable_IR_x2apic(void); 120bb898558SAl Viro extern void x2apic_icr_write(u32 low, u32 id); 121bb898558SAl Viro static inline int x2apic_enabled(void) 122bb898558SAl Viro { 123bb898558SAl Viro int msr, msr2; 124bb898558SAl Viro 125bb898558SAl Viro if (!cpu_has_x2apic) 126bb898558SAl Viro return 0; 127bb898558SAl Viro 128bb898558SAl Viro rdmsr(MSR_IA32_APICBASE, msr, msr2); 129bb898558SAl Viro if (msr & X2APIC_ENABLE) 130bb898558SAl Viro return 1; 131bb898558SAl Viro return 0; 132bb898558SAl Viro } 133bb898558SAl Viro #else 13406cd9a7dSYinghai Lu static inline void check_x2apic(void) 13506cd9a7dSYinghai Lu { 13606cd9a7dSYinghai Lu } 13706cd9a7dSYinghai Lu static inline void enable_x2apic(void) 13806cd9a7dSYinghai Lu { 13906cd9a7dSYinghai Lu } 14006cd9a7dSYinghai Lu static inline void enable_IR_x2apic(void) 14106cd9a7dSYinghai Lu { 14206cd9a7dSYinghai Lu } 14306cd9a7dSYinghai Lu static inline int x2apic_enabled(void) 14406cd9a7dSYinghai Lu { 14506cd9a7dSYinghai Lu return 0; 14606cd9a7dSYinghai Lu } 147bb898558SAl Viro #endif 148bb898558SAl Viro 149bb898558SAl Viro struct apic_ops { 150bb898558SAl Viro u32 (*read)(u32 reg); 151bb898558SAl Viro void (*write)(u32 reg, u32 v); 152bb898558SAl Viro u64 (*icr_read)(void); 153bb898558SAl Viro void (*icr_write)(u32 low, u32 high); 154bb898558SAl Viro void (*wait_icr_idle)(void); 155bb898558SAl Viro u32 (*safe_wait_icr_idle)(void); 156bb898558SAl Viro }; 157bb898558SAl Viro 158bb898558SAl Viro extern struct apic_ops *apic_ops; 159bb898558SAl Viro 1603c552ac8SJeremy Fitzhardinge static inline u32 apic_read(u32 reg) 1613c552ac8SJeremy Fitzhardinge { 1623c552ac8SJeremy Fitzhardinge return apic_ops->read(reg); 1633c552ac8SJeremy Fitzhardinge } 1643c552ac8SJeremy Fitzhardinge 1653c552ac8SJeremy Fitzhardinge static inline void apic_write(u32 reg, u32 val) 1663c552ac8SJeremy Fitzhardinge { 1673c552ac8SJeremy Fitzhardinge apic_ops->write(reg, val); 1683c552ac8SJeremy Fitzhardinge } 1693c552ac8SJeremy Fitzhardinge 1703c552ac8SJeremy Fitzhardinge static inline u64 apic_icr_read(void) 1713c552ac8SJeremy Fitzhardinge { 1723c552ac8SJeremy Fitzhardinge return apic_ops->icr_read(); 1733c552ac8SJeremy Fitzhardinge } 1743c552ac8SJeremy Fitzhardinge 1753c552ac8SJeremy Fitzhardinge static inline void apic_icr_write(u32 low, u32 high) 1763c552ac8SJeremy Fitzhardinge { 1773c552ac8SJeremy Fitzhardinge apic_ops->icr_write(low, high); 1783c552ac8SJeremy Fitzhardinge } 1793c552ac8SJeremy Fitzhardinge 1803c552ac8SJeremy Fitzhardinge static inline void apic_wait_icr_idle(void) 1813c552ac8SJeremy Fitzhardinge { 1823c552ac8SJeremy Fitzhardinge apic_ops->wait_icr_idle(); 1833c552ac8SJeremy Fitzhardinge } 1843c552ac8SJeremy Fitzhardinge 1853c552ac8SJeremy Fitzhardinge static inline u32 safe_apic_wait_icr_idle(void) 1863c552ac8SJeremy Fitzhardinge { 1873c552ac8SJeremy Fitzhardinge return apic_ops->safe_wait_icr_idle(); 1883c552ac8SJeremy Fitzhardinge } 189bb898558SAl Viro 190bb898558SAl Viro extern int get_physical_broadcast(void); 191bb898558SAl Viro 19206cd9a7dSYinghai Lu #ifdef CONFIG_X86_X2APIC 193bb898558SAl Viro static inline void ack_x2APIC_irq(void) 194bb898558SAl Viro { 195bb898558SAl Viro /* Docs say use 0 for future compatibility */ 196bb898558SAl Viro native_apic_msr_write(APIC_EOI, 0); 197bb898558SAl Viro } 198bb898558SAl Viro #endif 199bb898558SAl Viro 200bb898558SAl Viro 201bb898558SAl Viro static inline void ack_APIC_irq(void) 202bb898558SAl Viro { 203bb898558SAl Viro /* 204bb898558SAl Viro * ack_APIC_irq() actually gets compiled as a single instruction 205bb898558SAl Viro * ... yummie. 206bb898558SAl Viro */ 207bb898558SAl Viro 208bb898558SAl Viro /* Docs say use 0 for future compatibility */ 209bb898558SAl Viro apic_write(APIC_EOI, 0); 210bb898558SAl Viro } 211bb898558SAl Viro 212bb898558SAl Viro extern int lapic_get_maxlvt(void); 213bb898558SAl Viro extern void clear_local_APIC(void); 214bb898558SAl Viro extern void connect_bsp_APIC(void); 215bb898558SAl Viro extern void disconnect_bsp_APIC(int virt_wire_setup); 216bb898558SAl Viro extern void disable_local_APIC(void); 217bb898558SAl Viro extern void lapic_shutdown(void); 218bb898558SAl Viro extern int verify_local_APIC(void); 219bb898558SAl Viro extern void cache_APIC_registers(void); 220bb898558SAl Viro extern void sync_Arb_IDs(void); 221bb898558SAl Viro extern void init_bsp_APIC(void); 222bb898558SAl Viro extern void setup_local_APIC(void); 223bb898558SAl Viro extern void end_local_APIC_setup(void); 224bb898558SAl Viro extern void init_apic_mappings(void); 225bb898558SAl Viro extern void setup_boot_APIC_clock(void); 226bb898558SAl Viro extern void setup_secondary_APIC_clock(void); 227bb898558SAl Viro extern int APIC_init_uniprocessor(void); 228bb898558SAl Viro extern void enable_NMI_through_LVT0(void); 229bb898558SAl Viro 230bb898558SAl Viro /* 231bb898558SAl Viro * On 32bit this is mach-xxx local 232bb898558SAl Viro */ 233bb898558SAl Viro #ifdef CONFIG_X86_64 234bb898558SAl Viro extern void early_init_lapic_mapping(void); 235bb898558SAl Viro extern int apic_is_clustered_box(void); 236bb898558SAl Viro #else 237bb898558SAl Viro static inline int apic_is_clustered_box(void) 238bb898558SAl Viro { 239bb898558SAl Viro return 0; 240bb898558SAl Viro } 241bb898558SAl Viro #endif 242bb898558SAl Viro 243bb898558SAl Viro extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 244bb898558SAl Viro extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); 245bb898558SAl Viro 246bb898558SAl Viro 247bb898558SAl Viro #else /* !CONFIG_X86_LOCAL_APIC */ 248bb898558SAl Viro static inline void lapic_shutdown(void) { } 249bb898558SAl Viro #define local_apic_timer_c2_ok 1 250bb898558SAl Viro static inline void init_apic_mappings(void) { } 251d3ec5caeSIvan Vecera static inline void disable_local_APIC(void) { } 252bb898558SAl Viro 253bb898558SAl Viro #endif /* !CONFIG_X86_LOCAL_APIC */ 254bb898558SAl Viro 2551f75ed0cSIngo Molnar #ifdef CONFIG_X86_64 2561f75ed0cSIngo Molnar #define SET_APIC_ID(x) (apic->set_apic_id(x)) 2571f75ed0cSIngo Molnar #else 2581f75ed0cSIngo Molnar 2596bda2c8bSIngo Molnar #ifdef CONFIG_X86_LOCAL_APIC 2601f75ed0cSIngo Molnar static inline unsigned default_get_apic_id(unsigned long x) 2611f75ed0cSIngo Molnar { 2621f75ed0cSIngo Molnar unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); 2631f75ed0cSIngo Molnar 2641f75ed0cSIngo Molnar if (APIC_XAPIC(ver)) 2651f75ed0cSIngo Molnar return (x >> 24) & 0xFF; 2661f75ed0cSIngo Molnar else 2671f75ed0cSIngo Molnar return (x >> 24) & 0x0F; 2681f75ed0cSIngo Molnar } 2696bda2c8bSIngo Molnar #endif 2701f75ed0cSIngo Molnar 2711f75ed0cSIngo Molnar #endif 2721f75ed0cSIngo Molnar 2731965aae3SH. Peter Anvin #endif /* _ASM_X86_APIC_H */ 274