1 #ifndef _ASM_X86_ALTERNATIVE_H 2 #define _ASM_X86_ALTERNATIVE_H 3 4 #include <linux/types.h> 5 #include <linux/stddef.h> 6 #include <linux/stringify.h> 7 #include <asm/asm.h> 8 9 /* 10 * Alternative inline assembly for SMP. 11 * 12 * The LOCK_PREFIX macro defined here replaces the LOCK and 13 * LOCK_PREFIX macros used everywhere in the source tree. 14 * 15 * SMP alternatives use the same data structures as the other 16 * alternatives and the X86_FEATURE_UP flag to indicate the case of a 17 * UP system running a SMP kernel. The existing apply_alternatives() 18 * works fine for patching a SMP kernel for UP. 19 * 20 * The SMP alternative tables can be kept after boot and contain both 21 * UP and SMP versions of the instructions to allow switching back to 22 * SMP at runtime, when hotplugging in a new CPU, which is especially 23 * useful in virtualized environments. 24 * 25 * The very common lock prefix is handled as special case in a 26 * separate table which is a pure address list without replacement ptr 27 * and size information. That keeps the table sizes small. 28 */ 29 30 #ifdef CONFIG_SMP 31 #define LOCK_PREFIX_HERE \ 32 ".section .smp_locks,\"a\"\n" \ 33 ".balign 4\n" \ 34 ".long 671f - .\n" /* offset */ \ 35 ".previous\n" \ 36 "671:" 37 38 #define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; " 39 40 #else /* ! CONFIG_SMP */ 41 #define LOCK_PREFIX_HERE "" 42 #define LOCK_PREFIX "" 43 #endif 44 45 struct alt_instr { 46 s32 instr_offset; /* original instruction */ 47 s32 repl_offset; /* offset to replacement instruction */ 48 u16 cpuid; /* cpuid bit set for replacement */ 49 u8 instrlen; /* length of original instruction */ 50 u8 replacementlen; /* length of new instruction, <= instrlen */ 51 }; 52 53 extern void alternative_instructions(void); 54 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end); 55 56 struct module; 57 58 #ifdef CONFIG_SMP 59 extern void alternatives_smp_module_add(struct module *mod, char *name, 60 void *locks, void *locks_end, 61 void *text, void *text_end); 62 extern void alternatives_smp_module_del(struct module *mod); 63 extern void alternatives_smp_switch(int smp); 64 extern int alternatives_text_reserved(void *start, void *end); 65 extern bool skip_smp_alternatives; 66 #else 67 static inline void alternatives_smp_module_add(struct module *mod, char *name, 68 void *locks, void *locks_end, 69 void *text, void *text_end) {} 70 static inline void alternatives_smp_module_del(struct module *mod) {} 71 static inline void alternatives_smp_switch(int smp) {} 72 static inline int alternatives_text_reserved(void *start, void *end) 73 { 74 return 0; 75 } 76 #endif /* CONFIG_SMP */ 77 78 /* alternative assembly primitive: */ 79 #define ALTERNATIVE(oldinstr, newinstr, feature) \ 80 \ 81 "661:\n\t" oldinstr "\n662:\n" \ 82 ".section .altinstructions,\"a\"\n" \ 83 " .long 661b - .\n" /* label */ \ 84 " .long 663f - .\n" /* new instruction */ \ 85 " .word " __stringify(feature) "\n" /* feature bit */ \ 86 " .byte 662b-661b\n" /* sourcelen */ \ 87 " .byte 664f-663f\n" /* replacementlen */ \ 88 ".previous\n" \ 89 ".section .discard,\"aw\",@progbits\n" \ 90 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \ 91 ".previous\n" \ 92 ".section .altinstr_replacement, \"ax\"\n" \ 93 "663:\n\t" newinstr "\n664:\n" /* replacement */ \ 94 ".previous" 95 96 /* 97 * This must be included *after* the definition of ALTERNATIVE due to 98 * <asm/arch_hweight.h> 99 */ 100 #include <asm/cpufeature.h> 101 102 /* 103 * Alternative instructions for different CPU types or capabilities. 104 * 105 * This allows to use optimized instructions even on generic binary 106 * kernels. 107 * 108 * length of oldinstr must be longer or equal the length of newinstr 109 * It can be padded with nops as needed. 110 * 111 * For non barrier like inlines please define new variants 112 * without volatile and memory clobber. 113 */ 114 #define alternative(oldinstr, newinstr, feature) \ 115 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory") 116 117 /* 118 * Alternative inline assembly with input. 119 * 120 * Pecularities: 121 * No memory clobber here. 122 * Argument numbers start with 1. 123 * Best is to use constraints that are fixed size (like (%1) ... "r") 124 * If you use variable sized constraints like "m" or "g" in the 125 * replacement make sure to pad to the worst case length. 126 * Leaving an unused argument 0 to keep API compatibility. 127 */ 128 #define alternative_input(oldinstr, newinstr, feature, input...) \ 129 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 130 : : "i" (0), ## input) 131 132 /* Like alternative_input, but with a single output argument */ 133 #define alternative_io(oldinstr, newinstr, feature, output, input...) \ 134 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 135 : output : "i" (0), ## input) 136 137 /* Like alternative_io, but for replacing a direct call with another one. */ 138 #define alternative_call(oldfunc, newfunc, feature, output, input...) \ 139 asm volatile (ALTERNATIVE("call %P[old]", "call %P[new]", feature) \ 140 : output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input) 141 142 /* 143 * use this macro(s) if you need more than one output parameter 144 * in alternative_io 145 */ 146 #define ASM_OUTPUT2(a...) a 147 148 struct paravirt_patch_site; 149 #ifdef CONFIG_PARAVIRT 150 void apply_paravirt(struct paravirt_patch_site *start, 151 struct paravirt_patch_site *end); 152 #else 153 static inline void apply_paravirt(struct paravirt_patch_site *start, 154 struct paravirt_patch_site *end) 155 {} 156 #define __parainstructions NULL 157 #define __parainstructions_end NULL 158 #endif 159 160 extern void *text_poke_early(void *addr, const void *opcode, size_t len); 161 162 /* 163 * Clear and restore the kernel write-protection flag on the local CPU. 164 * Allows the kernel to edit read-only pages. 165 * Side-effect: any interrupt handler running between save and restore will have 166 * the ability to write to read-only pages. 167 * 168 * Warning: 169 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and 170 * no thread can be preempted in the instructions being modified (no iret to an 171 * invalid instruction possible) or if the instructions are changed from a 172 * consistent state to another consistent state atomically. 173 * More care must be taken when modifying code in the SMP case because of 174 * Intel's errata. text_poke_smp() takes care that errata, but still 175 * doesn't support NMI/MCE handler code modifying. 176 * On the local CPU you need to be protected again NMI or MCE handlers seeing an 177 * inconsistent instruction while you patch. 178 */ 179 struct text_poke_param { 180 void *addr; 181 const void *opcode; 182 size_t len; 183 }; 184 185 extern void *text_poke(void *addr, const void *opcode, size_t len); 186 extern void *text_poke_smp(void *addr, const void *opcode, size_t len); 187 extern void text_poke_smp_batch(struct text_poke_param *params, int n); 188 189 #endif /* _ASM_X86_ALTERNATIVE_H */ 190