1 #ifndef _ASM_X86_ALTERNATIVE_H 2 #define _ASM_X86_ALTERNATIVE_H 3 4 #include <linux/types.h> 5 #include <linux/stddef.h> 6 #include <linux/stringify.h> 7 #include <asm/asm.h> 8 9 /* 10 * Alternative inline assembly for SMP. 11 * 12 * The LOCK_PREFIX macro defined here replaces the LOCK and 13 * LOCK_PREFIX macros used everywhere in the source tree. 14 * 15 * SMP alternatives use the same data structures as the other 16 * alternatives and the X86_FEATURE_UP flag to indicate the case of a 17 * UP system running a SMP kernel. The existing apply_alternatives() 18 * works fine for patching a SMP kernel for UP. 19 * 20 * The SMP alternative tables can be kept after boot and contain both 21 * UP and SMP versions of the instructions to allow switching back to 22 * SMP at runtime, when hotplugging in a new CPU, which is especially 23 * useful in virtualized environments. 24 * 25 * The very common lock prefix is handled as special case in a 26 * separate table which is a pure address list without replacement ptr 27 * and size information. That keeps the table sizes small. 28 */ 29 30 #ifdef CONFIG_SMP 31 #define LOCK_PREFIX \ 32 ".section .smp_locks,\"a\"\n" \ 33 _ASM_ALIGN "\n" \ 34 _ASM_PTR "661f\n" /* address */ \ 35 ".previous\n" \ 36 "661:\n\tlock; " 37 38 #else /* ! CONFIG_SMP */ 39 #define LOCK_PREFIX "" 40 #endif 41 42 /* This must be included *after* the definition of LOCK_PREFIX */ 43 #include <asm/cpufeature.h> 44 45 struct alt_instr { 46 u8 *instr; /* original instruction */ 47 u8 *replacement; 48 u8 cpuid; /* cpuid bit set for replacement */ 49 u8 instrlen; /* length of original instruction */ 50 u8 replacementlen; /* length of new instruction, <= instrlen */ 51 u8 pad1; 52 #ifdef CONFIG_X86_64 53 u32 pad2; 54 #endif 55 }; 56 57 extern void alternative_instructions(void); 58 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end); 59 60 struct module; 61 62 #ifdef CONFIG_SMP 63 extern void alternatives_smp_module_add(struct module *mod, char *name, 64 void *locks, void *locks_end, 65 void *text, void *text_end); 66 extern void alternatives_smp_module_del(struct module *mod); 67 extern void alternatives_smp_switch(int smp); 68 #else 69 static inline void alternatives_smp_module_add(struct module *mod, char *name, 70 void *locks, void *locks_end, 71 void *text, void *text_end) {} 72 static inline void alternatives_smp_module_del(struct module *mod) {} 73 static inline void alternatives_smp_switch(int smp) {} 74 #endif /* CONFIG_SMP */ 75 76 const unsigned char *const *find_nop_table(void); 77 78 /* alternative assembly primitive: */ 79 #define ALTERNATIVE(oldinstr, newinstr, feature) \ 80 \ 81 "661:\n\t" oldinstr "\n662:\n" \ 82 ".section .altinstructions,\"a\"\n" \ 83 _ASM_ALIGN "\n" \ 84 _ASM_PTR "661b\n" /* label */ \ 85 _ASM_PTR "663f\n" /* new instruction */ \ 86 " .byte " __stringify(feature) "\n" /* feature bit */ \ 87 " .byte 662b-661b\n" /* sourcelen */ \ 88 " .byte 664f-663f\n" /* replacementlen */ \ 89 ".previous\n" \ 90 ".section .altinstr_replacement, \"ax\"\n" \ 91 "663:\n\t" newinstr "\n664:\n" /* replacement */ \ 92 ".previous" 93 94 /* 95 * Alternative instructions for different CPU types or capabilities. 96 * 97 * This allows to use optimized instructions even on generic binary 98 * kernels. 99 * 100 * length of oldinstr must be longer or equal the length of newinstr 101 * It can be padded with nops as needed. 102 * 103 * For non barrier like inlines please define new variants 104 * without volatile and memory clobber. 105 */ 106 #define alternative(oldinstr, newinstr, feature) \ 107 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory") 108 109 /* 110 * Alternative inline assembly with input. 111 * 112 * Pecularities: 113 * No memory clobber here. 114 * Argument numbers start with 1. 115 * Best is to use constraints that are fixed size (like (%1) ... "r") 116 * If you use variable sized constraints like "m" or "g" in the 117 * replacement make sure to pad to the worst case length. 118 * Leaving an unused argument 0 to keep API compatibility. 119 */ 120 #define alternative_input(oldinstr, newinstr, feature, input...) \ 121 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 122 : : "i" (0), ## input) 123 124 /* Like alternative_input, but with a single output argument */ 125 #define alternative_io(oldinstr, newinstr, feature, output, input...) \ 126 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ 127 : output : "i" (0), ## input) 128 129 /* 130 * use this macro(s) if you need more than one output parameter 131 * in alternative_io 132 */ 133 #define ASM_OUTPUT2(a, b) a, b 134 135 struct paravirt_patch_site; 136 #ifdef CONFIG_PARAVIRT 137 void apply_paravirt(struct paravirt_patch_site *start, 138 struct paravirt_patch_site *end); 139 #else 140 static inline void apply_paravirt(struct paravirt_patch_site *start, 141 struct paravirt_patch_site *end) 142 {} 143 #define __parainstructions NULL 144 #define __parainstructions_end NULL 145 #endif 146 147 extern void add_nops(void *insns, unsigned int len); 148 149 /* 150 * Clear and restore the kernel write-protection flag on the local CPU. 151 * Allows the kernel to edit read-only pages. 152 * Side-effect: any interrupt handler running between save and restore will have 153 * the ability to write to read-only pages. 154 * 155 * Warning: 156 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and 157 * no thread can be preempted in the instructions being modified (no iret to an 158 * invalid instruction possible) or if the instructions are changed from a 159 * consistent state to another consistent state atomically. 160 * More care must be taken when modifying code in the SMP case because of 161 * Intel's errata. 162 * On the local CPU you need to be protected again NMI or MCE handlers seeing an 163 * inconsistent instruction while you patch. 164 * The _early version expects the memory to already be RW. 165 */ 166 167 extern void *text_poke(void *addr, const void *opcode, size_t len); 168 extern void *text_poke_early(void *addr, const void *opcode, size_t len); 169 170 #endif /* _ASM_X86_ALTERNATIVE_H */ 171