1 #ifndef _ASM_X86_ACPI_H 2 #define _ASM_X86_ACPI_H 3 4 /* 5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org> 7 * 8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 25 */ 26 #include <acpi/pdc_intel.h> 27 28 #include <asm/numa.h> 29 #include <asm/fixmap.h> 30 #include <asm/processor.h> 31 #include <asm/mmu.h> 32 #include <asm/mpspec.h> 33 #include <asm/realmode.h> 34 35 #ifdef CONFIG_ACPI_APEI 36 # include <asm/pgtable_types.h> 37 #endif 38 39 #ifdef CONFIG_ACPI 40 extern int acpi_lapic; 41 extern int acpi_ioapic; 42 extern int acpi_noirq; 43 extern int acpi_strict; 44 extern int acpi_disabled; 45 extern int acpi_pci_disabled; 46 extern int acpi_skip_timer_override; 47 extern int acpi_use_timer_override; 48 extern int acpi_fix_pin2_polarity; 49 extern int acpi_disable_cmcff; 50 51 extern u8 acpi_sci_flags; 52 extern int acpi_sci_override_gsi; 53 void acpi_pic_sci_set_trigger(unsigned int, u16); 54 55 struct device; 56 57 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi, 58 int trigger, int polarity); 59 extern void (*__acpi_unregister_gsi)(u32 gsi); 60 61 static inline void disable_acpi(void) 62 { 63 acpi_disabled = 1; 64 acpi_pci_disabled = 1; 65 acpi_noirq = 1; 66 } 67 68 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); 69 70 static inline void acpi_noirq_set(void) { acpi_noirq = 1; } 71 static inline void acpi_disable_pci(void) 72 { 73 acpi_pci_disabled = 1; 74 acpi_noirq_set(); 75 } 76 77 /* Low-level suspend routine. */ 78 extern int (*acpi_suspend_lowlevel)(void); 79 80 /* Physical address to resume after wakeup */ 81 #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start)) 82 83 /* 84 * Check if the CPU can handle C2 and deeper 85 */ 86 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate) 87 { 88 /* 89 * Early models (<=5) of AMD Opterons are not supposed to go into 90 * C2 state. 91 * 92 * Steppings 0x0A and later are good 93 */ 94 if (boot_cpu_data.x86 == 0x0F && 95 boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 96 boot_cpu_data.x86_model <= 0x05 && 97 boot_cpu_data.x86_mask < 0x0A) 98 return 1; 99 else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E)) 100 return 1; 101 else 102 return max_cstate; 103 } 104 105 static inline bool arch_has_acpi_pdc(void) 106 { 107 struct cpuinfo_x86 *c = &cpu_data(0); 108 return (c->x86_vendor == X86_VENDOR_INTEL || 109 c->x86_vendor == X86_VENDOR_CENTAUR); 110 } 111 112 static inline void arch_acpi_set_pdc_bits(u32 *buf) 113 { 114 struct cpuinfo_x86 *c = &cpu_data(0); 115 116 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP; 117 118 if (cpu_has(c, X86_FEATURE_EST)) 119 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP; 120 121 if (cpu_has(c, X86_FEATURE_ACPI)) 122 buf[2] |= ACPI_PDC_T_FFH; 123 124 /* 125 * If mwait/monitor is unsupported, C2/C3_FFH will be disabled 126 */ 127 if (!cpu_has(c, X86_FEATURE_MWAIT)) 128 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH); 129 } 130 131 static inline bool acpi_has_cpu_in_madt(void) 132 { 133 return !!acpi_lapic; 134 } 135 136 #else /* !CONFIG_ACPI */ 137 138 #define acpi_lapic 0 139 #define acpi_ioapic 0 140 #define acpi_disable_cmcff 0 141 static inline void acpi_noirq_set(void) { } 142 static inline void acpi_disable_pci(void) { } 143 static inline void disable_acpi(void) { } 144 145 #endif /* !CONFIG_ACPI */ 146 147 #define ARCH_HAS_POWER_INIT 1 148 149 #ifdef CONFIG_ACPI_NUMA 150 extern int x86_acpi_numa_init(void); 151 #endif /* CONFIG_ACPI_NUMA */ 152 153 #define acpi_unlazy_tlb(x) leave_mm(x) 154 155 #ifdef CONFIG_ACPI_APEI 156 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr) 157 { 158 /* 159 * We currently have no way to look up the EFI memory map 160 * attributes for a region in a consistent way, because the 161 * memmap is discarded after efi_free_boot_services(). So if 162 * you call efi_mem_attributes() during boot and at runtime, 163 * you could theoretically see different attributes. 164 * 165 * We are yet to see any x86 platforms that require anything 166 * other than PAGE_KERNEL (some ARM64 platforms require the 167 * equivalent of PAGE_KERNEL_NOCACHE). Additionally, if SME 168 * is active, the ACPI information will not be encrypted, 169 * so return PAGE_KERNEL_NOENC until we know differently. 170 */ 171 return PAGE_KERNEL_NOENC; 172 } 173 #endif 174 175 #define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT) 176 177 #endif /* _ASM_X86_ACPI_H */ 178