1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Intel(R) Processor Trace PMU driver for perf 4 * Copyright (c) 2013-2014, Intel Corporation. 5 * 6 * Intel PT is specified in the Intel Architecture Instruction Set Extensions 7 * Programming Reference: 8 * http://software.intel.com/en-us/intel-isa-extensions 9 */ 10 11 #ifndef __INTEL_PT_H__ 12 #define __INTEL_PT_H__ 13 14 /* 15 * Single-entry ToPA: when this close to region boundary, switch 16 * buffers to avoid losing data. 17 */ 18 #define TOPA_PMI_MARGIN 512 19 20 #define TOPA_SHIFT 12 21 22 static inline unsigned int sizes(unsigned int tsz) 23 { 24 return 1 << (tsz + TOPA_SHIFT); 25 }; 26 27 struct topa_entry { 28 u64 end : 1; 29 u64 rsvd0 : 1; 30 u64 intr : 1; 31 u64 rsvd1 : 1; 32 u64 stop : 1; 33 u64 rsvd2 : 1; 34 u64 size : 4; 35 u64 rsvd3 : 2; 36 u64 base : 36; 37 u64 rsvd4 : 16; 38 }; 39 40 /* TSC to Core Crystal Clock Ratio */ 41 #define CPUID_TSC_LEAF 0x15 42 43 struct pt_pmu { 44 struct pmu pmu; 45 u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES]; 46 bool vmx; 47 bool branch_en_always_on; 48 unsigned long max_nonturbo_ratio; 49 unsigned int tsc_art_num; 50 unsigned int tsc_art_den; 51 }; 52 53 /** 54 * struct pt_buffer - buffer configuration; one buffer per task_struct or 55 * cpu, depending on perf event configuration 56 * @cpu: cpu for per-cpu allocation 57 * @tables: list of ToPA tables in this buffer 58 * @first: shorthand for first topa table 59 * @last: shorthand for last topa table 60 * @cur: current topa table 61 * @nr_pages: buffer size in pages 62 * @cur_idx: current output region's index within @cur table 63 * @output_off: offset within the current output region 64 * @data_size: running total of the amount of data in this buffer 65 * @lost: if data was lost/truncated 66 * @head: logical write offset inside the buffer 67 * @snapshot: if this is for a snapshot/overwrite counter 68 * @stop_pos: STOP topa entry in the buffer 69 * @intr_pos: INT topa entry in the buffer 70 * @data_pages: array of pages from perf 71 * @topa_index: table of topa entries indexed by page offset 72 */ 73 struct pt_buffer { 74 int cpu; 75 struct list_head tables; 76 struct topa *first, *last, *cur; 77 unsigned int cur_idx; 78 size_t output_off; 79 unsigned long nr_pages; 80 local_t data_size; 81 local64_t head; 82 bool snapshot; 83 unsigned long stop_pos, intr_pos; 84 void **data_pages; 85 struct topa_entry *topa_index[0]; 86 }; 87 88 #define PT_FILTERS_NUM 4 89 90 /** 91 * struct pt_filter - IP range filter configuration 92 * @msr_a: range start, goes to RTIT_ADDRn_A 93 * @msr_b: range end, goes to RTIT_ADDRn_B 94 * @config: 4-bit field in RTIT_CTL 95 */ 96 struct pt_filter { 97 unsigned long msr_a; 98 unsigned long msr_b; 99 unsigned long config; 100 }; 101 102 /** 103 * struct pt_filters - IP range filtering context 104 * @filter: filters defined for this context 105 * @nr_filters: number of defined filters in the @filter array 106 */ 107 struct pt_filters { 108 struct pt_filter filter[PT_FILTERS_NUM]; 109 unsigned int nr_filters; 110 }; 111 112 /** 113 * struct pt - per-cpu pt context 114 * @handle: perf output handle 115 * @filters: last configured filters 116 * @handle_nmi: do handle PT PMI on this cpu, there's an active event 117 * @vmx_on: 1 if VMX is ON on this cpu 118 */ 119 struct pt { 120 struct perf_output_handle handle; 121 struct pt_filters filters; 122 int handle_nmi; 123 int vmx_on; 124 }; 125 126 #endif /* __INTEL_PT_H__ */ 127