xref: /openbmc/linux/arch/x86/entry/entry_64_compat.S (revision d1492bbd)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include "calling.h"
8#include <asm/asm-offsets.h>
9#include <asm/current.h>
10#include <asm/errno.h>
11#include <asm/ia32_unistd.h>
12#include <asm/thread_info.h>
13#include <asm/segment.h>
14#include <asm/irqflags.h>
15#include <asm/asm.h>
16#include <asm/smap.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20	.section .entry.text, "ax"
21
22/*
23 * 32-bit SYSENTER entry.
24 *
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
27 *
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO.  In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction.  This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
33 *
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
38 *
39 * Arguments:
40 * eax  system call number
41 * ebx  arg1
42 * ecx  arg2
43 * edx  arg3
44 * esi  arg4
45 * edi  arg5
46 * ebp  user stack
47 * 0(%ebp) arg6
48 */
49SYM_FUNC_START(entry_SYSENTER_compat)
50	/* Interrupts are off on entry. */
51	SWAPGS
52
53	/* We are about to clobber %rsp anyway, clobbering here is OK */
54	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
55
56	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
57
58	/*
59	 * User tracing code (ptrace or signal handlers) might assume that
60	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
61	 * syscall.  Just in case the high bits are nonzero, zero-extend
62	 * the syscall number.  (This could almost certainly be deleted
63	 * with no ill effects.)
64	 */
65	movl	%eax, %eax
66
67	/* Construct struct pt_regs on stack */
68	pushq	$__USER32_DS		/* pt_regs->ss */
69	pushq	%rbp			/* pt_regs->sp (stashed in bp) */
70
71	/*
72	 * Push flags.  This is nasty.  First, interrupts are currently
73	 * off, but we need pt_regs->flags to have IF set.  Second, even
74	 * if TF was set when SYSENTER started, it's clear by now.  We fix
75	 * that later using TIF_SINGLESTEP.
76	 */
77	pushfq				/* pt_regs->flags (except IF = 0) */
78	orl	$X86_EFLAGS_IF, (%rsp)	/* Fix saved flags */
79	pushq	$__USER32_CS		/* pt_regs->cs */
80	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
81	pushq	%rax			/* pt_regs->orig_ax */
82	pushq	%rdi			/* pt_regs->di */
83	pushq	%rsi			/* pt_regs->si */
84	pushq	%rdx			/* pt_regs->dx */
85	pushq	%rcx			/* pt_regs->cx */
86	pushq	$-ENOSYS		/* pt_regs->ax */
87	pushq   $0			/* pt_regs->r8  = 0 */
88	xorl	%r8d, %r8d		/* nospec   r8 */
89	pushq   $0			/* pt_regs->r9  = 0 */
90	xorl	%r9d, %r9d		/* nospec   r9 */
91	pushq   $0			/* pt_regs->r10 = 0 */
92	xorl	%r10d, %r10d		/* nospec   r10 */
93	pushq   $0			/* pt_regs->r11 = 0 */
94	xorl	%r11d, %r11d		/* nospec   r11 */
95	pushq   %rbx                    /* pt_regs->rbx */
96	xorl	%ebx, %ebx		/* nospec   rbx */
97	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
98	xorl	%ebp, %ebp		/* nospec   rbp */
99	pushq   $0			/* pt_regs->r12 = 0 */
100	xorl	%r12d, %r12d		/* nospec   r12 */
101	pushq   $0			/* pt_regs->r13 = 0 */
102	xorl	%r13d, %r13d		/* nospec   r13 */
103	pushq   $0			/* pt_regs->r14 = 0 */
104	xorl	%r14d, %r14d		/* nospec   r14 */
105	pushq   $0			/* pt_regs->r15 = 0 */
106	xorl	%r15d, %r15d		/* nospec   r15 */
107	cld
108
109	/*
110	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
111	 * ourselves.  To save a few cycles, we can check whether
112	 * either was set instead of doing an unconditional popfq.
113	 * This needs to happen before enabling interrupts so that
114	 * we don't get preempted with NT set.
115	 *
116	 * If TF is set, we will single-step all the way to here -- do_debug
117	 * will ignore all the traps.  (Yes, this is slow, but so is
118	 * single-stepping in general.  This allows us to avoid having
119	 * a more complicated code to handle the case where a user program
120	 * forces us to single-step through the SYSENTER entry code.)
121	 *
122	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
123	 * out-of-line as an optimization: NT is unlikely to be set in the
124	 * majority of the cases and instead of polluting the I$ unnecessarily,
125	 * we're keeping that code behind a branch which will predict as
126	 * not-taken and therefore its instructions won't be fetched.
127	 */
128	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
129	jnz	.Lsysenter_fix_flags
130.Lsysenter_flags_fixed:
131
132	/*
133	 * User mode is traced as though IRQs are on, and SYSENTER
134	 * turned them off.
135	 */
136	TRACE_IRQS_OFF
137
138	movq	%rsp, %rdi
139	call	do_fast_syscall_32
140	/* XEN PV guests always use IRET path */
141	ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
142		    "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
143	jmp	sysret32_from_system_call
144
145.Lsysenter_fix_flags:
146	pushq	$X86_EFLAGS_FIXED
147	popfq
148	jmp	.Lsysenter_flags_fixed
149SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
150SYM_FUNC_END(entry_SYSENTER_compat)
151
152/*
153 * 32-bit SYSCALL entry.
154 *
155 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
156 * on 64-bit kernels running on AMD CPUs.
157 *
158 * The SYSCALL instruction, in principle, should *only* occur in the
159 * vDSO.  In practice, it appears that this really is the case.
160 * As evidence:
161 *
162 *  - The calling convention for SYSCALL has changed several times without
163 *    anyone noticing.
164 *
165 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
166 *    user task that did SYSCALL without immediately reloading SS
167 *    would randomly crash.
168 *
169 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
170 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
171 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
172 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
173 *    opposed to compat mode) is sufficiently poorly designed as to be
174 *    essentially unusable.
175 *
176 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
177 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
178 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
179 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
180 * the stack and does not change RSP.
181 *
182 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
183 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
184 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
185 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
186 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
187 *
188 * Arguments:
189 * eax  system call number
190 * ecx  return address
191 * ebx  arg1
192 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
193 * edx  arg3
194 * esi  arg4
195 * edi  arg5
196 * esp  user stack
197 * 0(%esp) arg6
198 */
199SYM_CODE_START(entry_SYSCALL_compat)
200	/* Interrupts are off on entry. */
201	swapgs
202
203	/* Stash user ESP */
204	movl	%esp, %r8d
205
206	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
207	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
208
209	/* Switch to the kernel stack */
210	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
211
212	/* Construct struct pt_regs on stack */
213	pushq	$__USER32_DS		/* pt_regs->ss */
214	pushq	%r8			/* pt_regs->sp */
215	pushq	%r11			/* pt_regs->flags */
216	pushq	$__USER32_CS		/* pt_regs->cs */
217	pushq	%rcx			/* pt_regs->ip */
218SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
219	movl	%eax, %eax		/* discard orig_ax high bits */
220	pushq	%rax			/* pt_regs->orig_ax */
221	pushq	%rdi			/* pt_regs->di */
222	pushq	%rsi			/* pt_regs->si */
223	xorl	%esi, %esi		/* nospec   si */
224	pushq	%rdx			/* pt_regs->dx */
225	xorl	%edx, %edx		/* nospec   dx */
226	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
227	xorl	%ecx, %ecx		/* nospec   cx */
228	pushq	$-ENOSYS		/* pt_regs->ax */
229	pushq   $0			/* pt_regs->r8  = 0 */
230	xorl	%r8d, %r8d		/* nospec   r8 */
231	pushq   $0			/* pt_regs->r9  = 0 */
232	xorl	%r9d, %r9d		/* nospec   r9 */
233	pushq   $0			/* pt_regs->r10 = 0 */
234	xorl	%r10d, %r10d		/* nospec   r10 */
235	pushq   $0			/* pt_regs->r11 = 0 */
236	xorl	%r11d, %r11d		/* nospec   r11 */
237	pushq   %rbx                    /* pt_regs->rbx */
238	xorl	%ebx, %ebx		/* nospec   rbx */
239	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
240	xorl	%ebp, %ebp		/* nospec   rbp */
241	pushq   $0			/* pt_regs->r12 = 0 */
242	xorl	%r12d, %r12d		/* nospec   r12 */
243	pushq   $0			/* pt_regs->r13 = 0 */
244	xorl	%r13d, %r13d		/* nospec   r13 */
245	pushq   $0			/* pt_regs->r14 = 0 */
246	xorl	%r14d, %r14d		/* nospec   r14 */
247	pushq   $0			/* pt_regs->r15 = 0 */
248	xorl	%r15d, %r15d		/* nospec   r15 */
249
250	/*
251	 * User mode is traced as though IRQs are on, and SYSENTER
252	 * turned them off.
253	 */
254	TRACE_IRQS_OFF
255
256	movq	%rsp, %rdi
257	call	do_fast_syscall_32
258	/* XEN PV guests always use IRET path */
259	ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
260		    "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
261
262	/* Opportunistic SYSRET */
263sysret32_from_system_call:
264	/*
265	 * We are not going to return to userspace from the trampoline
266	 * stack. So let's erase the thread stack right now.
267	 */
268	STACKLEAK_ERASE
269	TRACE_IRQS_ON			/* User mode traces as IRQs on. */
270	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
271	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
272	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
273	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
274	addq	$RAX, %rsp		/* Skip r8-r15 */
275	popq	%rax			/* pt_regs->rax */
276	popq	%rdx			/* Skip pt_regs->cx */
277	popq	%rdx			/* pt_regs->dx */
278	popq	%rsi			/* pt_regs->si */
279	popq	%rdi			/* pt_regs->di */
280
281        /*
282         * USERGS_SYSRET32 does:
283         *  GSBASE = user's GS base
284         *  EIP = ECX
285         *  RFLAGS = R11
286         *  CS = __USER32_CS
287         *  SS = __USER_DS
288         *
289	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
290	 * trampoline that will fix up RCX, so this is okay.
291	 *
292	 * R12-R15 are callee-saved, so they contain whatever was in them
293	 * when the system call started, which is already known to user
294	 * code.  We zero R8-R10 to avoid info leaks.
295         */
296	movq	RSP-ORIG_RAX(%rsp), %rsp
297
298	/*
299	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
300	 * on the process stack which is not mapped to userspace and
301	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
302	 * switch until after after the last reference to the process
303	 * stack.
304	 *
305	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
306	 */
307	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
308
309	xorl	%r8d, %r8d
310	xorl	%r9d, %r9d
311	xorl	%r10d, %r10d
312	swapgs
313	sysretl
314SYM_CODE_END(entry_SYSCALL_compat)
315
316/*
317 * 32-bit legacy system call entry.
318 *
319 * 32-bit x86 Linux system calls traditionally used the INT $0x80
320 * instruction.  INT $0x80 lands here.
321 *
322 * This entry point can be used by 32-bit and 64-bit programs to perform
323 * 32-bit system calls.  Instances of INT $0x80 can be found inline in
324 * various programs and libraries.  It is also used by the vDSO's
325 * __kernel_vsyscall fallback for hardware that doesn't support a faster
326 * entry method.  Restarted 32-bit system calls also fall back to INT
327 * $0x80 regardless of what instruction was originally used to do the
328 * system call.
329 *
330 * This is considered a slow path.  It is not used by most libc
331 * implementations on modern hardware except during process startup.
332 *
333 * Arguments:
334 * eax  system call number
335 * ebx  arg1
336 * ecx  arg2
337 * edx  arg3
338 * esi  arg4
339 * edi  arg5
340 * ebp  arg6
341 */
342SYM_CODE_START(entry_INT80_compat)
343	/*
344	 * Interrupts are off on entry.
345	 */
346	ASM_CLAC			/* Do this early to minimize exposure */
347	SWAPGS
348
349	/*
350	 * User tracing code (ptrace or signal handlers) might assume that
351	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
352	 * syscall.  Just in case the high bits are nonzero, zero-extend
353	 * the syscall number.  (This could almost certainly be deleted
354	 * with no ill effects.)
355	 */
356	movl	%eax, %eax
357
358	/* switch to thread stack expects orig_ax and rdi to be pushed */
359	pushq	%rax			/* pt_regs->orig_ax */
360	pushq	%rdi			/* pt_regs->di */
361
362	/* Need to switch before accessing the thread stack. */
363	SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
364	/* In the Xen PV case we already run on the thread stack. */
365	ALTERNATIVE "movq %rsp, %rdi", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
366	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
367
368	pushq	6*8(%rdi)		/* regs->ss */
369	pushq	5*8(%rdi)		/* regs->rsp */
370	pushq	4*8(%rdi)		/* regs->eflags */
371	pushq	3*8(%rdi)		/* regs->cs */
372	pushq	2*8(%rdi)		/* regs->ip */
373	pushq	1*8(%rdi)		/* regs->orig_ax */
374	pushq	(%rdi)			/* pt_regs->di */
375.Lint80_keep_stack:
376
377	pushq	%rsi			/* pt_regs->si */
378	xorl	%esi, %esi		/* nospec   si */
379	pushq	%rdx			/* pt_regs->dx */
380	xorl	%edx, %edx		/* nospec   dx */
381	pushq	%rcx			/* pt_regs->cx */
382	xorl	%ecx, %ecx		/* nospec   cx */
383	pushq	$-ENOSYS		/* pt_regs->ax */
384	pushq   %r8			/* pt_regs->r8 */
385	xorl	%r8d, %r8d		/* nospec   r8 */
386	pushq   %r9			/* pt_regs->r9 */
387	xorl	%r9d, %r9d		/* nospec   r9 */
388	pushq   %r10			/* pt_regs->r10*/
389	xorl	%r10d, %r10d		/* nospec   r10 */
390	pushq   %r11			/* pt_regs->r11 */
391	xorl	%r11d, %r11d		/* nospec   r11 */
392	pushq   %rbx                    /* pt_regs->rbx */
393	xorl	%ebx, %ebx		/* nospec   rbx */
394	pushq   %rbp                    /* pt_regs->rbp */
395	xorl	%ebp, %ebp		/* nospec   rbp */
396	pushq   %r12                    /* pt_regs->r12 */
397	xorl	%r12d, %r12d		/* nospec   r12 */
398	pushq   %r13                    /* pt_regs->r13 */
399	xorl	%r13d, %r13d		/* nospec   r13 */
400	pushq   %r14                    /* pt_regs->r14 */
401	xorl	%r14d, %r14d		/* nospec   r14 */
402	pushq   %r15                    /* pt_regs->r15 */
403	xorl	%r15d, %r15d		/* nospec   r15 */
404	cld
405
406	/*
407	 * User mode is traced as though IRQs are on, and the interrupt
408	 * gate turned them off.
409	 */
410	TRACE_IRQS_OFF
411
412	movq	%rsp, %rdi
413	call	do_int80_syscall_32
414.Lsyscall_32_done:
415
416	/* Go back to user mode. */
417	TRACE_IRQS_ON
418	jmp	swapgs_restore_regs_and_return_to_usermode
419SYM_CODE_END(entry_INT80_compat)
420