xref: /openbmc/linux/arch/x86/entry/entry_64_compat.S (revision 8d01e63f)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include <asm/asm-offsets.h>
8#include <asm/current.h>
9#include <asm/errno.h>
10#include <asm/ia32_unistd.h>
11#include <asm/thread_info.h>
12#include <asm/segment.h>
13#include <asm/irqflags.h>
14#include <asm/asm.h>
15#include <asm/smap.h>
16#include <asm/nospec-branch.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20#include "calling.h"
21
22	.section .entry.text, "ax"
23
24/*
25 * 32-bit SYSENTER entry.
26 *
27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
28 * on 64-bit kernels running on Intel CPUs.
29 *
30 * The SYSENTER instruction, in principle, should *only* occur in the
31 * vDSO.  In practice, a small number of Android devices were shipped
32 * with a copy of Bionic that inlined a SYSENTER instruction.  This
33 * never happened in any of Google's Bionic versions -- it only happened
34 * in a narrow range of Intel-provided versions.
35 *
36 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
37 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
38 * SYSENTER does not save anything on the stack,
39 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 *
41 * Arguments:
42 * eax  system call number
43 * ebx  arg1
44 * ecx  arg2
45 * edx  arg3
46 * esi  arg4
47 * edi  arg5
48 * ebp  user stack
49 * 0(%ebp) arg6
50 */
51SYM_CODE_START(entry_SYSENTER_compat)
52	UNWIND_HINT_ENTRY
53	ENDBR
54	/* Interrupts are off on entry. */
55	swapgs
56
57	pushq	%rax
58	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
59	popq	%rax
60
61	movq	PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp
62
63	/* Construct struct pt_regs on stack */
64	pushq	$__USER_DS		/* pt_regs->ss */
65	pushq	$0			/* pt_regs->sp = 0 (placeholder) */
66
67	/*
68	 * Push flags.  This is nasty.  First, interrupts are currently
69	 * off, but we need pt_regs->flags to have IF set.  Second, if TS
70	 * was set in usermode, it's still set, and we're singlestepping
71	 * through this code.  do_SYSENTER_32() will fix up IF.
72	 */
73	pushfq				/* pt_regs->flags (except IF = 0) */
74	pushq	$__USER32_CS		/* pt_regs->cs */
75	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
76SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
77
78	/*
79	 * User tracing code (ptrace or signal handlers) might assume that
80	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
81	 * syscall.  Just in case the high bits are nonzero, zero-extend
82	 * the syscall number.  (This could almost certainly be deleted
83	 * with no ill effects.)
84	 */
85	movl	%eax, %eax
86
87	pushq	%rax			/* pt_regs->orig_ax */
88	PUSH_AND_CLEAR_REGS rax=$-ENOSYS
89	UNWIND_HINT_REGS
90
91	cld
92
93	/*
94	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
95	 * ourselves.  To save a few cycles, we can check whether
96	 * either was set instead of doing an unconditional popfq.
97	 * This needs to happen before enabling interrupts so that
98	 * we don't get preempted with NT set.
99	 *
100	 * If TF is set, we will single-step all the way to here -- do_debug
101	 * will ignore all the traps.  (Yes, this is slow, but so is
102	 * single-stepping in general.  This allows us to avoid having
103	 * a more complicated code to handle the case where a user program
104	 * forces us to single-step through the SYSENTER entry code.)
105	 *
106	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
107	 * out-of-line as an optimization: NT is unlikely to be set in the
108	 * majority of the cases and instead of polluting the I$ unnecessarily,
109	 * we're keeping that code behind a branch which will predict as
110	 * not-taken and therefore its instructions won't be fetched.
111	 */
112	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
113	jnz	.Lsysenter_fix_flags
114.Lsysenter_flags_fixed:
115
116	/*
117	 * CPU bugs mitigations mechanisms can call other functions. They
118	 * should be invoked after making sure TF is cleared because
119	 * single-step is ignored only for instructions inside the
120	 * entry_SYSENTER_compat function.
121	 */
122	IBRS_ENTER
123	UNTRAIN_RET
124	CLEAR_BRANCH_HISTORY
125
126	movq	%rsp, %rdi
127	call	do_SYSENTER_32
128	/* XEN PV guests always use IRET path */
129	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
130		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
131	jmp	sysret32_from_system_call
132
133.Lsysenter_fix_flags:
134	pushq	$X86_EFLAGS_FIXED
135	popfq
136	jmp	.Lsysenter_flags_fixed
137SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
138SYM_CODE_END(entry_SYSENTER_compat)
139
140/*
141 * 32-bit SYSCALL entry.
142 *
143 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
144 * on 64-bit kernels running on AMD CPUs.
145 *
146 * The SYSCALL instruction, in principle, should *only* occur in the
147 * vDSO.  In practice, it appears that this really is the case.
148 * As evidence:
149 *
150 *  - The calling convention for SYSCALL has changed several times without
151 *    anyone noticing.
152 *
153 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
154 *    user task that did SYSCALL without immediately reloading SS
155 *    would randomly crash.
156 *
157 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
158 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
159 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
160 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
161 *    opposed to compat mode) is sufficiently poorly designed as to be
162 *    essentially unusable.
163 *
164 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
165 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
166 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
167 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
168 * the stack and does not change RSP.
169 *
170 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
171 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
172 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
173 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
174 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
175 *
176 * Arguments:
177 * eax  system call number
178 * ecx  return address
179 * ebx  arg1
180 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
181 * edx  arg3
182 * esi  arg4
183 * edi  arg5
184 * esp  user stack
185 * 0(%esp) arg6
186 */
187SYM_CODE_START(entry_SYSCALL_compat)
188	UNWIND_HINT_ENTRY
189	ENDBR
190	/* Interrupts are off on entry. */
191	swapgs
192
193	/* Stash user ESP */
194	movl	%esp, %r8d
195
196	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
197	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
198
199	/* Switch to the kernel stack */
200	movq	PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp
201
202SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
203	ANNOTATE_NOENDBR
204
205	/* Construct struct pt_regs on stack */
206	pushq	$__USER_DS		/* pt_regs->ss */
207	pushq	%r8			/* pt_regs->sp */
208	pushq	%r11			/* pt_regs->flags */
209	pushq	$__USER32_CS		/* pt_regs->cs */
210	pushq	%rcx			/* pt_regs->ip */
211SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
212	movl	%eax, %eax		/* discard orig_ax high bits */
213	pushq	%rax			/* pt_regs->orig_ax */
214	PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS
215	UNWIND_HINT_REGS
216
217	IBRS_ENTER
218	UNTRAIN_RET
219	CLEAR_BRANCH_HISTORY
220
221	movq	%rsp, %rdi
222	call	do_fast_syscall_32
223	/* XEN PV guests always use IRET path */
224	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
225		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
226
227	/* Opportunistic SYSRET */
228sysret32_from_system_call:
229	/*
230	 * We are not going to return to userspace from the trampoline
231	 * stack. So let's erase the thread stack right now.
232	 */
233	STACKLEAK_ERASE
234
235	IBRS_EXIT
236
237	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
238	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
239	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
240	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
241	addq	$RAX, %rsp		/* Skip r8-r15 */
242	popq	%rax			/* pt_regs->rax */
243	popq	%rdx			/* Skip pt_regs->cx */
244	popq	%rdx			/* pt_regs->dx */
245	popq	%rsi			/* pt_regs->si */
246	popq	%rdi			/* pt_regs->di */
247
248        /*
249         * USERGS_SYSRET32 does:
250         *  GSBASE = user's GS base
251         *  EIP = ECX
252         *  RFLAGS = R11
253         *  CS = __USER32_CS
254         *  SS = __USER_DS
255         *
256	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
257	 * trampoline that will fix up RCX, so this is okay.
258	 *
259	 * R12-R15 are callee-saved, so they contain whatever was in them
260	 * when the system call started, which is already known to user
261	 * code.  We zero R8-R10 to avoid info leaks.
262         */
263	movq	RSP-ORIG_RAX(%rsp), %rsp
264SYM_INNER_LABEL(entry_SYSRETL_compat_unsafe_stack, SYM_L_GLOBAL)
265	ANNOTATE_NOENDBR
266
267	/*
268	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
269	 * on the process stack which is not mapped to userspace and
270	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
271	 * switch until after after the last reference to the process
272	 * stack.
273	 *
274	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
275	 */
276	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
277
278	xorl	%r8d, %r8d
279	xorl	%r9d, %r9d
280	xorl	%r10d, %r10d
281	swapgs
282	CLEAR_CPU_BUFFERS
283	sysretl
284SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL)
285	ANNOTATE_NOENDBR
286	int3
287SYM_CODE_END(entry_SYSCALL_compat)
288
289/*
290 * int 0x80 is used by 32 bit mode as a system call entry. Normally idt entries
291 * point to C routines, however since this is a system call interface the branch
292 * history needs to be scrubbed to protect against BHI attacks, and that
293 * scrubbing needs to take place in assembly code prior to entering any C
294 * routines.
295 */
296SYM_CODE_START(int80_emulation)
297	ANNOTATE_NOENDBR
298	UNWIND_HINT_FUNC
299	CLEAR_BRANCH_HISTORY
300	jmp do_int80_emulation
301SYM_CODE_END(int80_emulation)
302