1/* 2 * Compatibility mode system call entry point for x86-64. 3 * 4 * Copyright 2000-2002 Andi Kleen, SuSE Labs. 5 */ 6#include "calling.h" 7#include <asm/asm-offsets.h> 8#include <asm/current.h> 9#include <asm/errno.h> 10#include <asm/ia32_unistd.h> 11#include <asm/thread_info.h> 12#include <asm/segment.h> 13#include <asm/irqflags.h> 14#include <asm/asm.h> 15#include <asm/smap.h> 16#include <linux/linkage.h> 17#include <linux/err.h> 18 19 .section .entry.text, "ax" 20 21/* 22 * 32-bit SYSENTER entry. 23 * 24 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 25 * on 64-bit kernels running on Intel CPUs. 26 * 27 * The SYSENTER instruction, in principle, should *only* occur in the 28 * vDSO. In practice, a small number of Android devices were shipped 29 * with a copy of Bionic that inlined a SYSENTER instruction. This 30 * never happened in any of Google's Bionic versions -- it only happened 31 * in a narrow range of Intel-provided versions. 32 * 33 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs. 34 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 35 * SYSENTER does not save anything on the stack, 36 * and does not save old RIP (!!!), RSP, or RFLAGS. 37 * 38 * Arguments: 39 * eax system call number 40 * ebx arg1 41 * ecx arg2 42 * edx arg3 43 * esi arg4 44 * edi arg5 45 * ebp user stack 46 * 0(%ebp) arg6 47 */ 48ENTRY(entry_SYSENTER_compat) 49 /* Interrupts are off on entry. */ 50 SWAPGS_UNSAFE_STACK 51 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 52 53 /* 54 * User tracing code (ptrace or signal handlers) might assume that 55 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 56 * syscall. Just in case the high bits are nonzero, zero-extend 57 * the syscall number. (This could almost certainly be deleted 58 * with no ill effects.) 59 */ 60 movl %eax, %eax 61 62 /* Construct struct pt_regs on stack */ 63 pushq $__USER32_DS /* pt_regs->ss */ 64 pushq %rbp /* pt_regs->sp (stashed in bp) */ 65 66 /* 67 * Push flags. This is nasty. First, interrupts are currently 68 * off, but we need pt_regs->flags to have IF set. Second, even 69 * if TF was set when SYSENTER started, it's clear by now. We fix 70 * that later using TIF_SINGLESTEP. 71 */ 72 pushfq /* pt_regs->flags (except IF = 0) */ 73 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */ 74 pushq $__USER32_CS /* pt_regs->cs */ 75 pushq $0 /* pt_regs->ip = 0 (placeholder) */ 76 pushq %rax /* pt_regs->orig_ax */ 77 pushq %rdi /* pt_regs->di */ 78 pushq %rsi /* pt_regs->si */ 79 pushq %rdx /* pt_regs->dx */ 80 pushq %rcx /* pt_regs->cx */ 81 pushq $-ENOSYS /* pt_regs->ax */ 82 pushq $0 /* pt_regs->r8 = 0 */ 83 pushq $0 /* pt_regs->r9 = 0 */ 84 pushq $0 /* pt_regs->r10 = 0 */ 85 pushq $0 /* pt_regs->r11 = 0 */ 86 pushq %rbx /* pt_regs->rbx */ 87 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 88 pushq $0 /* pt_regs->r12 = 0 */ 89 pushq $0 /* pt_regs->r13 = 0 */ 90 pushq $0 /* pt_regs->r14 = 0 */ 91 pushq $0 /* pt_regs->r15 = 0 */ 92 cld 93 94 /* 95 * SYSENTER doesn't filter flags, so we need to clear NT and AC 96 * ourselves. To save a few cycles, we can check whether 97 * either was set instead of doing an unconditional popfq. 98 * This needs to happen before enabling interrupts so that 99 * we don't get preempted with NT set. 100 * 101 * If TF is set, we will single-step all the way to here -- do_debug 102 * will ignore all the traps. (Yes, this is slow, but so is 103 * single-stepping in general. This allows us to avoid having 104 * a more complicated code to handle the case where a user program 105 * forces us to single-step through the SYSENTER entry code.) 106 * 107 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 108 * out-of-line as an optimization: NT is unlikely to be set in the 109 * majority of the cases and instead of polluting the I$ unnecessarily, 110 * we're keeping that code behind a branch which will predict as 111 * not-taken and therefore its instructions won't be fetched. 112 */ 113 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp) 114 jnz .Lsysenter_fix_flags 115.Lsysenter_flags_fixed: 116 117 /* 118 * User mode is traced as though IRQs are on, and SYSENTER 119 * turned them off. 120 */ 121 TRACE_IRQS_OFF 122 123 movq %rsp, %rdi 124 call do_fast_syscall_32 125 /* XEN PV guests always use IRET path */ 126 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 127 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 128 jmp sysret32_from_system_call 129 130.Lsysenter_fix_flags: 131 pushq $X86_EFLAGS_FIXED 132 popfq 133 jmp .Lsysenter_flags_fixed 134GLOBAL(__end_entry_SYSENTER_compat) 135ENDPROC(entry_SYSENTER_compat) 136 137/* 138 * 32-bit SYSCALL entry. 139 * 140 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 141 * on 64-bit kernels running on AMD CPUs. 142 * 143 * The SYSCALL instruction, in principle, should *only* occur in the 144 * vDSO. In practice, it appears that this really is the case. 145 * As evidence: 146 * 147 * - The calling convention for SYSCALL has changed several times without 148 * anyone noticing. 149 * 150 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything 151 * user task that did SYSCALL without immediately reloading SS 152 * would randomly crash. 153 * 154 * - Most programmers do not directly target AMD CPUs, and the 32-bit 155 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD 156 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels 157 * because the SYSCALL instruction in legacy/native 32-bit mode (as 158 * opposed to compat mode) is sufficiently poorly designed as to be 159 * essentially unusable. 160 * 161 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves 162 * RFLAGS to R11, then loads new SS, CS, and RIP from previously 163 * programmed MSRs. RFLAGS gets masked by a value from another MSR 164 * (so CLD and CLAC are not needed). SYSCALL does not save anything on 165 * the stack and does not change RSP. 166 * 167 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode 168 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it). 169 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit 170 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes 171 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors). 172 * 173 * Arguments: 174 * eax system call number 175 * ecx return address 176 * ebx arg1 177 * ebp arg2 (note: not saved in the stack frame, should not be touched) 178 * edx arg3 179 * esi arg4 180 * edi arg5 181 * esp user stack 182 * 0(%esp) arg6 183 */ 184ENTRY(entry_SYSCALL_compat) 185 /* Interrupts are off on entry. */ 186 SWAPGS_UNSAFE_STACK 187 188 /* Stash user ESP and switch to the kernel stack. */ 189 movl %esp, %r8d 190 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 191 192 /* Zero-extending 32-bit regs, do not remove */ 193 movl %eax, %eax 194 195 /* Construct struct pt_regs on stack */ 196 pushq $__USER32_DS /* pt_regs->ss */ 197 pushq %r8 /* pt_regs->sp */ 198 pushq %r11 /* pt_regs->flags */ 199 pushq $__USER32_CS /* pt_regs->cs */ 200 pushq %rcx /* pt_regs->ip */ 201 pushq %rax /* pt_regs->orig_ax */ 202 pushq %rdi /* pt_regs->di */ 203 pushq %rsi /* pt_regs->si */ 204 pushq %rdx /* pt_regs->dx */ 205 pushq %rbp /* pt_regs->cx (stashed in bp) */ 206 pushq $-ENOSYS /* pt_regs->ax */ 207 pushq $0 /* pt_regs->r8 = 0 */ 208 pushq $0 /* pt_regs->r9 = 0 */ 209 pushq $0 /* pt_regs->r10 = 0 */ 210 pushq $0 /* pt_regs->r11 = 0 */ 211 pushq %rbx /* pt_regs->rbx */ 212 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 213 pushq $0 /* pt_regs->r12 = 0 */ 214 pushq $0 /* pt_regs->r13 = 0 */ 215 pushq $0 /* pt_regs->r14 = 0 */ 216 pushq $0 /* pt_regs->r15 = 0 */ 217 218 /* 219 * User mode is traced as though IRQs are on, and SYSENTER 220 * turned them off. 221 */ 222 TRACE_IRQS_OFF 223 224 movq %rsp, %rdi 225 call do_fast_syscall_32 226 /* XEN PV guests always use IRET path */ 227 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 228 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 229 230 /* Opportunistic SYSRET */ 231sysret32_from_system_call: 232 TRACE_IRQS_ON /* User mode traces as IRQs on. */ 233 movq RBX(%rsp), %rbx /* pt_regs->rbx */ 234 movq RBP(%rsp), %rbp /* pt_regs->rbp */ 235 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */ 236 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */ 237 addq $RAX, %rsp /* Skip r8-r15 */ 238 popq %rax /* pt_regs->rax */ 239 popq %rdx /* Skip pt_regs->cx */ 240 popq %rdx /* pt_regs->dx */ 241 popq %rsi /* pt_regs->si */ 242 popq %rdi /* pt_regs->di */ 243 244 /* 245 * USERGS_SYSRET32 does: 246 * GSBASE = user's GS base 247 * EIP = ECX 248 * RFLAGS = R11 249 * CS = __USER32_CS 250 * SS = __USER_DS 251 * 252 * ECX will not match pt_regs->cx, but we're returning to a vDSO 253 * trampoline that will fix up RCX, so this is okay. 254 * 255 * R12-R15 are callee-saved, so they contain whatever was in them 256 * when the system call started, which is already known to user 257 * code. We zero R8-R10 to avoid info leaks. 258 */ 259 xorq %r8, %r8 260 xorq %r9, %r9 261 xorq %r10, %r10 262 movq RSP-ORIG_RAX(%rsp), %rsp 263 swapgs 264 sysretl 265END(entry_SYSCALL_compat) 266 267/* 268 * 32-bit legacy system call entry. 269 * 270 * 32-bit x86 Linux system calls traditionally used the INT $0x80 271 * instruction. INT $0x80 lands here. 272 * 273 * This entry point can be used by 32-bit and 64-bit programs to perform 274 * 32-bit system calls. Instances of INT $0x80 can be found inline in 275 * various programs and libraries. It is also used by the vDSO's 276 * __kernel_vsyscall fallback for hardware that doesn't support a faster 277 * entry method. Restarted 32-bit system calls also fall back to INT 278 * $0x80 regardless of what instruction was originally used to do the 279 * system call. 280 * 281 * This is considered a slow path. It is not used by most libc 282 * implementations on modern hardware except during process startup. 283 * 284 * Arguments: 285 * eax system call number 286 * ebx arg1 287 * ecx arg2 288 * edx arg3 289 * esi arg4 290 * edi arg5 291 * ebp arg6 292 */ 293ENTRY(entry_INT80_compat) 294 /* 295 * Interrupts are off on entry. 296 */ 297 PARAVIRT_ADJUST_EXCEPTION_FRAME 298 ASM_CLAC /* Do this early to minimize exposure */ 299 SWAPGS 300 301 /* 302 * User tracing code (ptrace or signal handlers) might assume that 303 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 304 * syscall. Just in case the high bits are nonzero, zero-extend 305 * the syscall number. (This could almost certainly be deleted 306 * with no ill effects.) 307 */ 308 movl %eax, %eax 309 310 /* Construct struct pt_regs on stack (iret frame is already on stack) */ 311 pushq %rax /* pt_regs->orig_ax */ 312 pushq %rdi /* pt_regs->di */ 313 pushq %rsi /* pt_regs->si */ 314 pushq %rdx /* pt_regs->dx */ 315 pushq %rcx /* pt_regs->cx */ 316 pushq $-ENOSYS /* pt_regs->ax */ 317 pushq $0 /* pt_regs->r8 = 0 */ 318 pushq $0 /* pt_regs->r9 = 0 */ 319 pushq $0 /* pt_regs->r10 = 0 */ 320 pushq $0 /* pt_regs->r11 = 0 */ 321 pushq %rbx /* pt_regs->rbx */ 322 pushq %rbp /* pt_regs->rbp */ 323 pushq %r12 /* pt_regs->r12 */ 324 pushq %r13 /* pt_regs->r13 */ 325 pushq %r14 /* pt_regs->r14 */ 326 pushq %r15 /* pt_regs->r15 */ 327 cld 328 329 /* 330 * User mode is traced as though IRQs are on, and the interrupt 331 * gate turned them off. 332 */ 333 TRACE_IRQS_OFF 334 335 movq %rsp, %rdi 336 call do_int80_syscall_32 337.Lsyscall_32_done: 338 339 /* Go back to user mode. */ 340 TRACE_IRQS_ON 341 SWAPGS 342 jmp restore_regs_and_iret 343END(entry_INT80_compat) 344 345 ALIGN 346GLOBAL(stub32_clone) 347 /* 348 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr). 349 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val). 350 * 351 * The native 64-bit kernel's sys_clone() implements the latter, 352 * so we need to swap arguments here before calling it: 353 */ 354 xchg %r8, %rcx 355 jmp sys_clone 356