1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Compatibility mode system call entry point for x86-64. 4 * 5 * Copyright 2000-2002 Andi Kleen, SuSE Labs. 6 */ 7#include "calling.h" 8#include <asm/asm-offsets.h> 9#include <asm/current.h> 10#include <asm/errno.h> 11#include <asm/ia32_unistd.h> 12#include <asm/thread_info.h> 13#include <asm/segment.h> 14#include <asm/irqflags.h> 15#include <asm/asm.h> 16#include <asm/smap.h> 17#include <linux/linkage.h> 18#include <linux/err.h> 19 20 .section .entry.text, "ax" 21 22/* 23 * 32-bit SYSENTER entry. 24 * 25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 26 * on 64-bit kernels running on Intel CPUs. 27 * 28 * The SYSENTER instruction, in principle, should *only* occur in the 29 * vDSO. In practice, a small number of Android devices were shipped 30 * with a copy of Bionic that inlined a SYSENTER instruction. This 31 * never happened in any of Google's Bionic versions -- it only happened 32 * in a narrow range of Intel-provided versions. 33 * 34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs. 35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 36 * SYSENTER does not save anything on the stack, 37 * and does not save old RIP (!!!), RSP, or RFLAGS. 38 * 39 * Arguments: 40 * eax system call number 41 * ebx arg1 42 * ecx arg2 43 * edx arg3 44 * esi arg4 45 * edi arg5 46 * ebp user stack 47 * 0(%ebp) arg6 48 */ 49SYM_CODE_START(entry_SYSENTER_compat) 50 UNWIND_HINT_EMPTY 51 /* Interrupts are off on entry. */ 52 SWAPGS 53 54 pushq %rax 55 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 56 popq %rax 57 58 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 59 60 /* 61 * User tracing code (ptrace or signal handlers) might assume that 62 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 63 * syscall. Just in case the high bits are nonzero, zero-extend 64 * the syscall number. (This could almost certainly be deleted 65 * with no ill effects.) 66 */ 67 movl %eax, %eax 68 69 /* Construct struct pt_regs on stack */ 70 pushq $__USER32_DS /* pt_regs->ss */ 71 pushq %rbp /* pt_regs->sp (stashed in bp) */ 72 73 /* 74 * Push flags. This is nasty. First, interrupts are currently 75 * off, but we need pt_regs->flags to have IF set. Second, even 76 * if TF was set when SYSENTER started, it's clear by now. We fix 77 * that later using TIF_SINGLESTEP. 78 */ 79 pushfq /* pt_regs->flags (except IF = 0) */ 80 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */ 81 pushq $__USER32_CS /* pt_regs->cs */ 82 pushq $0 /* pt_regs->ip = 0 (placeholder) */ 83 pushq %rax /* pt_regs->orig_ax */ 84 pushq %rdi /* pt_regs->di */ 85 pushq %rsi /* pt_regs->si */ 86 pushq %rdx /* pt_regs->dx */ 87 pushq %rcx /* pt_regs->cx */ 88 pushq $-ENOSYS /* pt_regs->ax */ 89 pushq $0 /* pt_regs->r8 = 0 */ 90 xorl %r8d, %r8d /* nospec r8 */ 91 pushq $0 /* pt_regs->r9 = 0 */ 92 xorl %r9d, %r9d /* nospec r9 */ 93 pushq $0 /* pt_regs->r10 = 0 */ 94 xorl %r10d, %r10d /* nospec r10 */ 95 pushq $0 /* pt_regs->r11 = 0 */ 96 xorl %r11d, %r11d /* nospec r11 */ 97 pushq %rbx /* pt_regs->rbx */ 98 xorl %ebx, %ebx /* nospec rbx */ 99 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 100 xorl %ebp, %ebp /* nospec rbp */ 101 pushq $0 /* pt_regs->r12 = 0 */ 102 xorl %r12d, %r12d /* nospec r12 */ 103 pushq $0 /* pt_regs->r13 = 0 */ 104 xorl %r13d, %r13d /* nospec r13 */ 105 pushq $0 /* pt_regs->r14 = 0 */ 106 xorl %r14d, %r14d /* nospec r14 */ 107 pushq $0 /* pt_regs->r15 = 0 */ 108 xorl %r15d, %r15d /* nospec r15 */ 109 110 UNWIND_HINT_REGS 111 112 cld 113 114 /* 115 * SYSENTER doesn't filter flags, so we need to clear NT and AC 116 * ourselves. To save a few cycles, we can check whether 117 * either was set instead of doing an unconditional popfq. 118 * This needs to happen before enabling interrupts so that 119 * we don't get preempted with NT set. 120 * 121 * If TF is set, we will single-step all the way to here -- do_debug 122 * will ignore all the traps. (Yes, this is slow, but so is 123 * single-stepping in general. This allows us to avoid having 124 * a more complicated code to handle the case where a user program 125 * forces us to single-step through the SYSENTER entry code.) 126 * 127 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 128 * out-of-line as an optimization: NT is unlikely to be set in the 129 * majority of the cases and instead of polluting the I$ unnecessarily, 130 * we're keeping that code behind a branch which will predict as 131 * not-taken and therefore its instructions won't be fetched. 132 */ 133 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp) 134 jnz .Lsysenter_fix_flags 135.Lsysenter_flags_fixed: 136 137 movq %rsp, %rdi 138 call do_fast_syscall_32 139 /* XEN PV guests always use IRET path */ 140 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ 141 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV 142 jmp sysret32_from_system_call 143 144.Lsysenter_fix_flags: 145 pushq $X86_EFLAGS_FIXED 146 popfq 147 jmp .Lsysenter_flags_fixed 148SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL) 149SYM_CODE_END(entry_SYSENTER_compat) 150 151/* 152 * 32-bit SYSCALL entry. 153 * 154 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 155 * on 64-bit kernels running on AMD CPUs. 156 * 157 * The SYSCALL instruction, in principle, should *only* occur in the 158 * vDSO. In practice, it appears that this really is the case. 159 * As evidence: 160 * 161 * - The calling convention for SYSCALL has changed several times without 162 * anyone noticing. 163 * 164 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything 165 * user task that did SYSCALL without immediately reloading SS 166 * would randomly crash. 167 * 168 * - Most programmers do not directly target AMD CPUs, and the 32-bit 169 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD 170 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels 171 * because the SYSCALL instruction in legacy/native 32-bit mode (as 172 * opposed to compat mode) is sufficiently poorly designed as to be 173 * essentially unusable. 174 * 175 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves 176 * RFLAGS to R11, then loads new SS, CS, and RIP from previously 177 * programmed MSRs. RFLAGS gets masked by a value from another MSR 178 * (so CLD and CLAC are not needed). SYSCALL does not save anything on 179 * the stack and does not change RSP. 180 * 181 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode 182 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it). 183 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit 184 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes 185 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors). 186 * 187 * Arguments: 188 * eax system call number 189 * ecx return address 190 * ebx arg1 191 * ebp arg2 (note: not saved in the stack frame, should not be touched) 192 * edx arg3 193 * esi arg4 194 * edi arg5 195 * esp user stack 196 * 0(%esp) arg6 197 */ 198SYM_CODE_START(entry_SYSCALL_compat) 199 UNWIND_HINT_EMPTY 200 /* Interrupts are off on entry. */ 201 swapgs 202 203 /* Stash user ESP */ 204 movl %esp, %r8d 205 206 /* Use %rsp as scratch reg. User ESP is stashed in r8 */ 207 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp 208 209 /* Switch to the kernel stack */ 210 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 211 212 /* Construct struct pt_regs on stack */ 213 pushq $__USER32_DS /* pt_regs->ss */ 214 pushq %r8 /* pt_regs->sp */ 215 pushq %r11 /* pt_regs->flags */ 216 pushq $__USER32_CS /* pt_regs->cs */ 217 pushq %rcx /* pt_regs->ip */ 218SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL) 219 movl %eax, %eax /* discard orig_ax high bits */ 220 pushq %rax /* pt_regs->orig_ax */ 221 pushq %rdi /* pt_regs->di */ 222 pushq %rsi /* pt_regs->si */ 223 xorl %esi, %esi /* nospec si */ 224 pushq %rdx /* pt_regs->dx */ 225 xorl %edx, %edx /* nospec dx */ 226 pushq %rbp /* pt_regs->cx (stashed in bp) */ 227 xorl %ecx, %ecx /* nospec cx */ 228 pushq $-ENOSYS /* pt_regs->ax */ 229 pushq $0 /* pt_regs->r8 = 0 */ 230 xorl %r8d, %r8d /* nospec r8 */ 231 pushq $0 /* pt_regs->r9 = 0 */ 232 xorl %r9d, %r9d /* nospec r9 */ 233 pushq $0 /* pt_regs->r10 = 0 */ 234 xorl %r10d, %r10d /* nospec r10 */ 235 pushq $0 /* pt_regs->r11 = 0 */ 236 xorl %r11d, %r11d /* nospec r11 */ 237 pushq %rbx /* pt_regs->rbx */ 238 xorl %ebx, %ebx /* nospec rbx */ 239 pushq %rbp /* pt_regs->rbp (will be overwritten) */ 240 xorl %ebp, %ebp /* nospec rbp */ 241 pushq $0 /* pt_regs->r12 = 0 */ 242 xorl %r12d, %r12d /* nospec r12 */ 243 pushq $0 /* pt_regs->r13 = 0 */ 244 xorl %r13d, %r13d /* nospec r13 */ 245 pushq $0 /* pt_regs->r14 = 0 */ 246 xorl %r14d, %r14d /* nospec r14 */ 247 pushq $0 /* pt_regs->r15 = 0 */ 248 xorl %r15d, %r15d /* nospec r15 */ 249 250 UNWIND_HINT_REGS 251 252 movq %rsp, %rdi 253 call do_fast_syscall_32 254 /* XEN PV guests always use IRET path */ 255 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ 256 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV 257 258 /* Opportunistic SYSRET */ 259sysret32_from_system_call: 260 /* 261 * We are not going to return to userspace from the trampoline 262 * stack. So let's erase the thread stack right now. 263 */ 264 STACKLEAK_ERASE 265 266 movq RBX(%rsp), %rbx /* pt_regs->rbx */ 267 movq RBP(%rsp), %rbp /* pt_regs->rbp */ 268 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */ 269 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */ 270 addq $RAX, %rsp /* Skip r8-r15 */ 271 popq %rax /* pt_regs->rax */ 272 popq %rdx /* Skip pt_regs->cx */ 273 popq %rdx /* pt_regs->dx */ 274 popq %rsi /* pt_regs->si */ 275 popq %rdi /* pt_regs->di */ 276 277 /* 278 * USERGS_SYSRET32 does: 279 * GSBASE = user's GS base 280 * EIP = ECX 281 * RFLAGS = R11 282 * CS = __USER32_CS 283 * SS = __USER_DS 284 * 285 * ECX will not match pt_regs->cx, but we're returning to a vDSO 286 * trampoline that will fix up RCX, so this is okay. 287 * 288 * R12-R15 are callee-saved, so they contain whatever was in them 289 * when the system call started, which is already known to user 290 * code. We zero R8-R10 to avoid info leaks. 291 */ 292 movq RSP-ORIG_RAX(%rsp), %rsp 293 294 /* 295 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored 296 * on the process stack which is not mapped to userspace and 297 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3 298 * switch until after after the last reference to the process 299 * stack. 300 * 301 * %r8/%r9 are zeroed before the sysret, thus safe to clobber. 302 */ 303 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9 304 305 xorl %r8d, %r8d 306 xorl %r9d, %r9d 307 xorl %r10d, %r10d 308 swapgs 309 sysretl 310SYM_CODE_END(entry_SYSCALL_compat) 311 312/* 313 * 32-bit legacy system call entry. 314 * 315 * 32-bit x86 Linux system calls traditionally used the INT $0x80 316 * instruction. INT $0x80 lands here. 317 * 318 * This entry point can be used by 32-bit and 64-bit programs to perform 319 * 32-bit system calls. Instances of INT $0x80 can be found inline in 320 * various programs and libraries. It is also used by the vDSO's 321 * __kernel_vsyscall fallback for hardware that doesn't support a faster 322 * entry method. Restarted 32-bit system calls also fall back to INT 323 * $0x80 regardless of what instruction was originally used to do the 324 * system call. 325 * 326 * This is considered a slow path. It is not used by most libc 327 * implementations on modern hardware except during process startup. 328 * 329 * Arguments: 330 * eax system call number 331 * ebx arg1 332 * ecx arg2 333 * edx arg3 334 * esi arg4 335 * edi arg5 336 * ebp arg6 337 */ 338SYM_CODE_START(entry_INT80_compat) 339 UNWIND_HINT_EMPTY 340 /* 341 * Interrupts are off on entry. 342 */ 343 ASM_CLAC /* Do this early to minimize exposure */ 344 SWAPGS 345 346 /* 347 * User tracing code (ptrace or signal handlers) might assume that 348 * the saved RAX contains a 32-bit number when we're invoking a 32-bit 349 * syscall. Just in case the high bits are nonzero, zero-extend 350 * the syscall number. (This could almost certainly be deleted 351 * with no ill effects.) 352 */ 353 movl %eax, %eax 354 355 /* switch to thread stack expects orig_ax and rdi to be pushed */ 356 pushq %rax /* pt_regs->orig_ax */ 357 pushq %rdi /* pt_regs->di */ 358 359 /* Need to switch before accessing the thread stack. */ 360 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi 361 362 /* In the Xen PV case we already run on the thread stack. */ 363 ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV 364 365 movq %rsp, %rdi 366 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 367 368 pushq 6*8(%rdi) /* regs->ss */ 369 pushq 5*8(%rdi) /* regs->rsp */ 370 pushq 4*8(%rdi) /* regs->eflags */ 371 pushq 3*8(%rdi) /* regs->cs */ 372 pushq 2*8(%rdi) /* regs->ip */ 373 pushq 1*8(%rdi) /* regs->orig_ax */ 374 pushq (%rdi) /* pt_regs->di */ 375.Lint80_keep_stack: 376 377 pushq %rsi /* pt_regs->si */ 378 xorl %esi, %esi /* nospec si */ 379 pushq %rdx /* pt_regs->dx */ 380 xorl %edx, %edx /* nospec dx */ 381 pushq %rcx /* pt_regs->cx */ 382 xorl %ecx, %ecx /* nospec cx */ 383 pushq $-ENOSYS /* pt_regs->ax */ 384 pushq %r8 /* pt_regs->r8 */ 385 xorl %r8d, %r8d /* nospec r8 */ 386 pushq %r9 /* pt_regs->r9 */ 387 xorl %r9d, %r9d /* nospec r9 */ 388 pushq %r10 /* pt_regs->r10*/ 389 xorl %r10d, %r10d /* nospec r10 */ 390 pushq %r11 /* pt_regs->r11 */ 391 xorl %r11d, %r11d /* nospec r11 */ 392 pushq %rbx /* pt_regs->rbx */ 393 xorl %ebx, %ebx /* nospec rbx */ 394 pushq %rbp /* pt_regs->rbp */ 395 xorl %ebp, %ebp /* nospec rbp */ 396 pushq %r12 /* pt_regs->r12 */ 397 xorl %r12d, %r12d /* nospec r12 */ 398 pushq %r13 /* pt_regs->r13 */ 399 xorl %r13d, %r13d /* nospec r13 */ 400 pushq %r14 /* pt_regs->r14 */ 401 xorl %r14d, %r14d /* nospec r14 */ 402 pushq %r15 /* pt_regs->r15 */ 403 xorl %r15d, %r15d /* nospec r15 */ 404 405 UNWIND_HINT_REGS 406 407 cld 408 409 movq %rsp, %rdi 410 call do_int80_syscall_32 411 jmp swapgs_restore_regs_and_return_to_usermode 412SYM_CODE_END(entry_INT80_compat) 413