xref: /openbmc/linux/arch/x86/entry/entry_64_compat.S (revision 7fc96d71)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include "calling.h"
8#include <asm/asm-offsets.h>
9#include <asm/current.h>
10#include <asm/errno.h>
11#include <asm/ia32_unistd.h>
12#include <asm/thread_info.h>
13#include <asm/segment.h>
14#include <asm/irqflags.h>
15#include <asm/asm.h>
16#include <asm/smap.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20	.section .entry.text, "ax"
21
22/*
23 * 32-bit SYSENTER entry.
24 *
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
27 *
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO.  In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction.  This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
33 *
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
38 *
39 * Arguments:
40 * eax  system call number
41 * ebx  arg1
42 * ecx  arg2
43 * edx  arg3
44 * esi  arg4
45 * edi  arg5
46 * ebp  user stack
47 * 0(%ebp) arg6
48 */
49SYM_CODE_START(entry_SYSENTER_compat)
50	UNWIND_HINT_EMPTY
51	ENDBR
52	/* Interrupts are off on entry. */
53	swapgs
54
55	pushq	%rax
56	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
57	popq	%rax
58
59	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
60
61	/* Construct struct pt_regs on stack */
62	pushq	$__USER32_DS		/* pt_regs->ss */
63	pushq	$0			/* pt_regs->sp = 0 (placeholder) */
64
65	/*
66	 * Push flags.  This is nasty.  First, interrupts are currently
67	 * off, but we need pt_regs->flags to have IF set.  Second, if TS
68	 * was set in usermode, it's still set, and we're singlestepping
69	 * through this code.  do_SYSENTER_32() will fix up IF.
70	 */
71	pushfq				/* pt_regs->flags (except IF = 0) */
72	pushq	$__USER32_CS		/* pt_regs->cs */
73	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
74SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
75
76	/*
77	 * User tracing code (ptrace or signal handlers) might assume that
78	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
79	 * syscall.  Just in case the high bits are nonzero, zero-extend
80	 * the syscall number.  (This could almost certainly be deleted
81	 * with no ill effects.)
82	 */
83	movl	%eax, %eax
84
85	pushq	%rax			/* pt_regs->orig_ax */
86	PUSH_AND_CLEAR_REGS rax=$-ENOSYS
87	UNWIND_HINT_REGS
88
89	cld
90
91	/*
92	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
93	 * ourselves.  To save a few cycles, we can check whether
94	 * either was set instead of doing an unconditional popfq.
95	 * This needs to happen before enabling interrupts so that
96	 * we don't get preempted with NT set.
97	 *
98	 * If TF is set, we will single-step all the way to here -- do_debug
99	 * will ignore all the traps.  (Yes, this is slow, but so is
100	 * single-stepping in general.  This allows us to avoid having
101	 * a more complicated code to handle the case where a user program
102	 * forces us to single-step through the SYSENTER entry code.)
103	 *
104	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
105	 * out-of-line as an optimization: NT is unlikely to be set in the
106	 * majority of the cases and instead of polluting the I$ unnecessarily,
107	 * we're keeping that code behind a branch which will predict as
108	 * not-taken and therefore its instructions won't be fetched.
109	 */
110	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
111	jnz	.Lsysenter_fix_flags
112.Lsysenter_flags_fixed:
113
114	movq	%rsp, %rdi
115	call	do_SYSENTER_32
116	/* XEN PV guests always use IRET path */
117	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
118		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
119	jmp	sysret32_from_system_call
120
121.Lsysenter_fix_flags:
122	pushq	$X86_EFLAGS_FIXED
123	popfq
124	jmp	.Lsysenter_flags_fixed
125SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
126	ANNOTATE_NOENDBR // is_sysenter_singlestep
127SYM_CODE_END(entry_SYSENTER_compat)
128
129/*
130 * 32-bit SYSCALL entry.
131 *
132 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
133 * on 64-bit kernels running on AMD CPUs.
134 *
135 * The SYSCALL instruction, in principle, should *only* occur in the
136 * vDSO.  In practice, it appears that this really is the case.
137 * As evidence:
138 *
139 *  - The calling convention for SYSCALL has changed several times without
140 *    anyone noticing.
141 *
142 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
143 *    user task that did SYSCALL without immediately reloading SS
144 *    would randomly crash.
145 *
146 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
147 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
148 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
149 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
150 *    opposed to compat mode) is sufficiently poorly designed as to be
151 *    essentially unusable.
152 *
153 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
154 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
155 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
156 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
157 * the stack and does not change RSP.
158 *
159 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
160 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
161 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
162 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
163 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
164 *
165 * Arguments:
166 * eax  system call number
167 * ecx  return address
168 * ebx  arg1
169 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
170 * edx  arg3
171 * esi  arg4
172 * edi  arg5
173 * esp  user stack
174 * 0(%esp) arg6
175 */
176SYM_CODE_START(entry_SYSCALL_compat)
177	UNWIND_HINT_EMPTY
178	ENDBR
179	/* Interrupts are off on entry. */
180	swapgs
181
182	/* Stash user ESP */
183	movl	%esp, %r8d
184
185	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
186	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
187
188	/* Switch to the kernel stack */
189	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
190
191SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
192	ANNOTATE_NOENDBR
193
194	/* Construct struct pt_regs on stack */
195	pushq	$__USER32_DS		/* pt_regs->ss */
196	pushq	%r8			/* pt_regs->sp */
197	pushq	%r11			/* pt_regs->flags */
198	pushq	$__USER32_CS		/* pt_regs->cs */
199	pushq	%rcx			/* pt_regs->ip */
200SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
201	movl	%eax, %eax		/* discard orig_ax high bits */
202	pushq	%rax			/* pt_regs->orig_ax */
203	PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS
204	UNWIND_HINT_REGS
205
206	movq	%rsp, %rdi
207	call	do_fast_syscall_32
208	/* XEN PV guests always use IRET path */
209	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
210		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
211
212	/* Opportunistic SYSRET */
213sysret32_from_system_call:
214	/*
215	 * We are not going to return to userspace from the trampoline
216	 * stack. So let's erase the thread stack right now.
217	 */
218	STACKLEAK_ERASE
219
220	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
221	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
222	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
223	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
224	addq	$RAX, %rsp		/* Skip r8-r15 */
225	popq	%rax			/* pt_regs->rax */
226	popq	%rdx			/* Skip pt_regs->cx */
227	popq	%rdx			/* pt_regs->dx */
228	popq	%rsi			/* pt_regs->si */
229	popq	%rdi			/* pt_regs->di */
230
231        /*
232         * USERGS_SYSRET32 does:
233         *  GSBASE = user's GS base
234         *  EIP = ECX
235         *  RFLAGS = R11
236         *  CS = __USER32_CS
237         *  SS = __USER_DS
238         *
239	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
240	 * trampoline that will fix up RCX, so this is okay.
241	 *
242	 * R12-R15 are callee-saved, so they contain whatever was in them
243	 * when the system call started, which is already known to user
244	 * code.  We zero R8-R10 to avoid info leaks.
245         */
246	movq	RSP-ORIG_RAX(%rsp), %rsp
247SYM_INNER_LABEL(entry_SYSRETL_compat_unsafe_stack, SYM_L_GLOBAL)
248	ANNOTATE_NOENDBR
249
250	/*
251	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
252	 * on the process stack which is not mapped to userspace and
253	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
254	 * switch until after after the last reference to the process
255	 * stack.
256	 *
257	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
258	 */
259	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
260
261	xorl	%r8d, %r8d
262	xorl	%r9d, %r9d
263	xorl	%r10d, %r10d
264	swapgs
265	sysretl
266SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL)
267	ANNOTATE_NOENDBR
268	int3
269SYM_CODE_END(entry_SYSCALL_compat)
270
271/*
272 * 32-bit legacy system call entry.
273 *
274 * 32-bit x86 Linux system calls traditionally used the INT $0x80
275 * instruction.  INT $0x80 lands here.
276 *
277 * This entry point can be used by 32-bit and 64-bit programs to perform
278 * 32-bit system calls.  Instances of INT $0x80 can be found inline in
279 * various programs and libraries.  It is also used by the vDSO's
280 * __kernel_vsyscall fallback for hardware that doesn't support a faster
281 * entry method.  Restarted 32-bit system calls also fall back to INT
282 * $0x80 regardless of what instruction was originally used to do the
283 * system call.
284 *
285 * This is considered a slow path.  It is not used by most libc
286 * implementations on modern hardware except during process startup.
287 *
288 * Arguments:
289 * eax  system call number
290 * ebx  arg1
291 * ecx  arg2
292 * edx  arg3
293 * esi  arg4
294 * edi  arg5
295 * ebp  arg6
296 */
297SYM_CODE_START(entry_INT80_compat)
298	UNWIND_HINT_EMPTY
299	ENDBR
300	/*
301	 * Interrupts are off on entry.
302	 */
303	ASM_CLAC			/* Do this early to minimize exposure */
304	SWAPGS
305
306	/*
307	 * User tracing code (ptrace or signal handlers) might assume that
308	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
309	 * syscall.  Just in case the high bits are nonzero, zero-extend
310	 * the syscall number.  (This could almost certainly be deleted
311	 * with no ill effects.)
312	 */
313	movl	%eax, %eax
314
315	/* switch to thread stack expects orig_ax and rdi to be pushed */
316	pushq	%rax			/* pt_regs->orig_ax */
317
318	/* Need to switch before accessing the thread stack. */
319	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
320
321	/* In the Xen PV case we already run on the thread stack. */
322	ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
323
324	movq	%rsp, %rax
325	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
326
327	pushq	5*8(%rax)		/* regs->ss */
328	pushq	4*8(%rax)		/* regs->rsp */
329	pushq	3*8(%rax)		/* regs->eflags */
330	pushq	2*8(%rax)		/* regs->cs */
331	pushq	1*8(%rax)		/* regs->ip */
332	pushq	0*8(%rax)		/* regs->orig_ax */
333.Lint80_keep_stack:
334
335	PUSH_AND_CLEAR_REGS rax=$-ENOSYS
336	UNWIND_HINT_REGS
337
338	cld
339
340	movq	%rsp, %rdi
341	call	do_int80_syscall_32
342	jmp	swapgs_restore_regs_and_return_to_usermode
343SYM_CODE_END(entry_INT80_compat)
344