xref: /openbmc/linux/arch/x86/entry/entry_64_compat.S (revision 77423a62)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include <asm/asm-offsets.h>
8#include <asm/current.h>
9#include <asm/errno.h>
10#include <asm/ia32_unistd.h>
11#include <asm/thread_info.h>
12#include <asm/segment.h>
13#include <asm/irqflags.h>
14#include <asm/asm.h>
15#include <asm/smap.h>
16#include <asm/nospec-branch.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20#include "calling.h"
21
22	.section .entry.text, "ax"
23
24/*
25 * 32-bit SYSENTER entry.
26 *
27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
28 * on 64-bit kernels running on Intel CPUs.
29 *
30 * The SYSENTER instruction, in principle, should *only* occur in the
31 * vDSO.  In practice, a small number of Android devices were shipped
32 * with a copy of Bionic that inlined a SYSENTER instruction.  This
33 * never happened in any of Google's Bionic versions -- it only happened
34 * in a narrow range of Intel-provided versions.
35 *
36 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
37 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
38 * SYSENTER does not save anything on the stack,
39 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 *
41 * Arguments:
42 * eax  system call number
43 * ebx  arg1
44 * ecx  arg2
45 * edx  arg3
46 * esi  arg4
47 * edi  arg5
48 * ebp  user stack
49 * 0(%ebp) arg6
50 */
51SYM_CODE_START(entry_SYSENTER_compat)
52	UNWIND_HINT_ENTRY
53	ENDBR
54	/* Interrupts are off on entry. */
55	swapgs
56
57	pushq	%rax
58	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
59	popq	%rax
60
61	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
62
63	/* Construct struct pt_regs on stack */
64	pushq	$__USER32_DS		/* pt_regs->ss */
65	pushq	$0			/* pt_regs->sp = 0 (placeholder) */
66
67	/*
68	 * Push flags.  This is nasty.  First, interrupts are currently
69	 * off, but we need pt_regs->flags to have IF set.  Second, if TS
70	 * was set in usermode, it's still set, and we're singlestepping
71	 * through this code.  do_SYSENTER_32() will fix up IF.
72	 */
73	pushfq				/* pt_regs->flags (except IF = 0) */
74	pushq	$__USER32_CS		/* pt_regs->cs */
75	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
76SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
77
78	/*
79	 * User tracing code (ptrace or signal handlers) might assume that
80	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
81	 * syscall.  Just in case the high bits are nonzero, zero-extend
82	 * the syscall number.  (This could almost certainly be deleted
83	 * with no ill effects.)
84	 */
85	movl	%eax, %eax
86
87	pushq	%rax			/* pt_regs->orig_ax */
88	PUSH_AND_CLEAR_REGS rax=$-ENOSYS
89	UNWIND_HINT_REGS
90
91	cld
92
93	IBRS_ENTER
94	UNTRAIN_RET
95
96	/*
97	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
98	 * ourselves.  To save a few cycles, we can check whether
99	 * either was set instead of doing an unconditional popfq.
100	 * This needs to happen before enabling interrupts so that
101	 * we don't get preempted with NT set.
102	 *
103	 * If TF is set, we will single-step all the way to here -- do_debug
104	 * will ignore all the traps.  (Yes, this is slow, but so is
105	 * single-stepping in general.  This allows us to avoid having
106	 * a more complicated code to handle the case where a user program
107	 * forces us to single-step through the SYSENTER entry code.)
108	 *
109	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
110	 * out-of-line as an optimization: NT is unlikely to be set in the
111	 * majority of the cases and instead of polluting the I$ unnecessarily,
112	 * we're keeping that code behind a branch which will predict as
113	 * not-taken and therefore its instructions won't be fetched.
114	 */
115	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
116	jnz	.Lsysenter_fix_flags
117.Lsysenter_flags_fixed:
118
119	movq	%rsp, %rdi
120	call	do_SYSENTER_32
121	/* XEN PV guests always use IRET path */
122	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
123		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
124	jmp	sysret32_from_system_call
125
126.Lsysenter_fix_flags:
127	pushq	$X86_EFLAGS_FIXED
128	popfq
129	jmp	.Lsysenter_flags_fixed
130SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
131	ANNOTATE_NOENDBR // is_sysenter_singlestep
132SYM_CODE_END(entry_SYSENTER_compat)
133
134/*
135 * 32-bit SYSCALL entry.
136 *
137 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
138 * on 64-bit kernels running on AMD CPUs.
139 *
140 * The SYSCALL instruction, in principle, should *only* occur in the
141 * vDSO.  In practice, it appears that this really is the case.
142 * As evidence:
143 *
144 *  - The calling convention for SYSCALL has changed several times without
145 *    anyone noticing.
146 *
147 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
148 *    user task that did SYSCALL without immediately reloading SS
149 *    would randomly crash.
150 *
151 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
152 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
153 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
154 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
155 *    opposed to compat mode) is sufficiently poorly designed as to be
156 *    essentially unusable.
157 *
158 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
159 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
160 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
161 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
162 * the stack and does not change RSP.
163 *
164 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
165 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
166 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
167 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
168 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
169 *
170 * Arguments:
171 * eax  system call number
172 * ecx  return address
173 * ebx  arg1
174 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
175 * edx  arg3
176 * esi  arg4
177 * edi  arg5
178 * esp  user stack
179 * 0(%esp) arg6
180 */
181SYM_CODE_START(entry_SYSCALL_compat)
182	UNWIND_HINT_ENTRY
183	ENDBR
184	/* Interrupts are off on entry. */
185	swapgs
186
187	/* Stash user ESP */
188	movl	%esp, %r8d
189
190	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
191	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
192
193	/* Switch to the kernel stack */
194	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
195
196SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
197	ANNOTATE_NOENDBR
198
199	/* Construct struct pt_regs on stack */
200	pushq	$__USER32_DS		/* pt_regs->ss */
201	pushq	%r8			/* pt_regs->sp */
202	pushq	%r11			/* pt_regs->flags */
203	pushq	$__USER32_CS		/* pt_regs->cs */
204	pushq	%rcx			/* pt_regs->ip */
205SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
206	movl	%eax, %eax		/* discard orig_ax high bits */
207	pushq	%rax			/* pt_regs->orig_ax */
208	PUSH_AND_CLEAR_REGS rcx=%rbp rax=$-ENOSYS
209	UNWIND_HINT_REGS
210
211	IBRS_ENTER
212	UNTRAIN_RET
213
214	movq	%rsp, %rdi
215	call	do_fast_syscall_32
216	/* XEN PV guests always use IRET path */
217	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
218		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
219
220	/* Opportunistic SYSRET */
221sysret32_from_system_call:
222	/*
223	 * We are not going to return to userspace from the trampoline
224	 * stack. So let's erase the thread stack right now.
225	 */
226	STACKLEAK_ERASE
227
228	IBRS_EXIT
229
230	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
231	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
232	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
233	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
234	addq	$RAX, %rsp		/* Skip r8-r15 */
235	popq	%rax			/* pt_regs->rax */
236	popq	%rdx			/* Skip pt_regs->cx */
237	popq	%rdx			/* pt_regs->dx */
238	popq	%rsi			/* pt_regs->si */
239	popq	%rdi			/* pt_regs->di */
240
241        /*
242         * USERGS_SYSRET32 does:
243         *  GSBASE = user's GS base
244         *  EIP = ECX
245         *  RFLAGS = R11
246         *  CS = __USER32_CS
247         *  SS = __USER_DS
248         *
249	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
250	 * trampoline that will fix up RCX, so this is okay.
251	 *
252	 * R12-R15 are callee-saved, so they contain whatever was in them
253	 * when the system call started, which is already known to user
254	 * code.  We zero R8-R10 to avoid info leaks.
255         */
256	movq	RSP-ORIG_RAX(%rsp), %rsp
257SYM_INNER_LABEL(entry_SYSRETL_compat_unsafe_stack, SYM_L_GLOBAL)
258	ANNOTATE_NOENDBR
259
260	/*
261	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
262	 * on the process stack which is not mapped to userspace and
263	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
264	 * switch until after after the last reference to the process
265	 * stack.
266	 *
267	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
268	 */
269	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
270
271	xorl	%r8d, %r8d
272	xorl	%r9d, %r9d
273	xorl	%r10d, %r10d
274	swapgs
275	sysretl
276SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL)
277	ANNOTATE_NOENDBR
278	int3
279SYM_CODE_END(entry_SYSCALL_compat)
280
281/*
282 * 32-bit legacy system call entry.
283 *
284 * 32-bit x86 Linux system calls traditionally used the INT $0x80
285 * instruction.  INT $0x80 lands here.
286 *
287 * This entry point can be used by 32-bit and 64-bit programs to perform
288 * 32-bit system calls.  Instances of INT $0x80 can be found inline in
289 * various programs and libraries.  It is also used by the vDSO's
290 * __kernel_vsyscall fallback for hardware that doesn't support a faster
291 * entry method.  Restarted 32-bit system calls also fall back to INT
292 * $0x80 regardless of what instruction was originally used to do the
293 * system call.
294 *
295 * This is considered a slow path.  It is not used by most libc
296 * implementations on modern hardware except during process startup.
297 *
298 * Arguments:
299 * eax  system call number
300 * ebx  arg1
301 * ecx  arg2
302 * edx  arg3
303 * esi  arg4
304 * edi  arg5
305 * ebp  arg6
306 */
307SYM_CODE_START(entry_INT80_compat)
308	UNWIND_HINT_ENTRY
309	ENDBR
310	/*
311	 * Interrupts are off on entry.
312	 */
313	ASM_CLAC			/* Do this early to minimize exposure */
314	SWAPGS
315
316	/*
317	 * User tracing code (ptrace or signal handlers) might assume that
318	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
319	 * syscall.  Just in case the high bits are nonzero, zero-extend
320	 * the syscall number.  (This could almost certainly be deleted
321	 * with no ill effects.)
322	 */
323	movl	%eax, %eax
324
325	/* switch to thread stack expects orig_ax and rdi to be pushed */
326	pushq	%rax			/* pt_regs->orig_ax */
327
328	/* Need to switch before accessing the thread stack. */
329	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
330
331	/* In the Xen PV case we already run on the thread stack. */
332	ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
333
334	movq	%rsp, %rax
335	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
336
337	pushq	5*8(%rax)		/* regs->ss */
338	pushq	4*8(%rax)		/* regs->rsp */
339	pushq	3*8(%rax)		/* regs->eflags */
340	pushq	2*8(%rax)		/* regs->cs */
341	pushq	1*8(%rax)		/* regs->ip */
342	pushq	0*8(%rax)		/* regs->orig_ax */
343.Lint80_keep_stack:
344
345	PUSH_AND_CLEAR_REGS rax=$-ENOSYS
346	UNWIND_HINT_REGS
347
348	cld
349
350	IBRS_ENTER
351	UNTRAIN_RET
352
353	movq	%rsp, %rdi
354	call	do_int80_syscall_32
355	jmp	swapgs_restore_regs_and_return_to_usermode
356SYM_CODE_END(entry_INT80_compat)
357