xref: /openbmc/linux/arch/x86/entry/entry_64_compat.S (revision 407e7517)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include "calling.h"
8#include <asm/asm-offsets.h>
9#include <asm/current.h>
10#include <asm/errno.h>
11#include <asm/ia32_unistd.h>
12#include <asm/thread_info.h>
13#include <asm/segment.h>
14#include <asm/irqflags.h>
15#include <asm/asm.h>
16#include <asm/smap.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20	.section .entry.text, "ax"
21
22/*
23 * 32-bit SYSENTER entry.
24 *
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
27 *
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO.  In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction.  This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
33 *
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
38 *
39 * Arguments:
40 * eax  system call number
41 * ebx  arg1
42 * ecx  arg2
43 * edx  arg3
44 * esi  arg4
45 * edi  arg5
46 * ebp  user stack
47 * 0(%ebp) arg6
48 */
49ENTRY(entry_SYSENTER_compat)
50	/* Interrupts are off on entry. */
51	SWAPGS
52
53	/* We are about to clobber %rsp anyway, clobbering here is OK */
54	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
55
56	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
57
58	/*
59	 * User tracing code (ptrace or signal handlers) might assume that
60	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
61	 * syscall.  Just in case the high bits are nonzero, zero-extend
62	 * the syscall number.  (This could almost certainly be deleted
63	 * with no ill effects.)
64	 */
65	movl	%eax, %eax
66
67	/* Construct struct pt_regs on stack */
68	pushq	$__USER32_DS		/* pt_regs->ss */
69	pushq	%rbp			/* pt_regs->sp (stashed in bp) */
70
71	/*
72	 * Push flags.  This is nasty.  First, interrupts are currently
73	 * off, but we need pt_regs->flags to have IF set.  Second, even
74	 * if TF was set when SYSENTER started, it's clear by now.  We fix
75	 * that later using TIF_SINGLESTEP.
76	 */
77	pushfq				/* pt_regs->flags (except IF = 0) */
78	orl	$X86_EFLAGS_IF, (%rsp)	/* Fix saved flags */
79	pushq	$__USER32_CS		/* pt_regs->cs */
80	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
81	pushq	%rax			/* pt_regs->orig_ax */
82	pushq	%rdi			/* pt_regs->di */
83	pushq	%rsi			/* pt_regs->si */
84	pushq	%rdx			/* pt_regs->dx */
85	pushq	%rcx			/* pt_regs->cx */
86	pushq	$-ENOSYS		/* pt_regs->ax */
87	pushq   $0			/* pt_regs->r8  = 0 */
88	pushq   $0			/* pt_regs->r9  = 0 */
89	pushq   $0			/* pt_regs->r10 = 0 */
90	pushq   $0			/* pt_regs->r11 = 0 */
91	pushq   %rbx                    /* pt_regs->rbx */
92	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
93	pushq   $0			/* pt_regs->r12 = 0 */
94	pushq   $0			/* pt_regs->r13 = 0 */
95	pushq   $0			/* pt_regs->r14 = 0 */
96	pushq   $0			/* pt_regs->r15 = 0 */
97	cld
98
99	/*
100	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
101	 * ourselves.  To save a few cycles, we can check whether
102	 * either was set instead of doing an unconditional popfq.
103	 * This needs to happen before enabling interrupts so that
104	 * we don't get preempted with NT set.
105	 *
106	 * If TF is set, we will single-step all the way to here -- do_debug
107	 * will ignore all the traps.  (Yes, this is slow, but so is
108	 * single-stepping in general.  This allows us to avoid having
109	 * a more complicated code to handle the case where a user program
110	 * forces us to single-step through the SYSENTER entry code.)
111	 *
112	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
113	 * out-of-line as an optimization: NT is unlikely to be set in the
114	 * majority of the cases and instead of polluting the I$ unnecessarily,
115	 * we're keeping that code behind a branch which will predict as
116	 * not-taken and therefore its instructions won't be fetched.
117	 */
118	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
119	jnz	.Lsysenter_fix_flags
120.Lsysenter_flags_fixed:
121
122	/*
123	 * User mode is traced as though IRQs are on, and SYSENTER
124	 * turned them off.
125	 */
126	TRACE_IRQS_OFF
127
128	movq	%rsp, %rdi
129	call	do_fast_syscall_32
130	/* XEN PV guests always use IRET path */
131	ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
132		    "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
133	jmp	sysret32_from_system_call
134
135.Lsysenter_fix_flags:
136	pushq	$X86_EFLAGS_FIXED
137	popfq
138	jmp	.Lsysenter_flags_fixed
139GLOBAL(__end_entry_SYSENTER_compat)
140ENDPROC(entry_SYSENTER_compat)
141
142/*
143 * 32-bit SYSCALL entry.
144 *
145 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
146 * on 64-bit kernels running on AMD CPUs.
147 *
148 * The SYSCALL instruction, in principle, should *only* occur in the
149 * vDSO.  In practice, it appears that this really is the case.
150 * As evidence:
151 *
152 *  - The calling convention for SYSCALL has changed several times without
153 *    anyone noticing.
154 *
155 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
156 *    user task that did SYSCALL without immediately reloading SS
157 *    would randomly crash.
158 *
159 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
160 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
161 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
162 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
163 *    opposed to compat mode) is sufficiently poorly designed as to be
164 *    essentially unusable.
165 *
166 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
167 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
168 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
169 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
170 * the stack and does not change RSP.
171 *
172 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
173 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
174 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
175 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
176 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
177 *
178 * Arguments:
179 * eax  system call number
180 * ecx  return address
181 * ebx  arg1
182 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
183 * edx  arg3
184 * esi  arg4
185 * edi  arg5
186 * esp  user stack
187 * 0(%esp) arg6
188 */
189ENTRY(entry_SYSCALL_compat)
190	/* Interrupts are off on entry. */
191	swapgs
192
193	/* Stash user ESP */
194	movl	%esp, %r8d
195
196	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
197	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
198
199	/* Switch to the kernel stack */
200	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
201
202	/* Construct struct pt_regs on stack */
203	pushq	$__USER32_DS		/* pt_regs->ss */
204	pushq	%r8			/* pt_regs->sp */
205	pushq	%r11			/* pt_regs->flags */
206	pushq	$__USER32_CS		/* pt_regs->cs */
207	pushq	%rcx			/* pt_regs->ip */
208GLOBAL(entry_SYSCALL_compat_after_hwframe)
209	movl	%eax, %eax		/* discard orig_ax high bits */
210	pushq	%rax			/* pt_regs->orig_ax */
211	pushq	%rdi			/* pt_regs->di */
212	pushq	%rsi			/* pt_regs->si */
213	pushq	%rdx			/* pt_regs->dx */
214	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
215	pushq	$-ENOSYS		/* pt_regs->ax */
216	pushq   $0			/* pt_regs->r8  = 0 */
217	pushq   $0			/* pt_regs->r9  = 0 */
218	pushq   $0			/* pt_regs->r10 = 0 */
219	pushq   $0			/* pt_regs->r11 = 0 */
220	pushq   %rbx                    /* pt_regs->rbx */
221	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
222	pushq   $0			/* pt_regs->r12 = 0 */
223	pushq   $0			/* pt_regs->r13 = 0 */
224	pushq   $0			/* pt_regs->r14 = 0 */
225	pushq   $0			/* pt_regs->r15 = 0 */
226
227	/*
228	 * User mode is traced as though IRQs are on, and SYSENTER
229	 * turned them off.
230	 */
231	TRACE_IRQS_OFF
232
233	movq	%rsp, %rdi
234	call	do_fast_syscall_32
235	/* XEN PV guests always use IRET path */
236	ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
237		    "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
238
239	/* Opportunistic SYSRET */
240sysret32_from_system_call:
241	TRACE_IRQS_ON			/* User mode traces as IRQs on. */
242	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
243	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
244	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
245	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
246	addq	$RAX, %rsp		/* Skip r8-r15 */
247	popq	%rax			/* pt_regs->rax */
248	popq	%rdx			/* Skip pt_regs->cx */
249	popq	%rdx			/* pt_regs->dx */
250	popq	%rsi			/* pt_regs->si */
251	popq	%rdi			/* pt_regs->di */
252
253        /*
254         * USERGS_SYSRET32 does:
255         *  GSBASE = user's GS base
256         *  EIP = ECX
257         *  RFLAGS = R11
258         *  CS = __USER32_CS
259         *  SS = __USER_DS
260         *
261	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
262	 * trampoline that will fix up RCX, so this is okay.
263	 *
264	 * R12-R15 are callee-saved, so they contain whatever was in them
265	 * when the system call started, which is already known to user
266	 * code.  We zero R8-R10 to avoid info leaks.
267         */
268	movq	RSP-ORIG_RAX(%rsp), %rsp
269
270	/*
271	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
272	 * on the process stack which is not mapped to userspace and
273	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
274	 * switch until after after the last reference to the process
275	 * stack.
276	 *
277	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
278	 */
279	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
280
281	xorq	%r8, %r8
282	xorq	%r9, %r9
283	xorq	%r10, %r10
284	swapgs
285	sysretl
286END(entry_SYSCALL_compat)
287
288/*
289 * 32-bit legacy system call entry.
290 *
291 * 32-bit x86 Linux system calls traditionally used the INT $0x80
292 * instruction.  INT $0x80 lands here.
293 *
294 * This entry point can be used by 32-bit and 64-bit programs to perform
295 * 32-bit system calls.  Instances of INT $0x80 can be found inline in
296 * various programs and libraries.  It is also used by the vDSO's
297 * __kernel_vsyscall fallback for hardware that doesn't support a faster
298 * entry method.  Restarted 32-bit system calls also fall back to INT
299 * $0x80 regardless of what instruction was originally used to do the
300 * system call.
301 *
302 * This is considered a slow path.  It is not used by most libc
303 * implementations on modern hardware except during process startup.
304 *
305 * Arguments:
306 * eax  system call number
307 * ebx  arg1
308 * ecx  arg2
309 * edx  arg3
310 * esi  arg4
311 * edi  arg5
312 * ebp  arg6
313 */
314ENTRY(entry_INT80_compat)
315	/*
316	 * Interrupts are off on entry.
317	 */
318	ASM_CLAC			/* Do this early to minimize exposure */
319	SWAPGS
320
321	/*
322	 * User tracing code (ptrace or signal handlers) might assume that
323	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
324	 * syscall.  Just in case the high bits are nonzero, zero-extend
325	 * the syscall number.  (This could almost certainly be deleted
326	 * with no ill effects.)
327	 */
328	movl	%eax, %eax
329
330	pushq	%rax			/* pt_regs->orig_ax */
331
332	/* switch to thread stack expects orig_ax to be pushed */
333	call	switch_to_thread_stack
334
335	pushq	%rdi			/* pt_regs->di */
336	pushq	%rsi			/* pt_regs->si */
337	pushq	%rdx			/* pt_regs->dx */
338	pushq	%rcx			/* pt_regs->cx */
339	pushq	$-ENOSYS		/* pt_regs->ax */
340	pushq   $0			/* pt_regs->r8  = 0 */
341	pushq   $0			/* pt_regs->r9  = 0 */
342	pushq   $0			/* pt_regs->r10 = 0 */
343	pushq   $0			/* pt_regs->r11 = 0 */
344	pushq   %rbx                    /* pt_regs->rbx */
345	pushq   %rbp                    /* pt_regs->rbp */
346	pushq   %r12                    /* pt_regs->r12 */
347	pushq   %r13                    /* pt_regs->r13 */
348	pushq   %r14                    /* pt_regs->r14 */
349	pushq   %r15                    /* pt_regs->r15 */
350	cld
351
352	/*
353	 * User mode is traced as though IRQs are on, and the interrupt
354	 * gate turned them off.
355	 */
356	TRACE_IRQS_OFF
357
358	movq	%rsp, %rdi
359	call	do_int80_syscall_32
360.Lsyscall_32_done:
361
362	/* Go back to user mode. */
363	TRACE_IRQS_ON
364	jmp	swapgs_restore_regs_and_return_to_usermode
365END(entry_INT80_compat)
366
367ENTRY(stub32_clone)
368	/*
369	 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr).
370	 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val).
371	 *
372	 * The native 64-bit kernel's sys_clone() implements the latter,
373	 * so we need to swap arguments here before calling it:
374	 */
375	xchg	%r8, %rcx
376	jmp	sys_clone
377ENDPROC(stub32_clone)
378