1/* 2 * linux/arch/x86_64/entry.S 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * 8 * entry.S contains the system-call and fault low-level handling routines. 9 * 10 * Some of this is documented in Documentation/x86/entry_64.txt 11 * 12 * A note on terminology: 13 * - iret frame: Architecture defined interrupt frame from SS to RIP 14 * at the top of the kernel process stack. 15 * 16 * Some macro usage: 17 * - ENTRY/END: Define functions in the symbol table. 18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 19 * - idtentry: Define exception entry points. 20 */ 21#include <linux/linkage.h> 22#include <asm/segment.h> 23#include <asm/cache.h> 24#include <asm/errno.h> 25#include "calling.h" 26#include <asm/asm-offsets.h> 27#include <asm/msr.h> 28#include <asm/unistd.h> 29#include <asm/thread_info.h> 30#include <asm/hw_irq.h> 31#include <asm/page_types.h> 32#include <asm/irqflags.h> 33#include <asm/paravirt.h> 34#include <asm/percpu.h> 35#include <asm/asm.h> 36#include <asm/smap.h> 37#include <asm/pgtable_types.h> 38#include <asm/export.h> 39#include <linux/err.h> 40 41.code64 42.section .entry.text, "ax" 43 44#ifdef CONFIG_PARAVIRT 45ENTRY(native_usergs_sysret64) 46 swapgs 47 sysretq 48ENDPROC(native_usergs_sysret64) 49#endif /* CONFIG_PARAVIRT */ 50 51.macro TRACE_IRQS_IRETQ 52#ifdef CONFIG_TRACE_IRQFLAGS 53 bt $9, EFLAGS(%rsp) /* interrupts off? */ 54 jnc 1f 55 TRACE_IRQS_ON 561: 57#endif 58.endm 59 60/* 61 * When dynamic function tracer is enabled it will add a breakpoint 62 * to all locations that it is about to modify, sync CPUs, update 63 * all the code, sync CPUs, then remove the breakpoints. In this time 64 * if lockdep is enabled, it might jump back into the debug handler 65 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 66 * 67 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 68 * make sure the stack pointer does not get reset back to the top 69 * of the debug stack, and instead just reuses the current stack. 70 */ 71#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 72 73.macro TRACE_IRQS_OFF_DEBUG 74 call debug_stack_set_zero 75 TRACE_IRQS_OFF 76 call debug_stack_reset 77.endm 78 79.macro TRACE_IRQS_ON_DEBUG 80 call debug_stack_set_zero 81 TRACE_IRQS_ON 82 call debug_stack_reset 83.endm 84 85.macro TRACE_IRQS_IRETQ_DEBUG 86 bt $9, EFLAGS(%rsp) /* interrupts off? */ 87 jnc 1f 88 TRACE_IRQS_ON_DEBUG 891: 90.endm 91 92#else 93# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 94# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 95# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 96#endif 97 98/* 99 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 100 * 101 * This is the only entry point used for 64-bit system calls. The 102 * hardware interface is reasonably well designed and the register to 103 * argument mapping Linux uses fits well with the registers that are 104 * available when SYSCALL is used. 105 * 106 * SYSCALL instructions can be found inlined in libc implementations as 107 * well as some other programs and libraries. There are also a handful 108 * of SYSCALL instructions in the vDSO used, for example, as a 109 * clock_gettimeofday fallback. 110 * 111 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 112 * then loads new ss, cs, and rip from previously programmed MSRs. 113 * rflags gets masked by a value from another MSR (so CLD and CLAC 114 * are not needed). SYSCALL does not save anything on the stack 115 * and does not change rsp. 116 * 117 * Registers on entry: 118 * rax system call number 119 * rcx return address 120 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 121 * rdi arg0 122 * rsi arg1 123 * rdx arg2 124 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 125 * r8 arg4 126 * r9 arg5 127 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 128 * 129 * Only called from user space. 130 * 131 * When user can change pt_regs->foo always force IRET. That is because 132 * it deals with uncanonical addresses better. SYSRET has trouble 133 * with them due to bugs in both AMD and Intel CPUs. 134 */ 135 136ENTRY(entry_SYSCALL_64) 137 /* 138 * Interrupts are off on entry. 139 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 140 * it is too small to ever cause noticeable irq latency. 141 */ 142 SWAPGS_UNSAFE_STACK 143 /* 144 * A hypervisor implementation might want to use a label 145 * after the swapgs, so that it can do the swapgs 146 * for the guest and jump here on syscall. 147 */ 148GLOBAL(entry_SYSCALL_64_after_swapgs) 149 150 movq %rsp, PER_CPU_VAR(rsp_scratch) 151 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 152 153 TRACE_IRQS_OFF 154 155 /* Construct struct pt_regs on stack */ 156 pushq $__USER_DS /* pt_regs->ss */ 157 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 158 pushq %r11 /* pt_regs->flags */ 159 pushq $__USER_CS /* pt_regs->cs */ 160 pushq %rcx /* pt_regs->ip */ 161 pushq %rax /* pt_regs->orig_ax */ 162 pushq %rdi /* pt_regs->di */ 163 pushq %rsi /* pt_regs->si */ 164 pushq %rdx /* pt_regs->dx */ 165 pushq %rcx /* pt_regs->cx */ 166 pushq $-ENOSYS /* pt_regs->ax */ 167 pushq %r8 /* pt_regs->r8 */ 168 pushq %r9 /* pt_regs->r9 */ 169 pushq %r10 /* pt_regs->r10 */ 170 pushq %r11 /* pt_regs->r11 */ 171 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 172 173 /* 174 * If we need to do entry work or if we guess we'll need to do 175 * exit work, go straight to the slow path. 176 */ 177 movq PER_CPU_VAR(current_task), %r11 178 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 179 jnz entry_SYSCALL64_slow_path 180 181entry_SYSCALL_64_fastpath: 182 /* 183 * Easy case: enable interrupts and issue the syscall. If the syscall 184 * needs pt_regs, we'll call a stub that disables interrupts again 185 * and jumps to the slow path. 186 */ 187 TRACE_IRQS_ON 188 ENABLE_INTERRUPTS(CLBR_NONE) 189#if __SYSCALL_MASK == ~0 190 cmpq $__NR_syscall_max, %rax 191#else 192 andl $__SYSCALL_MASK, %eax 193 cmpl $__NR_syscall_max, %eax 194#endif 195 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 196 movq %r10, %rcx 197 198 /* 199 * This call instruction is handled specially in stub_ptregs_64. 200 * It might end up jumping to the slow path. If it jumps, RAX 201 * and all argument registers are clobbered. 202 */ 203 call *sys_call_table(, %rax, 8) 204.Lentry_SYSCALL_64_after_fastpath_call: 205 206 movq %rax, RAX(%rsp) 2071: 208 209 /* 210 * If we get here, then we know that pt_regs is clean for SYSRET64. 211 * If we see that no exit work is required (which we are required 212 * to check with IRQs off), then we can go straight to SYSRET64. 213 */ 214 DISABLE_INTERRUPTS(CLBR_ANY) 215 TRACE_IRQS_OFF 216 movq PER_CPU_VAR(current_task), %r11 217 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 218 jnz 1f 219 220 LOCKDEP_SYS_EXIT 221 TRACE_IRQS_ON /* user mode is traced as IRQs on */ 222 movq RIP(%rsp), %rcx 223 movq EFLAGS(%rsp), %r11 224 RESTORE_C_REGS_EXCEPT_RCX_R11 225 movq RSP(%rsp), %rsp 226 USERGS_SYSRET64 227 2281: 229 /* 230 * The fast path looked good when we started, but something changed 231 * along the way and we need to switch to the slow path. Calling 232 * raise(3) will trigger this, for example. IRQs are off. 233 */ 234 TRACE_IRQS_ON 235 ENABLE_INTERRUPTS(CLBR_ANY) 236 SAVE_EXTRA_REGS 237 movq %rsp, %rdi 238 call syscall_return_slowpath /* returns with IRQs disabled */ 239 jmp return_from_SYSCALL_64 240 241entry_SYSCALL64_slow_path: 242 /* IRQs are off. */ 243 SAVE_EXTRA_REGS 244 movq %rsp, %rdi 245 call do_syscall_64 /* returns with IRQs disabled */ 246 247return_from_SYSCALL_64: 248 RESTORE_EXTRA_REGS 249 TRACE_IRQS_IRETQ /* we're about to change IF */ 250 251 /* 252 * Try to use SYSRET instead of IRET if we're returning to 253 * a completely clean 64-bit userspace context. 254 */ 255 movq RCX(%rsp), %rcx 256 movq RIP(%rsp), %r11 257 cmpq %rcx, %r11 /* RCX == RIP */ 258 jne opportunistic_sysret_failed 259 260 /* 261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 262 * in kernel space. This essentially lets the user take over 263 * the kernel, since userspace controls RSP. 264 * 265 * If width of "canonical tail" ever becomes variable, this will need 266 * to be updated to remain correct on both old and new CPUs. 267 * 268 * Change top 16 bits to be the sign-extension of 47th bit 269 */ 270 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 271 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 272 273 /* If this changed %rcx, it was not canonical */ 274 cmpq %rcx, %r11 275 jne opportunistic_sysret_failed 276 277 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 278 jne opportunistic_sysret_failed 279 280 movq R11(%rsp), %r11 281 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 282 jne opportunistic_sysret_failed 283 284 /* 285 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot 286 * restore RF properly. If the slowpath sets it for whatever reason, we 287 * need to restore it correctly. 288 * 289 * SYSRET can restore TF, but unlike IRET, restoring TF results in a 290 * trap from userspace immediately after SYSRET. This would cause an 291 * infinite loop whenever #DB happens with register state that satisfies 292 * the opportunistic SYSRET conditions. For example, single-stepping 293 * this user code: 294 * 295 * movq $stuck_here, %rcx 296 * pushfq 297 * popq %r11 298 * stuck_here: 299 * 300 * would never get past 'stuck_here'. 301 */ 302 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 303 jnz opportunistic_sysret_failed 304 305 /* nothing to check for RSP */ 306 307 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 308 jne opportunistic_sysret_failed 309 310 /* 311 * We win! This label is here just for ease of understanding 312 * perf profiles. Nothing jumps here. 313 */ 314syscall_return_via_sysret: 315 /* rcx and r11 are already restored (see code above) */ 316 RESTORE_C_REGS_EXCEPT_RCX_R11 317 movq RSP(%rsp), %rsp 318 USERGS_SYSRET64 319 320opportunistic_sysret_failed: 321 SWAPGS 322 jmp restore_c_regs_and_iret 323END(entry_SYSCALL_64) 324 325ENTRY(stub_ptregs_64) 326 /* 327 * Syscalls marked as needing ptregs land here. 328 * If we are on the fast path, we need to save the extra regs, 329 * which we achieve by trying again on the slow path. If we are on 330 * the slow path, the extra regs are already saved. 331 * 332 * RAX stores a pointer to the C function implementing the syscall. 333 * IRQs are on. 334 */ 335 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp) 336 jne 1f 337 338 /* 339 * Called from fast path -- disable IRQs again, pop return address 340 * and jump to slow path 341 */ 342 DISABLE_INTERRUPTS(CLBR_ANY) 343 TRACE_IRQS_OFF 344 popq %rax 345 jmp entry_SYSCALL64_slow_path 346 3471: 348 jmp *%rax /* Called from C */ 349END(stub_ptregs_64) 350 351.macro ptregs_stub func 352ENTRY(ptregs_\func) 353 leaq \func(%rip), %rax 354 jmp stub_ptregs_64 355END(ptregs_\func) 356.endm 357 358/* Instantiate ptregs_stub for each ptregs-using syscall */ 359#define __SYSCALL_64_QUAL_(sym) 360#define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym 361#define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym) 362#include <asm/syscalls_64.h> 363 364/* 365 * %rdi: prev task 366 * %rsi: next task 367 */ 368ENTRY(__switch_to_asm) 369 /* 370 * Save callee-saved registers 371 * This must match the order in inactive_task_frame 372 */ 373 pushq %rbp 374 pushq %rbx 375 pushq %r12 376 pushq %r13 377 pushq %r14 378 pushq %r15 379 380 /* switch stack */ 381 movq %rsp, TASK_threadsp(%rdi) 382 movq TASK_threadsp(%rsi), %rsp 383 384#ifdef CONFIG_CC_STACKPROTECTOR 385 movq TASK_stack_canary(%rsi), %rbx 386 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset 387#endif 388 389 /* restore callee-saved registers */ 390 popq %r15 391 popq %r14 392 popq %r13 393 popq %r12 394 popq %rbx 395 popq %rbp 396 397 jmp __switch_to 398END(__switch_to_asm) 399 400/* 401 * A newly forked process directly context switches into this address. 402 * 403 * rax: prev task we switched from 404 * rbx: kernel thread func (NULL for user thread) 405 * r12: kernel thread arg 406 */ 407ENTRY(ret_from_fork) 408 movq %rax, %rdi 409 call schedule_tail /* rdi: 'prev' task parameter */ 410 411 testq %rbx, %rbx /* from kernel_thread? */ 412 jnz 1f /* kernel threads are uncommon */ 413 4142: 415 movq %rsp, %rdi 416 call syscall_return_slowpath /* returns with IRQs disabled */ 417 TRACE_IRQS_ON /* user mode is traced as IRQS on */ 418 SWAPGS 419 jmp restore_regs_and_iret 420 4211: 422 /* kernel thread */ 423 movq %r12, %rdi 424 call *%rbx 425 /* 426 * A kernel thread is allowed to return here after successfully 427 * calling do_execve(). Exit to userspace to complete the execve() 428 * syscall. 429 */ 430 movq $0, RAX(%rsp) 431 jmp 2b 432END(ret_from_fork) 433 434/* 435 * Build the entry stubs with some assembler magic. 436 * We pack 1 stub into every 8-byte block. 437 */ 438 .align 8 439ENTRY(irq_entries_start) 440 vector=FIRST_EXTERNAL_VECTOR 441 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 442 pushq $(~vector+0x80) /* Note: always in signed byte range */ 443 vector=vector+1 444 jmp common_interrupt 445 .align 8 446 .endr 447END(irq_entries_start) 448 449/* 450 * Interrupt entry/exit. 451 * 452 * Interrupt entry points save only callee clobbered registers in fast path. 453 * 454 * Entry runs with interrupts off. 455 */ 456 457/* 0(%rsp): ~(interrupt number) */ 458 .macro interrupt func 459 cld 460 ALLOC_PT_GPREGS_ON_STACK 461 SAVE_C_REGS 462 SAVE_EXTRA_REGS 463 ENCODE_FRAME_POINTER 464 465 testb $3, CS(%rsp) 466 jz 1f 467 468 /* 469 * IRQ from user mode. Switch to kernel gsbase and inform context 470 * tracking that we're in kernel mode. 471 */ 472 SWAPGS 473 474 /* 475 * We need to tell lockdep that IRQs are off. We can't do this until 476 * we fix gsbase, and we should do it before enter_from_user_mode 477 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 478 * the simplest way to handle it is to just call it twice if 479 * we enter from user mode. There's no reason to optimize this since 480 * TRACE_IRQS_OFF is a no-op if lockdep is off. 481 */ 482 TRACE_IRQS_OFF 483 484 CALL_enter_from_user_mode 485 4861: 487 /* 488 * Save previous stack pointer, optionally switch to interrupt stack. 489 * irq_count is used to check if a CPU is already on an interrupt stack 490 * or not. While this is essentially redundant with preempt_count it is 491 * a little cheaper to use a separate counter in the PDA (short of 492 * moving irq_enter into assembly, which would be too much work) 493 */ 494 movq %rsp, %rdi 495 incl PER_CPU_VAR(irq_count) 496 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 497 pushq %rdi 498 /* We entered an interrupt context - irqs are off: */ 499 TRACE_IRQS_OFF 500 501 call \func /* rdi points to pt_regs */ 502 .endm 503 504 /* 505 * The interrupt stubs push (~vector+0x80) onto the stack and 506 * then jump to common_interrupt. 507 */ 508 .p2align CONFIG_X86_L1_CACHE_SHIFT 509common_interrupt: 510 ASM_CLAC 511 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 512 interrupt do_IRQ 513 /* 0(%rsp): old RSP */ 514ret_from_intr: 515 DISABLE_INTERRUPTS(CLBR_ANY) 516 TRACE_IRQS_OFF 517 decl PER_CPU_VAR(irq_count) 518 519 /* Restore saved previous stack */ 520 popq %rsp 521 522 testb $3, CS(%rsp) 523 jz retint_kernel 524 525 /* Interrupt came from user space */ 526GLOBAL(retint_user) 527 mov %rsp,%rdi 528 call prepare_exit_to_usermode 529 TRACE_IRQS_IRETQ 530 SWAPGS 531 jmp restore_regs_and_iret 532 533/* Returning to kernel space */ 534retint_kernel: 535#ifdef CONFIG_PREEMPT 536 /* Interrupts are off */ 537 /* Check if we need preemption */ 538 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 539 jnc 1f 5400: cmpl $0, PER_CPU_VAR(__preempt_count) 541 jnz 1f 542 call preempt_schedule_irq 543 jmp 0b 5441: 545#endif 546 /* 547 * The iretq could re-enable interrupts: 548 */ 549 TRACE_IRQS_IRETQ 550 551/* 552 * At this label, code paths which return to kernel and to user, 553 * which come from interrupts/exception and from syscalls, merge. 554 */ 555GLOBAL(restore_regs_and_iret) 556 RESTORE_EXTRA_REGS 557restore_c_regs_and_iret: 558 RESTORE_C_REGS 559 REMOVE_PT_GPREGS_FROM_STACK 8 560 INTERRUPT_RETURN 561 562ENTRY(native_iret) 563 /* 564 * Are we returning to a stack segment from the LDT? Note: in 565 * 64-bit mode SS:RSP on the exception stack is always valid. 566 */ 567#ifdef CONFIG_X86_ESPFIX64 568 testb $4, (SS-RIP)(%rsp) 569 jnz native_irq_return_ldt 570#endif 571 572.global native_irq_return_iret 573native_irq_return_iret: 574 /* 575 * This may fault. Non-paranoid faults on return to userspace are 576 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 577 * Double-faults due to espfix64 are handled in do_double_fault. 578 * Other faults here are fatal. 579 */ 580 iretq 581 582#ifdef CONFIG_X86_ESPFIX64 583native_irq_return_ldt: 584 /* 585 * We are running with user GSBASE. All GPRs contain their user 586 * values. We have a percpu ESPFIX stack that is eight slots 587 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom 588 * of the ESPFIX stack. 589 * 590 * We clobber RAX and RDI in this code. We stash RDI on the 591 * normal stack and RAX on the ESPFIX stack. 592 * 593 * The ESPFIX stack layout we set up looks like this: 594 * 595 * --- top of ESPFIX stack --- 596 * SS 597 * RSP 598 * RFLAGS 599 * CS 600 * RIP <-- RSP points here when we're done 601 * RAX <-- espfix_waddr points here 602 * --- bottom of ESPFIX stack --- 603 */ 604 605 pushq %rdi /* Stash user RDI */ 606 SWAPGS 607 movq PER_CPU_VAR(espfix_waddr), %rdi 608 movq %rax, (0*8)(%rdi) /* user RAX */ 609 movq (1*8)(%rsp), %rax /* user RIP */ 610 movq %rax, (1*8)(%rdi) 611 movq (2*8)(%rsp), %rax /* user CS */ 612 movq %rax, (2*8)(%rdi) 613 movq (3*8)(%rsp), %rax /* user RFLAGS */ 614 movq %rax, (3*8)(%rdi) 615 movq (5*8)(%rsp), %rax /* user SS */ 616 movq %rax, (5*8)(%rdi) 617 movq (4*8)(%rsp), %rax /* user RSP */ 618 movq %rax, (4*8)(%rdi) 619 /* Now RAX == RSP. */ 620 621 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */ 622 popq %rdi /* Restore user RDI */ 623 624 /* 625 * espfix_stack[31:16] == 0. The page tables are set up such that 626 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of 627 * espfix_waddr for any X. That is, there are 65536 RO aliases of 628 * the same page. Set up RSP so that RSP[31:16] contains the 629 * respective 16 bits of the /userspace/ RSP and RSP nonetheless 630 * still points to an RO alias of the ESPFIX stack. 631 */ 632 orq PER_CPU_VAR(espfix_stack), %rax 633 SWAPGS 634 movq %rax, %rsp 635 636 /* 637 * At this point, we cannot write to the stack any more, but we can 638 * still read. 639 */ 640 popq %rax /* Restore user RAX */ 641 642 /* 643 * RSP now points to an ordinary IRET frame, except that the page 644 * is read-only and RSP[31:16] are preloaded with the userspace 645 * values. We can now IRET back to userspace. 646 */ 647 jmp native_irq_return_iret 648#endif 649END(common_interrupt) 650 651/* 652 * APIC interrupts. 653 */ 654.macro apicinterrupt3 num sym do_sym 655ENTRY(\sym) 656 ASM_CLAC 657 pushq $~(\num) 658.Lcommon_\sym: 659 interrupt \do_sym 660 jmp ret_from_intr 661END(\sym) 662.endm 663 664#ifdef CONFIG_TRACING 665#define trace(sym) trace_##sym 666#define smp_trace(sym) smp_trace_##sym 667 668.macro trace_apicinterrupt num sym 669apicinterrupt3 \num trace(\sym) smp_trace(\sym) 670.endm 671#else 672.macro trace_apicinterrupt num sym do_sym 673.endm 674#endif 675 676/* Make sure APIC interrupt handlers end up in the irqentry section: */ 677#if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN) 678# define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax" 679# define POP_SECTION_IRQENTRY .popsection 680#else 681# define PUSH_SECTION_IRQENTRY 682# define POP_SECTION_IRQENTRY 683#endif 684 685.macro apicinterrupt num sym do_sym 686PUSH_SECTION_IRQENTRY 687apicinterrupt3 \num \sym \do_sym 688trace_apicinterrupt \num \sym 689POP_SECTION_IRQENTRY 690.endm 691 692#ifdef CONFIG_SMP 693apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 694apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 695#endif 696 697#ifdef CONFIG_X86_UV 698apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 699#endif 700 701apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 702apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 703 704#ifdef CONFIG_HAVE_KVM 705apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 706apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 707#endif 708 709#ifdef CONFIG_X86_MCE_THRESHOLD 710apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 711#endif 712 713#ifdef CONFIG_X86_MCE_AMD 714apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 715#endif 716 717#ifdef CONFIG_X86_THERMAL_VECTOR 718apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 719#endif 720 721#ifdef CONFIG_SMP 722apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 723apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 724apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 725#endif 726 727apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 728apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 729 730#ifdef CONFIG_IRQ_WORK 731apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 732#endif 733 734/* 735 * Exception entry points. 736 */ 737#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) 738 739.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 740ENTRY(\sym) 741 /* Sanity check */ 742 .if \shift_ist != -1 && \paranoid == 0 743 .error "using shift_ist requires paranoid=1" 744 .endif 745 746 ASM_CLAC 747 PARAVIRT_ADJUST_EXCEPTION_FRAME 748 749 .ifeq \has_error_code 750 pushq $-1 /* ORIG_RAX: no syscall to restart */ 751 .endif 752 753 ALLOC_PT_GPREGS_ON_STACK 754 755 .if \paranoid 756 .if \paranoid == 1 757 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 758 jnz 1f 759 .endif 760 call paranoid_entry 761 .else 762 call error_entry 763 .endif 764 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 765 766 .if \paranoid 767 .if \shift_ist != -1 768 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 769 .else 770 TRACE_IRQS_OFF 771 .endif 772 .endif 773 774 movq %rsp, %rdi /* pt_regs pointer */ 775 776 .if \has_error_code 777 movq ORIG_RAX(%rsp), %rsi /* get error code */ 778 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 779 .else 780 xorl %esi, %esi /* no error code */ 781 .endif 782 783 .if \shift_ist != -1 784 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 785 .endif 786 787 call \do_sym 788 789 .if \shift_ist != -1 790 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 791 .endif 792 793 /* these procedures expect "no swapgs" flag in ebx */ 794 .if \paranoid 795 jmp paranoid_exit 796 .else 797 jmp error_exit 798 .endif 799 800 .if \paranoid == 1 801 /* 802 * Paranoid entry from userspace. Switch stacks and treat it 803 * as a normal entry. This means that paranoid handlers 804 * run in real process context if user_mode(regs). 805 */ 8061: 807 call error_entry 808 809 810 movq %rsp, %rdi /* pt_regs pointer */ 811 call sync_regs 812 movq %rax, %rsp /* switch stack */ 813 814 movq %rsp, %rdi /* pt_regs pointer */ 815 816 .if \has_error_code 817 movq ORIG_RAX(%rsp), %rsi /* get error code */ 818 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 819 .else 820 xorl %esi, %esi /* no error code */ 821 .endif 822 823 call \do_sym 824 825 jmp error_exit /* %ebx: no swapgs flag */ 826 .endif 827END(\sym) 828.endm 829 830#ifdef CONFIG_TRACING 831.macro trace_idtentry sym do_sym has_error_code:req 832idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code 833idtentry \sym \do_sym has_error_code=\has_error_code 834.endm 835#else 836.macro trace_idtentry sym do_sym has_error_code:req 837idtentry \sym \do_sym has_error_code=\has_error_code 838.endm 839#endif 840 841idtentry divide_error do_divide_error has_error_code=0 842idtentry overflow do_overflow has_error_code=0 843idtentry bounds do_bounds has_error_code=0 844idtentry invalid_op do_invalid_op has_error_code=0 845idtentry device_not_available do_device_not_available has_error_code=0 846idtentry double_fault do_double_fault has_error_code=1 paranoid=2 847idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 848idtentry invalid_TSS do_invalid_TSS has_error_code=1 849idtentry segment_not_present do_segment_not_present has_error_code=1 850idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 851idtentry coprocessor_error do_coprocessor_error has_error_code=0 852idtentry alignment_check do_alignment_check has_error_code=1 853idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 854 855 856 /* 857 * Reload gs selector with exception handling 858 * edi: new selector 859 */ 860ENTRY(native_load_gs_index) 861 pushfq 862 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 863 SWAPGS 864.Lgs_change: 865 movl %edi, %gs 8662: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE 867 SWAPGS 868 popfq 869 ret 870END(native_load_gs_index) 871EXPORT_SYMBOL(native_load_gs_index) 872 873 _ASM_EXTABLE(.Lgs_change, bad_gs) 874 .section .fixup, "ax" 875 /* running with kernelgs */ 876bad_gs: 877 SWAPGS /* switch back to user gs */ 878.macro ZAP_GS 879 /* This can't be a string because the preprocessor needs to see it. */ 880 movl $__USER_DS, %eax 881 movl %eax, %gs 882.endm 883 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG 884 xorl %eax, %eax 885 movl %eax, %gs 886 jmp 2b 887 .previous 888 889/* Call softirq on interrupt stack. Interrupts are off. */ 890ENTRY(do_softirq_own_stack) 891 pushq %rbp 892 mov %rsp, %rbp 893 incl PER_CPU_VAR(irq_count) 894 cmove PER_CPU_VAR(irq_stack_ptr), %rsp 895 push %rbp /* frame pointer backlink */ 896 call __do_softirq 897 leaveq 898 decl PER_CPU_VAR(irq_count) 899 ret 900END(do_softirq_own_stack) 901 902#ifdef CONFIG_XEN 903idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 904 905/* 906 * A note on the "critical region" in our callback handler. 907 * We want to avoid stacking callback handlers due to events occurring 908 * during handling of the last event. To do this, we keep events disabled 909 * until we've done all processing. HOWEVER, we must enable events before 910 * popping the stack frame (can't be done atomically) and so it would still 911 * be possible to get enough handler activations to overflow the stack. 912 * Although unlikely, bugs of that kind are hard to track down, so we'd 913 * like to avoid the possibility. 914 * So, on entry to the handler we detect whether we interrupted an 915 * existing activation in its critical region -- if so, we pop the current 916 * activation and restart the handler using the previous one. 917 */ 918ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 919 920/* 921 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 922 * see the correct pointer to the pt_regs 923 */ 924 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 92511: incl PER_CPU_VAR(irq_count) 926 movq %rsp, %rbp 927 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 928 pushq %rbp /* frame pointer backlink */ 929 call xen_evtchn_do_upcall 930 popq %rsp 931 decl PER_CPU_VAR(irq_count) 932#ifndef CONFIG_PREEMPT 933 call xen_maybe_preempt_hcall 934#endif 935 jmp error_exit 936END(xen_do_hypervisor_callback) 937 938/* 939 * Hypervisor uses this for application faults while it executes. 940 * We get here for two reasons: 941 * 1. Fault while reloading DS, ES, FS or GS 942 * 2. Fault while executing IRET 943 * Category 1 we do not need to fix up as Xen has already reloaded all segment 944 * registers that could be reloaded and zeroed the others. 945 * Category 2 we fix up by killing the current process. We cannot use the 946 * normal Linux return path in this case because if we use the IRET hypercall 947 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 948 * We distinguish between categories by comparing each saved segment register 949 * with its current contents: any discrepancy means we in category 1. 950 */ 951ENTRY(xen_failsafe_callback) 952 movl %ds, %ecx 953 cmpw %cx, 0x10(%rsp) 954 jne 1f 955 movl %es, %ecx 956 cmpw %cx, 0x18(%rsp) 957 jne 1f 958 movl %fs, %ecx 959 cmpw %cx, 0x20(%rsp) 960 jne 1f 961 movl %gs, %ecx 962 cmpw %cx, 0x28(%rsp) 963 jne 1f 964 /* All segments match their saved values => Category 2 (Bad IRET). */ 965 movq (%rsp), %rcx 966 movq 8(%rsp), %r11 967 addq $0x30, %rsp 968 pushq $0 /* RIP */ 969 pushq %r11 970 pushq %rcx 971 jmp general_protection 9721: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 973 movq (%rsp), %rcx 974 movq 8(%rsp), %r11 975 addq $0x30, %rsp 976 pushq $-1 /* orig_ax = -1 => not a system call */ 977 ALLOC_PT_GPREGS_ON_STACK 978 SAVE_C_REGS 979 SAVE_EXTRA_REGS 980 ENCODE_FRAME_POINTER 981 jmp error_exit 982END(xen_failsafe_callback) 983 984apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 985 xen_hvm_callback_vector xen_evtchn_do_upcall 986 987#endif /* CONFIG_XEN */ 988 989#if IS_ENABLED(CONFIG_HYPERV) 990apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 991 hyperv_callback_vector hyperv_vector_handler 992#endif /* CONFIG_HYPERV */ 993 994idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 995idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 996idtentry stack_segment do_stack_segment has_error_code=1 997 998#ifdef CONFIG_XEN 999idtentry xen_debug do_debug has_error_code=0 1000idtentry xen_int3 do_int3 has_error_code=0 1001idtentry xen_stack_segment do_stack_segment has_error_code=1 1002#endif 1003 1004idtentry general_protection do_general_protection has_error_code=1 1005trace_idtentry page_fault do_page_fault has_error_code=1 1006 1007#ifdef CONFIG_KVM_GUEST 1008idtentry async_page_fault do_async_page_fault has_error_code=1 1009#endif 1010 1011#ifdef CONFIG_X86_MCE 1012idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 1013#endif 1014 1015/* 1016 * Save all registers in pt_regs, and switch gs if needed. 1017 * Use slow, but surefire "are we in kernel?" check. 1018 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 1019 */ 1020ENTRY(paranoid_entry) 1021 cld 1022 SAVE_C_REGS 8 1023 SAVE_EXTRA_REGS 8 1024 ENCODE_FRAME_POINTER 8 1025 movl $1, %ebx 1026 movl $MSR_GS_BASE, %ecx 1027 rdmsr 1028 testl %edx, %edx 1029 js 1f /* negative -> in kernel */ 1030 SWAPGS 1031 xorl %ebx, %ebx 10321: ret 1033END(paranoid_entry) 1034 1035/* 1036 * "Paranoid" exit path from exception stack. This is invoked 1037 * only on return from non-NMI IST interrupts that came 1038 * from kernel space. 1039 * 1040 * We may be returning to very strange contexts (e.g. very early 1041 * in syscall entry), so checking for preemption here would 1042 * be complicated. Fortunately, we there's no good reason 1043 * to try to handle preemption here. 1044 * 1045 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1046 */ 1047ENTRY(paranoid_exit) 1048 DISABLE_INTERRUPTS(CLBR_ANY) 1049 TRACE_IRQS_OFF_DEBUG 1050 testl %ebx, %ebx /* swapgs needed? */ 1051 jnz paranoid_exit_no_swapgs 1052 TRACE_IRQS_IRETQ 1053 SWAPGS_UNSAFE_STACK 1054 jmp paranoid_exit_restore 1055paranoid_exit_no_swapgs: 1056 TRACE_IRQS_IRETQ_DEBUG 1057paranoid_exit_restore: 1058 RESTORE_EXTRA_REGS 1059 RESTORE_C_REGS 1060 REMOVE_PT_GPREGS_FROM_STACK 8 1061 INTERRUPT_RETURN 1062END(paranoid_exit) 1063 1064/* 1065 * Save all registers in pt_regs, and switch gs if needed. 1066 * Return: EBX=0: came from user mode; EBX=1: otherwise 1067 */ 1068ENTRY(error_entry) 1069 cld 1070 SAVE_C_REGS 8 1071 SAVE_EXTRA_REGS 8 1072 ENCODE_FRAME_POINTER 8 1073 xorl %ebx, %ebx 1074 testb $3, CS+8(%rsp) 1075 jz .Lerror_kernelspace 1076 1077 /* 1078 * We entered from user mode or we're pretending to have entered 1079 * from user mode due to an IRET fault. 1080 */ 1081 SWAPGS 1082 1083.Lerror_entry_from_usermode_after_swapgs: 1084 /* 1085 * We need to tell lockdep that IRQs are off. We can't do this until 1086 * we fix gsbase, and we should do it before enter_from_user_mode 1087 * (which can take locks). 1088 */ 1089 TRACE_IRQS_OFF 1090 CALL_enter_from_user_mode 1091 ret 1092 1093.Lerror_entry_done: 1094 TRACE_IRQS_OFF 1095 ret 1096 1097 /* 1098 * There are two places in the kernel that can potentially fault with 1099 * usergs. Handle them here. B stepping K8s sometimes report a 1100 * truncated RIP for IRET exceptions returning to compat mode. Check 1101 * for these here too. 1102 */ 1103.Lerror_kernelspace: 1104 incl %ebx 1105 leaq native_irq_return_iret(%rip), %rcx 1106 cmpq %rcx, RIP+8(%rsp) 1107 je .Lerror_bad_iret 1108 movl %ecx, %eax /* zero extend */ 1109 cmpq %rax, RIP+8(%rsp) 1110 je .Lbstep_iret 1111 cmpq $.Lgs_change, RIP+8(%rsp) 1112 jne .Lerror_entry_done 1113 1114 /* 1115 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up 1116 * gsbase and proceed. We'll fix up the exception and land in 1117 * .Lgs_change's error handler with kernel gsbase. 1118 */ 1119 SWAPGS 1120 jmp .Lerror_entry_done 1121 1122.Lbstep_iret: 1123 /* Fix truncated RIP */ 1124 movq %rcx, RIP+8(%rsp) 1125 /* fall through */ 1126 1127.Lerror_bad_iret: 1128 /* 1129 * We came from an IRET to user mode, so we have user gsbase. 1130 * Switch to kernel gsbase: 1131 */ 1132 SWAPGS 1133 1134 /* 1135 * Pretend that the exception came from user mode: set up pt_regs 1136 * as if we faulted immediately after IRET and clear EBX so that 1137 * error_exit knows that we will be returning to user mode. 1138 */ 1139 mov %rsp, %rdi 1140 call fixup_bad_iret 1141 mov %rax, %rsp 1142 decl %ebx 1143 jmp .Lerror_entry_from_usermode_after_swapgs 1144END(error_entry) 1145 1146 1147/* 1148 * On entry, EBX is a "return to kernel mode" flag: 1149 * 1: already in kernel mode, don't need SWAPGS 1150 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1151 */ 1152ENTRY(error_exit) 1153 DISABLE_INTERRUPTS(CLBR_ANY) 1154 TRACE_IRQS_OFF 1155 testl %ebx, %ebx 1156 jnz retint_kernel 1157 jmp retint_user 1158END(error_exit) 1159 1160/* Runs on exception stack */ 1161ENTRY(nmi) 1162 /* 1163 * Fix up the exception frame if we're on Xen. 1164 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most 1165 * one value to the stack on native, so it may clobber the rdx 1166 * scratch slot, but it won't clobber any of the important 1167 * slots past it. 1168 * 1169 * Xen is a different story, because the Xen frame itself overlaps 1170 * the "NMI executing" variable. 1171 */ 1172 PARAVIRT_ADJUST_EXCEPTION_FRAME 1173 1174 /* 1175 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1176 * the iretq it performs will take us out of NMI context. 1177 * This means that we can have nested NMIs where the next 1178 * NMI is using the top of the stack of the previous NMI. We 1179 * can't let it execute because the nested NMI will corrupt the 1180 * stack of the previous NMI. NMI handlers are not re-entrant 1181 * anyway. 1182 * 1183 * To handle this case we do the following: 1184 * Check the a special location on the stack that contains 1185 * a variable that is set when NMIs are executing. 1186 * The interrupted task's stack is also checked to see if it 1187 * is an NMI stack. 1188 * If the variable is not set and the stack is not the NMI 1189 * stack then: 1190 * o Set the special variable on the stack 1191 * o Copy the interrupt frame into an "outermost" location on the 1192 * stack 1193 * o Copy the interrupt frame into an "iret" location on the stack 1194 * o Continue processing the NMI 1195 * If the variable is set or the previous stack is the NMI stack: 1196 * o Modify the "iret" location to jump to the repeat_nmi 1197 * o return back to the first NMI 1198 * 1199 * Now on exit of the first NMI, we first clear the stack variable 1200 * The NMI stack will tell any nested NMIs at that point that it is 1201 * nested. Then we pop the stack normally with iret, and if there was 1202 * a nested NMI that updated the copy interrupt stack frame, a 1203 * jump will be made to the repeat_nmi code that will handle the second 1204 * NMI. 1205 * 1206 * However, espfix prevents us from directly returning to userspace 1207 * with a single IRET instruction. Similarly, IRET to user mode 1208 * can fault. We therefore handle NMIs from user space like 1209 * other IST entries. 1210 */ 1211 1212 /* Use %rdx as our temp variable throughout */ 1213 pushq %rdx 1214 1215 testb $3, CS-RIP+8(%rsp) 1216 jz .Lnmi_from_kernel 1217 1218 /* 1219 * NMI from user mode. We need to run on the thread stack, but we 1220 * can't go through the normal entry paths: NMIs are masked, and 1221 * we don't want to enable interrupts, because then we'll end 1222 * up in an awkward situation in which IRQs are on but NMIs 1223 * are off. 1224 * 1225 * We also must not push anything to the stack before switching 1226 * stacks lest we corrupt the "NMI executing" variable. 1227 */ 1228 1229 SWAPGS_UNSAFE_STACK 1230 cld 1231 movq %rsp, %rdx 1232 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1233 pushq 5*8(%rdx) /* pt_regs->ss */ 1234 pushq 4*8(%rdx) /* pt_regs->rsp */ 1235 pushq 3*8(%rdx) /* pt_regs->flags */ 1236 pushq 2*8(%rdx) /* pt_regs->cs */ 1237 pushq 1*8(%rdx) /* pt_regs->rip */ 1238 pushq $-1 /* pt_regs->orig_ax */ 1239 pushq %rdi /* pt_regs->di */ 1240 pushq %rsi /* pt_regs->si */ 1241 pushq (%rdx) /* pt_regs->dx */ 1242 pushq %rcx /* pt_regs->cx */ 1243 pushq %rax /* pt_regs->ax */ 1244 pushq %r8 /* pt_regs->r8 */ 1245 pushq %r9 /* pt_regs->r9 */ 1246 pushq %r10 /* pt_regs->r10 */ 1247 pushq %r11 /* pt_regs->r11 */ 1248 pushq %rbx /* pt_regs->rbx */ 1249 pushq %rbp /* pt_regs->rbp */ 1250 pushq %r12 /* pt_regs->r12 */ 1251 pushq %r13 /* pt_regs->r13 */ 1252 pushq %r14 /* pt_regs->r14 */ 1253 pushq %r15 /* pt_regs->r15 */ 1254 ENCODE_FRAME_POINTER 1255 1256 /* 1257 * At this point we no longer need to worry about stack damage 1258 * due to nesting -- we're on the normal thread stack and we're 1259 * done with the NMI stack. 1260 */ 1261 1262 movq %rsp, %rdi 1263 movq $-1, %rsi 1264 call do_nmi 1265 1266 /* 1267 * Return back to user mode. We must *not* do the normal exit 1268 * work, because we don't want to enable interrupts. 1269 */ 1270 SWAPGS 1271 jmp restore_regs_and_iret 1272 1273.Lnmi_from_kernel: 1274 /* 1275 * Here's what our stack frame will look like: 1276 * +---------------------------------------------------------+ 1277 * | original SS | 1278 * | original Return RSP | 1279 * | original RFLAGS | 1280 * | original CS | 1281 * | original RIP | 1282 * +---------------------------------------------------------+ 1283 * | temp storage for rdx | 1284 * +---------------------------------------------------------+ 1285 * | "NMI executing" variable | 1286 * +---------------------------------------------------------+ 1287 * | iret SS } Copied from "outermost" frame | 1288 * | iret Return RSP } on each loop iteration; overwritten | 1289 * | iret RFLAGS } by a nested NMI to force another | 1290 * | iret CS } iteration if needed. | 1291 * | iret RIP } | 1292 * +---------------------------------------------------------+ 1293 * | outermost SS } initialized in first_nmi; | 1294 * | outermost Return RSP } will not be changed before | 1295 * | outermost RFLAGS } NMI processing is done. | 1296 * | outermost CS } Copied to "iret" frame on each | 1297 * | outermost RIP } iteration. | 1298 * +---------------------------------------------------------+ 1299 * | pt_regs | 1300 * +---------------------------------------------------------+ 1301 * 1302 * The "original" frame is used by hardware. Before re-enabling 1303 * NMIs, we need to be done with it, and we need to leave enough 1304 * space for the asm code here. 1305 * 1306 * We return by executing IRET while RSP points to the "iret" frame. 1307 * That will either return for real or it will loop back into NMI 1308 * processing. 1309 * 1310 * The "outermost" frame is copied to the "iret" frame on each 1311 * iteration of the loop, so each iteration starts with the "iret" 1312 * frame pointing to the final return target. 1313 */ 1314 1315 /* 1316 * Determine whether we're a nested NMI. 1317 * 1318 * If we interrupted kernel code between repeat_nmi and 1319 * end_repeat_nmi, then we are a nested NMI. We must not 1320 * modify the "iret" frame because it's being written by 1321 * the outer NMI. That's okay; the outer NMI handler is 1322 * about to about to call do_nmi anyway, so we can just 1323 * resume the outer NMI. 1324 */ 1325 1326 movq $repeat_nmi, %rdx 1327 cmpq 8(%rsp), %rdx 1328 ja 1f 1329 movq $end_repeat_nmi, %rdx 1330 cmpq 8(%rsp), %rdx 1331 ja nested_nmi_out 13321: 1333 1334 /* 1335 * Now check "NMI executing". If it's set, then we're nested. 1336 * This will not detect if we interrupted an outer NMI just 1337 * before IRET. 1338 */ 1339 cmpl $1, -8(%rsp) 1340 je nested_nmi 1341 1342 /* 1343 * Now test if the previous stack was an NMI stack. This covers 1344 * the case where we interrupt an outer NMI after it clears 1345 * "NMI executing" but before IRET. We need to be careful, though: 1346 * there is one case in which RSP could point to the NMI stack 1347 * despite there being no NMI active: naughty userspace controls 1348 * RSP at the very beginning of the SYSCALL targets. We can 1349 * pull a fast one on naughty userspace, though: we program 1350 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1351 * if it controls the kernel's RSP. We set DF before we clear 1352 * "NMI executing". 1353 */ 1354 lea 6*8(%rsp), %rdx 1355 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1356 cmpq %rdx, 4*8(%rsp) 1357 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1358 ja first_nmi 1359 1360 subq $EXCEPTION_STKSZ, %rdx 1361 cmpq %rdx, 4*8(%rsp) 1362 /* If it is below the NMI stack, it is a normal NMI */ 1363 jb first_nmi 1364 1365 /* Ah, it is within the NMI stack. */ 1366 1367 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1368 jz first_nmi /* RSP was user controlled. */ 1369 1370 /* This is a nested NMI. */ 1371 1372nested_nmi: 1373 /* 1374 * Modify the "iret" frame to point to repeat_nmi, forcing another 1375 * iteration of NMI handling. 1376 */ 1377 subq $8, %rsp 1378 leaq -10*8(%rsp), %rdx 1379 pushq $__KERNEL_DS 1380 pushq %rdx 1381 pushfq 1382 pushq $__KERNEL_CS 1383 pushq $repeat_nmi 1384 1385 /* Put stack back */ 1386 addq $(6*8), %rsp 1387 1388nested_nmi_out: 1389 popq %rdx 1390 1391 /* We are returning to kernel mode, so this cannot result in a fault. */ 1392 INTERRUPT_RETURN 1393 1394first_nmi: 1395 /* Restore rdx. */ 1396 movq (%rsp), %rdx 1397 1398 /* Make room for "NMI executing". */ 1399 pushq $0 1400 1401 /* Leave room for the "iret" frame */ 1402 subq $(5*8), %rsp 1403 1404 /* Copy the "original" frame to the "outermost" frame */ 1405 .rept 5 1406 pushq 11*8(%rsp) 1407 .endr 1408 1409 /* Everything up to here is safe from nested NMIs */ 1410 1411#ifdef CONFIG_DEBUG_ENTRY 1412 /* 1413 * For ease of testing, unmask NMIs right away. Disabled by 1414 * default because IRET is very expensive. 1415 */ 1416 pushq $0 /* SS */ 1417 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1418 addq $8, (%rsp) /* Fix up RSP */ 1419 pushfq /* RFLAGS */ 1420 pushq $__KERNEL_CS /* CS */ 1421 pushq $1f /* RIP */ 1422 INTERRUPT_RETURN /* continues at repeat_nmi below */ 14231: 1424#endif 1425 1426repeat_nmi: 1427 /* 1428 * If there was a nested NMI, the first NMI's iret will return 1429 * here. But NMIs are still enabled and we can take another 1430 * nested NMI. The nested NMI checks the interrupted RIP to see 1431 * if it is between repeat_nmi and end_repeat_nmi, and if so 1432 * it will just return, as we are about to repeat an NMI anyway. 1433 * This makes it safe to copy to the stack frame that a nested 1434 * NMI will update. 1435 * 1436 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1437 * we're repeating an NMI, gsbase has the same value that it had on 1438 * the first iteration. paranoid_entry will load the kernel 1439 * gsbase if needed before we call do_nmi. "NMI executing" 1440 * is zero. 1441 */ 1442 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1443 1444 /* 1445 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1446 * here must not modify the "iret" frame while we're writing to 1447 * it or it will end up containing garbage. 1448 */ 1449 addq $(10*8), %rsp 1450 .rept 5 1451 pushq -6*8(%rsp) 1452 .endr 1453 subq $(5*8), %rsp 1454end_repeat_nmi: 1455 1456 /* 1457 * Everything below this point can be preempted by a nested NMI. 1458 * If this happens, then the inner NMI will change the "iret" 1459 * frame to point back to repeat_nmi. 1460 */ 1461 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1462 ALLOC_PT_GPREGS_ON_STACK 1463 1464 /* 1465 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1466 * as we should not be calling schedule in NMI context. 1467 * Even with normal interrupts enabled. An NMI should not be 1468 * setting NEED_RESCHED or anything that normal interrupts and 1469 * exceptions might do. 1470 */ 1471 call paranoid_entry 1472 1473 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1474 movq %rsp, %rdi 1475 movq $-1, %rsi 1476 call do_nmi 1477 1478 testl %ebx, %ebx /* swapgs needed? */ 1479 jnz nmi_restore 1480nmi_swapgs: 1481 SWAPGS_UNSAFE_STACK 1482nmi_restore: 1483 RESTORE_EXTRA_REGS 1484 RESTORE_C_REGS 1485 1486 /* Point RSP at the "iret" frame. */ 1487 REMOVE_PT_GPREGS_FROM_STACK 6*8 1488 1489 /* 1490 * Clear "NMI executing". Set DF first so that we can easily 1491 * distinguish the remaining code between here and IRET from 1492 * the SYSCALL entry and exit paths. On a native kernel, we 1493 * could just inspect RIP, but, on paravirt kernels, 1494 * INTERRUPT_RETURN can translate into a jump into a 1495 * hypercall page. 1496 */ 1497 std 1498 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1499 1500 /* 1501 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI 1502 * stack in a single instruction. We are returning to kernel 1503 * mode, so this cannot result in a fault. 1504 */ 1505 INTERRUPT_RETURN 1506END(nmi) 1507 1508ENTRY(ignore_sysret) 1509 mov $-ENOSYS, %eax 1510 sysret 1511END(ignore_sysret) 1512 1513ENTRY(rewind_stack_do_exit) 1514 /* Prevent any naive code from trying to unwind to our caller. */ 1515 xorl %ebp, %ebp 1516 1517 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax 1518 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp 1519 1520 call do_exit 15211: jmp 1b 1522END(rewind_stack_do_exit) 1523