xref: /openbmc/linux/arch/x86/entry/entry_64.S (revision a36954f5)
1/*
2 *  linux/arch/x86_64/entry.S
3 *
4 *  Copyright (C) 1991, 1992  Linus Torvalds
5 *  Copyright (C) 2000, 2001, 2002  Andi Kleen SuSE Labs
6 *  Copyright (C) 2000  Pavel Machek <pavel@suse.cz>
7 *
8 * entry.S contains the system-call and fault low-level handling routines.
9 *
10 * Some of this is documented in Documentation/x86/entry_64.txt
11 *
12 * A note on terminology:
13 * - iret frame:	Architecture defined interrupt frame from SS to RIP
14 *			at the top of the kernel process stack.
15 *
16 * Some macro usage:
17 * - ENTRY/END:		Define functions in the symbol table.
18 * - TRACE_IRQ_*:	Trace hardirq state for lock debugging.
19 * - idtentry:		Define exception entry points.
20 */
21#include <linux/linkage.h>
22#include <asm/segment.h>
23#include <asm/cache.h>
24#include <asm/errno.h>
25#include "calling.h"
26#include <asm/asm-offsets.h>
27#include <asm/msr.h>
28#include <asm/unistd.h>
29#include <asm/thread_info.h>
30#include <asm/hw_irq.h>
31#include <asm/page_types.h>
32#include <asm/irqflags.h>
33#include <asm/paravirt.h>
34#include <asm/percpu.h>
35#include <asm/asm.h>
36#include <asm/smap.h>
37#include <asm/pgtable_types.h>
38#include <asm/export.h>
39#include <asm/frame.h>
40#include <linux/err.h>
41
42.code64
43.section .entry.text, "ax"
44
45#ifdef CONFIG_PARAVIRT
46ENTRY(native_usergs_sysret64)
47	swapgs
48	sysretq
49ENDPROC(native_usergs_sysret64)
50#endif /* CONFIG_PARAVIRT */
51
52.macro TRACE_IRQS_IRETQ
53#ifdef CONFIG_TRACE_IRQFLAGS
54	bt	$9, EFLAGS(%rsp)		/* interrupts off? */
55	jnc	1f
56	TRACE_IRQS_ON
571:
58#endif
59.endm
60
61/*
62 * When dynamic function tracer is enabled it will add a breakpoint
63 * to all locations that it is about to modify, sync CPUs, update
64 * all the code, sync CPUs, then remove the breakpoints. In this time
65 * if lockdep is enabled, it might jump back into the debug handler
66 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
67 *
68 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
69 * make sure the stack pointer does not get reset back to the top
70 * of the debug stack, and instead just reuses the current stack.
71 */
72#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
73
74.macro TRACE_IRQS_OFF_DEBUG
75	call	debug_stack_set_zero
76	TRACE_IRQS_OFF
77	call	debug_stack_reset
78.endm
79
80.macro TRACE_IRQS_ON_DEBUG
81	call	debug_stack_set_zero
82	TRACE_IRQS_ON
83	call	debug_stack_reset
84.endm
85
86.macro TRACE_IRQS_IRETQ_DEBUG
87	bt	$9, EFLAGS(%rsp)		/* interrupts off? */
88	jnc	1f
89	TRACE_IRQS_ON_DEBUG
901:
91.endm
92
93#else
94# define TRACE_IRQS_OFF_DEBUG			TRACE_IRQS_OFF
95# define TRACE_IRQS_ON_DEBUG			TRACE_IRQS_ON
96# define TRACE_IRQS_IRETQ_DEBUG			TRACE_IRQS_IRETQ
97#endif
98
99/*
100 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
101 *
102 * This is the only entry point used for 64-bit system calls.  The
103 * hardware interface is reasonably well designed and the register to
104 * argument mapping Linux uses fits well with the registers that are
105 * available when SYSCALL is used.
106 *
107 * SYSCALL instructions can be found inlined in libc implementations as
108 * well as some other programs and libraries.  There are also a handful
109 * of SYSCALL instructions in the vDSO used, for example, as a
110 * clock_gettimeofday fallback.
111 *
112 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
113 * then loads new ss, cs, and rip from previously programmed MSRs.
114 * rflags gets masked by a value from another MSR (so CLD and CLAC
115 * are not needed). SYSCALL does not save anything on the stack
116 * and does not change rsp.
117 *
118 * Registers on entry:
119 * rax  system call number
120 * rcx  return address
121 * r11  saved rflags (note: r11 is callee-clobbered register in C ABI)
122 * rdi  arg0
123 * rsi  arg1
124 * rdx  arg2
125 * r10  arg3 (needs to be moved to rcx to conform to C ABI)
126 * r8   arg4
127 * r9   arg5
128 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
129 *
130 * Only called from user space.
131 *
132 * When user can change pt_regs->foo always force IRET. That is because
133 * it deals with uncanonical addresses better. SYSRET has trouble
134 * with them due to bugs in both AMD and Intel CPUs.
135 */
136
137ENTRY(entry_SYSCALL_64)
138	/*
139	 * Interrupts are off on entry.
140	 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
141	 * it is too small to ever cause noticeable irq latency.
142	 */
143	SWAPGS_UNSAFE_STACK
144	/*
145	 * A hypervisor implementation might want to use a label
146	 * after the swapgs, so that it can do the swapgs
147	 * for the guest and jump here on syscall.
148	 */
149GLOBAL(entry_SYSCALL_64_after_swapgs)
150
151	movq	%rsp, PER_CPU_VAR(rsp_scratch)
152	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
153
154	TRACE_IRQS_OFF
155
156	/* Construct struct pt_regs on stack */
157	pushq	$__USER_DS			/* pt_regs->ss */
158	pushq	PER_CPU_VAR(rsp_scratch)	/* pt_regs->sp */
159	pushq	%r11				/* pt_regs->flags */
160	pushq	$__USER_CS			/* pt_regs->cs */
161	pushq	%rcx				/* pt_regs->ip */
162	pushq	%rax				/* pt_regs->orig_ax */
163	pushq	%rdi				/* pt_regs->di */
164	pushq	%rsi				/* pt_regs->si */
165	pushq	%rdx				/* pt_regs->dx */
166	pushq	%rcx				/* pt_regs->cx */
167	pushq	$-ENOSYS			/* pt_regs->ax */
168	pushq	%r8				/* pt_regs->r8 */
169	pushq	%r9				/* pt_regs->r9 */
170	pushq	%r10				/* pt_regs->r10 */
171	pushq	%r11				/* pt_regs->r11 */
172	sub	$(6*8), %rsp			/* pt_regs->bp, bx, r12-15 not saved */
173
174	/*
175	 * If we need to do entry work or if we guess we'll need to do
176	 * exit work, go straight to the slow path.
177	 */
178	movq	PER_CPU_VAR(current_task), %r11
179	testl	$_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
180	jnz	entry_SYSCALL64_slow_path
181
182entry_SYSCALL_64_fastpath:
183	/*
184	 * Easy case: enable interrupts and issue the syscall.  If the syscall
185	 * needs pt_regs, we'll call a stub that disables interrupts again
186	 * and jumps to the slow path.
187	 */
188	TRACE_IRQS_ON
189	ENABLE_INTERRUPTS(CLBR_NONE)
190#if __SYSCALL_MASK == ~0
191	cmpq	$__NR_syscall_max, %rax
192#else
193	andl	$__SYSCALL_MASK, %eax
194	cmpl	$__NR_syscall_max, %eax
195#endif
196	ja	1f				/* return -ENOSYS (already in pt_regs->ax) */
197	movq	%r10, %rcx
198
199	/*
200	 * This call instruction is handled specially in stub_ptregs_64.
201	 * It might end up jumping to the slow path.  If it jumps, RAX
202	 * and all argument registers are clobbered.
203	 */
204	call	*sys_call_table(, %rax, 8)
205.Lentry_SYSCALL_64_after_fastpath_call:
206
207	movq	%rax, RAX(%rsp)
2081:
209
210	/*
211	 * If we get here, then we know that pt_regs is clean for SYSRET64.
212	 * If we see that no exit work is required (which we are required
213	 * to check with IRQs off), then we can go straight to SYSRET64.
214	 */
215	DISABLE_INTERRUPTS(CLBR_ANY)
216	TRACE_IRQS_OFF
217	movq	PER_CPU_VAR(current_task), %r11
218	testl	$_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
219	jnz	1f
220
221	LOCKDEP_SYS_EXIT
222	TRACE_IRQS_ON		/* user mode is traced as IRQs on */
223	movq	RIP(%rsp), %rcx
224	movq	EFLAGS(%rsp), %r11
225	RESTORE_C_REGS_EXCEPT_RCX_R11
226	movq	RSP(%rsp), %rsp
227	USERGS_SYSRET64
228
2291:
230	/*
231	 * The fast path looked good when we started, but something changed
232	 * along the way and we need to switch to the slow path.  Calling
233	 * raise(3) will trigger this, for example.  IRQs are off.
234	 */
235	TRACE_IRQS_ON
236	ENABLE_INTERRUPTS(CLBR_ANY)
237	SAVE_EXTRA_REGS
238	movq	%rsp, %rdi
239	call	syscall_return_slowpath	/* returns with IRQs disabled */
240	jmp	return_from_SYSCALL_64
241
242entry_SYSCALL64_slow_path:
243	/* IRQs are off. */
244	SAVE_EXTRA_REGS
245	movq	%rsp, %rdi
246	call	do_syscall_64		/* returns with IRQs disabled */
247
248return_from_SYSCALL_64:
249	RESTORE_EXTRA_REGS
250	TRACE_IRQS_IRETQ		/* we're about to change IF */
251
252	/*
253	 * Try to use SYSRET instead of IRET if we're returning to
254	 * a completely clean 64-bit userspace context.
255	 */
256	movq	RCX(%rsp), %rcx
257	movq	RIP(%rsp), %r11
258	cmpq	%rcx, %r11			/* RCX == RIP */
259	jne	opportunistic_sysret_failed
260
261	/*
262	 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
263	 * in kernel space.  This essentially lets the user take over
264	 * the kernel, since userspace controls RSP.
265	 *
266	 * If width of "canonical tail" ever becomes variable, this will need
267	 * to be updated to remain correct on both old and new CPUs.
268	 *
269	 * Change top 16 bits to be the sign-extension of 47th bit
270	 */
271	shl	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
272	sar	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
273
274	/* If this changed %rcx, it was not canonical */
275	cmpq	%rcx, %r11
276	jne	opportunistic_sysret_failed
277
278	cmpq	$__USER_CS, CS(%rsp)		/* CS must match SYSRET */
279	jne	opportunistic_sysret_failed
280
281	movq	R11(%rsp), %r11
282	cmpq	%r11, EFLAGS(%rsp)		/* R11 == RFLAGS */
283	jne	opportunistic_sysret_failed
284
285	/*
286	 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
287	 * restore RF properly. If the slowpath sets it for whatever reason, we
288	 * need to restore it correctly.
289	 *
290	 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
291	 * trap from userspace immediately after SYSRET.  This would cause an
292	 * infinite loop whenever #DB happens with register state that satisfies
293	 * the opportunistic SYSRET conditions.  For example, single-stepping
294	 * this user code:
295	 *
296	 *           movq	$stuck_here, %rcx
297	 *           pushfq
298	 *           popq %r11
299	 *   stuck_here:
300	 *
301	 * would never get past 'stuck_here'.
302	 */
303	testq	$(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
304	jnz	opportunistic_sysret_failed
305
306	/* nothing to check for RSP */
307
308	cmpq	$__USER_DS, SS(%rsp)		/* SS must match SYSRET */
309	jne	opportunistic_sysret_failed
310
311	/*
312	 * We win! This label is here just for ease of understanding
313	 * perf profiles. Nothing jumps here.
314	 */
315syscall_return_via_sysret:
316	/* rcx and r11 are already restored (see code above) */
317	RESTORE_C_REGS_EXCEPT_RCX_R11
318	movq	RSP(%rsp), %rsp
319	USERGS_SYSRET64
320
321opportunistic_sysret_failed:
322	SWAPGS
323	jmp	restore_c_regs_and_iret
324END(entry_SYSCALL_64)
325
326ENTRY(stub_ptregs_64)
327	/*
328	 * Syscalls marked as needing ptregs land here.
329	 * If we are on the fast path, we need to save the extra regs,
330	 * which we achieve by trying again on the slow path.  If we are on
331	 * the slow path, the extra regs are already saved.
332	 *
333	 * RAX stores a pointer to the C function implementing the syscall.
334	 * IRQs are on.
335	 */
336	cmpq	$.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
337	jne	1f
338
339	/*
340	 * Called from fast path -- disable IRQs again, pop return address
341	 * and jump to slow path
342	 */
343	DISABLE_INTERRUPTS(CLBR_ANY)
344	TRACE_IRQS_OFF
345	popq	%rax
346	jmp	entry_SYSCALL64_slow_path
347
3481:
349	jmp	*%rax				/* Called from C */
350END(stub_ptregs_64)
351
352.macro ptregs_stub func
353ENTRY(ptregs_\func)
354	leaq	\func(%rip), %rax
355	jmp	stub_ptregs_64
356END(ptregs_\func)
357.endm
358
359/* Instantiate ptregs_stub for each ptregs-using syscall */
360#define __SYSCALL_64_QUAL_(sym)
361#define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
362#define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
363#include <asm/syscalls_64.h>
364
365/*
366 * %rdi: prev task
367 * %rsi: next task
368 */
369ENTRY(__switch_to_asm)
370	/*
371	 * Save callee-saved registers
372	 * This must match the order in inactive_task_frame
373	 */
374	pushq	%rbp
375	pushq	%rbx
376	pushq	%r12
377	pushq	%r13
378	pushq	%r14
379	pushq	%r15
380
381	/* switch stack */
382	movq	%rsp, TASK_threadsp(%rdi)
383	movq	TASK_threadsp(%rsi), %rsp
384
385#ifdef CONFIG_CC_STACKPROTECTOR
386	movq	TASK_stack_canary(%rsi), %rbx
387	movq	%rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
388#endif
389
390	/* restore callee-saved registers */
391	popq	%r15
392	popq	%r14
393	popq	%r13
394	popq	%r12
395	popq	%rbx
396	popq	%rbp
397
398	jmp	__switch_to
399END(__switch_to_asm)
400
401/*
402 * A newly forked process directly context switches into this address.
403 *
404 * rax: prev task we switched from
405 * rbx: kernel thread func (NULL for user thread)
406 * r12: kernel thread arg
407 */
408ENTRY(ret_from_fork)
409	FRAME_BEGIN			/* help unwinder find end of stack */
410	movq	%rax, %rdi
411	call	schedule_tail		/* rdi: 'prev' task parameter */
412
413	testq	%rbx, %rbx		/* from kernel_thread? */
414	jnz	1f			/* kernel threads are uncommon */
415
4162:
417	leaq	FRAME_OFFSET(%rsp),%rdi	/* pt_regs pointer */
418	call	syscall_return_slowpath	/* returns with IRQs disabled */
419	TRACE_IRQS_ON			/* user mode is traced as IRQS on */
420	SWAPGS
421	FRAME_END
422	jmp	restore_regs_and_iret
423
4241:
425	/* kernel thread */
426	movq	%r12, %rdi
427	call	*%rbx
428	/*
429	 * A kernel thread is allowed to return here after successfully
430	 * calling do_execve().  Exit to userspace to complete the execve()
431	 * syscall.
432	 */
433	movq	$0, RAX(%rsp)
434	jmp	2b
435END(ret_from_fork)
436
437/*
438 * Build the entry stubs with some assembler magic.
439 * We pack 1 stub into every 8-byte block.
440 */
441	.align 8
442ENTRY(irq_entries_start)
443    vector=FIRST_EXTERNAL_VECTOR
444    .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
445	pushq	$(~vector+0x80)			/* Note: always in signed byte range */
446    vector=vector+1
447	jmp	common_interrupt
448	.align	8
449    .endr
450END(irq_entries_start)
451
452/*
453 * Interrupt entry/exit.
454 *
455 * Interrupt entry points save only callee clobbered registers in fast path.
456 *
457 * Entry runs with interrupts off.
458 */
459
460/* 0(%rsp): ~(interrupt number) */
461	.macro interrupt func
462	cld
463	ALLOC_PT_GPREGS_ON_STACK
464	SAVE_C_REGS
465	SAVE_EXTRA_REGS
466	ENCODE_FRAME_POINTER
467
468	testb	$3, CS(%rsp)
469	jz	1f
470
471	/*
472	 * IRQ from user mode.  Switch to kernel gsbase and inform context
473	 * tracking that we're in kernel mode.
474	 */
475	SWAPGS
476
477	/*
478	 * We need to tell lockdep that IRQs are off.  We can't do this until
479	 * we fix gsbase, and we should do it before enter_from_user_mode
480	 * (which can take locks).  Since TRACE_IRQS_OFF idempotent,
481	 * the simplest way to handle it is to just call it twice if
482	 * we enter from user mode.  There's no reason to optimize this since
483	 * TRACE_IRQS_OFF is a no-op if lockdep is off.
484	 */
485	TRACE_IRQS_OFF
486
487	CALL_enter_from_user_mode
488
4891:
490	/*
491	 * Save previous stack pointer, optionally switch to interrupt stack.
492	 * irq_count is used to check if a CPU is already on an interrupt stack
493	 * or not. While this is essentially redundant with preempt_count it is
494	 * a little cheaper to use a separate counter in the PDA (short of
495	 * moving irq_enter into assembly, which would be too much work)
496	 */
497	movq	%rsp, %rdi
498	incl	PER_CPU_VAR(irq_count)
499	cmovzq	PER_CPU_VAR(irq_stack_ptr), %rsp
500	pushq	%rdi
501	/* We entered an interrupt context - irqs are off: */
502	TRACE_IRQS_OFF
503
504	call	\func	/* rdi points to pt_regs */
505	.endm
506
507	/*
508	 * The interrupt stubs push (~vector+0x80) onto the stack and
509	 * then jump to common_interrupt.
510	 */
511	.p2align CONFIG_X86_L1_CACHE_SHIFT
512common_interrupt:
513	ASM_CLAC
514	addq	$-0x80, (%rsp)			/* Adjust vector to [-256, -1] range */
515	interrupt do_IRQ
516	/* 0(%rsp): old RSP */
517ret_from_intr:
518	DISABLE_INTERRUPTS(CLBR_ANY)
519	TRACE_IRQS_OFF
520	decl	PER_CPU_VAR(irq_count)
521
522	/* Restore saved previous stack */
523	popq	%rsp
524
525	testb	$3, CS(%rsp)
526	jz	retint_kernel
527
528	/* Interrupt came from user space */
529GLOBAL(retint_user)
530	mov	%rsp,%rdi
531	call	prepare_exit_to_usermode
532	TRACE_IRQS_IRETQ
533	SWAPGS
534	jmp	restore_regs_and_iret
535
536/* Returning to kernel space */
537retint_kernel:
538#ifdef CONFIG_PREEMPT
539	/* Interrupts are off */
540	/* Check if we need preemption */
541	bt	$9, EFLAGS(%rsp)		/* were interrupts off? */
542	jnc	1f
5430:	cmpl	$0, PER_CPU_VAR(__preempt_count)
544	jnz	1f
545	call	preempt_schedule_irq
546	jmp	0b
5471:
548#endif
549	/*
550	 * The iretq could re-enable interrupts:
551	 */
552	TRACE_IRQS_IRETQ
553
554/*
555 * At this label, code paths which return to kernel and to user,
556 * which come from interrupts/exception and from syscalls, merge.
557 */
558GLOBAL(restore_regs_and_iret)
559	RESTORE_EXTRA_REGS
560restore_c_regs_and_iret:
561	RESTORE_C_REGS
562	REMOVE_PT_GPREGS_FROM_STACK 8
563	INTERRUPT_RETURN
564
565ENTRY(native_iret)
566	/*
567	 * Are we returning to a stack segment from the LDT?  Note: in
568	 * 64-bit mode SS:RSP on the exception stack is always valid.
569	 */
570#ifdef CONFIG_X86_ESPFIX64
571	testb	$4, (SS-RIP)(%rsp)
572	jnz	native_irq_return_ldt
573#endif
574
575.global native_irq_return_iret
576native_irq_return_iret:
577	/*
578	 * This may fault.  Non-paranoid faults on return to userspace are
579	 * handled by fixup_bad_iret.  These include #SS, #GP, and #NP.
580	 * Double-faults due to espfix64 are handled in do_double_fault.
581	 * Other faults here are fatal.
582	 */
583	iretq
584
585#ifdef CONFIG_X86_ESPFIX64
586native_irq_return_ldt:
587	/*
588	 * We are running with user GSBASE.  All GPRs contain their user
589	 * values.  We have a percpu ESPFIX stack that is eight slots
590	 * long (see ESPFIX_STACK_SIZE).  espfix_waddr points to the bottom
591	 * of the ESPFIX stack.
592	 *
593	 * We clobber RAX and RDI in this code.  We stash RDI on the
594	 * normal stack and RAX on the ESPFIX stack.
595	 *
596	 * The ESPFIX stack layout we set up looks like this:
597	 *
598	 * --- top of ESPFIX stack ---
599	 * SS
600	 * RSP
601	 * RFLAGS
602	 * CS
603	 * RIP  <-- RSP points here when we're done
604	 * RAX  <-- espfix_waddr points here
605	 * --- bottom of ESPFIX stack ---
606	 */
607
608	pushq	%rdi				/* Stash user RDI */
609	SWAPGS
610	movq	PER_CPU_VAR(espfix_waddr), %rdi
611	movq	%rax, (0*8)(%rdi)		/* user RAX */
612	movq	(1*8)(%rsp), %rax		/* user RIP */
613	movq	%rax, (1*8)(%rdi)
614	movq	(2*8)(%rsp), %rax		/* user CS */
615	movq	%rax, (2*8)(%rdi)
616	movq	(3*8)(%rsp), %rax		/* user RFLAGS */
617	movq	%rax, (3*8)(%rdi)
618	movq	(5*8)(%rsp), %rax		/* user SS */
619	movq	%rax, (5*8)(%rdi)
620	movq	(4*8)(%rsp), %rax		/* user RSP */
621	movq	%rax, (4*8)(%rdi)
622	/* Now RAX == RSP. */
623
624	andl	$0xffff0000, %eax		/* RAX = (RSP & 0xffff0000) */
625	popq	%rdi				/* Restore user RDI */
626
627	/*
628	 * espfix_stack[31:16] == 0.  The page tables are set up such that
629	 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
630	 * espfix_waddr for any X.  That is, there are 65536 RO aliases of
631	 * the same page.  Set up RSP so that RSP[31:16] contains the
632	 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
633	 * still points to an RO alias of the ESPFIX stack.
634	 */
635	orq	PER_CPU_VAR(espfix_stack), %rax
636	SWAPGS
637	movq	%rax, %rsp
638
639	/*
640	 * At this point, we cannot write to the stack any more, but we can
641	 * still read.
642	 */
643	popq	%rax				/* Restore user RAX */
644
645	/*
646	 * RSP now points to an ordinary IRET frame, except that the page
647	 * is read-only and RSP[31:16] are preloaded with the userspace
648	 * values.  We can now IRET back to userspace.
649	 */
650	jmp	native_irq_return_iret
651#endif
652END(common_interrupt)
653
654/*
655 * APIC interrupts.
656 */
657.macro apicinterrupt3 num sym do_sym
658ENTRY(\sym)
659	ASM_CLAC
660	pushq	$~(\num)
661.Lcommon_\sym:
662	interrupt \do_sym
663	jmp	ret_from_intr
664END(\sym)
665.endm
666
667#ifdef CONFIG_TRACING
668#define trace(sym) trace_##sym
669#define smp_trace(sym) smp_trace_##sym
670
671.macro trace_apicinterrupt num sym
672apicinterrupt3 \num trace(\sym) smp_trace(\sym)
673.endm
674#else
675.macro trace_apicinterrupt num sym do_sym
676.endm
677#endif
678
679/* Make sure APIC interrupt handlers end up in the irqentry section: */
680#if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
681# define PUSH_SECTION_IRQENTRY	.pushsection .irqentry.text, "ax"
682# define POP_SECTION_IRQENTRY	.popsection
683#else
684# define PUSH_SECTION_IRQENTRY
685# define POP_SECTION_IRQENTRY
686#endif
687
688.macro apicinterrupt num sym do_sym
689PUSH_SECTION_IRQENTRY
690apicinterrupt3 \num \sym \do_sym
691trace_apicinterrupt \num \sym
692POP_SECTION_IRQENTRY
693.endm
694
695#ifdef CONFIG_SMP
696apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR		irq_move_cleanup_interrupt	smp_irq_move_cleanup_interrupt
697apicinterrupt3 REBOOT_VECTOR			reboot_interrupt		smp_reboot_interrupt
698#endif
699
700#ifdef CONFIG_X86_UV
701apicinterrupt3 UV_BAU_MESSAGE			uv_bau_message_intr1		uv_bau_message_interrupt
702#endif
703
704apicinterrupt LOCAL_TIMER_VECTOR		apic_timer_interrupt		smp_apic_timer_interrupt
705apicinterrupt X86_PLATFORM_IPI_VECTOR		x86_platform_ipi		smp_x86_platform_ipi
706
707#ifdef CONFIG_HAVE_KVM
708apicinterrupt3 POSTED_INTR_VECTOR		kvm_posted_intr_ipi		smp_kvm_posted_intr_ipi
709apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR	kvm_posted_intr_wakeup_ipi	smp_kvm_posted_intr_wakeup_ipi
710#endif
711
712#ifdef CONFIG_X86_MCE_THRESHOLD
713apicinterrupt THRESHOLD_APIC_VECTOR		threshold_interrupt		smp_threshold_interrupt
714#endif
715
716#ifdef CONFIG_X86_MCE_AMD
717apicinterrupt DEFERRED_ERROR_VECTOR		deferred_error_interrupt	smp_deferred_error_interrupt
718#endif
719
720#ifdef CONFIG_X86_THERMAL_VECTOR
721apicinterrupt THERMAL_APIC_VECTOR		thermal_interrupt		smp_thermal_interrupt
722#endif
723
724#ifdef CONFIG_SMP
725apicinterrupt CALL_FUNCTION_SINGLE_VECTOR	call_function_single_interrupt	smp_call_function_single_interrupt
726apicinterrupt CALL_FUNCTION_VECTOR		call_function_interrupt		smp_call_function_interrupt
727apicinterrupt RESCHEDULE_VECTOR			reschedule_interrupt		smp_reschedule_interrupt
728#endif
729
730apicinterrupt ERROR_APIC_VECTOR			error_interrupt			smp_error_interrupt
731apicinterrupt SPURIOUS_APIC_VECTOR		spurious_interrupt		smp_spurious_interrupt
732
733#ifdef CONFIG_IRQ_WORK
734apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt
735#endif
736
737/*
738 * Exception entry points.
739 */
740#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
741
742.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
743ENTRY(\sym)
744	/* Sanity check */
745	.if \shift_ist != -1 && \paranoid == 0
746	.error "using shift_ist requires paranoid=1"
747	.endif
748
749	ASM_CLAC
750	PARAVIRT_ADJUST_EXCEPTION_FRAME
751
752	.ifeq \has_error_code
753	pushq	$-1				/* ORIG_RAX: no syscall to restart */
754	.endif
755
756	ALLOC_PT_GPREGS_ON_STACK
757
758	.if \paranoid
759	.if \paranoid == 1
760	testb	$3, CS(%rsp)			/* If coming from userspace, switch stacks */
761	jnz	1f
762	.endif
763	call	paranoid_entry
764	.else
765	call	error_entry
766	.endif
767	/* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
768
769	.if \paranoid
770	.if \shift_ist != -1
771	TRACE_IRQS_OFF_DEBUG			/* reload IDT in case of recursion */
772	.else
773	TRACE_IRQS_OFF
774	.endif
775	.endif
776
777	movq	%rsp, %rdi			/* pt_regs pointer */
778
779	.if \has_error_code
780	movq	ORIG_RAX(%rsp), %rsi		/* get error code */
781	movq	$-1, ORIG_RAX(%rsp)		/* no syscall to restart */
782	.else
783	xorl	%esi, %esi			/* no error code */
784	.endif
785
786	.if \shift_ist != -1
787	subq	$EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
788	.endif
789
790	call	\do_sym
791
792	.if \shift_ist != -1
793	addq	$EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
794	.endif
795
796	/* these procedures expect "no swapgs" flag in ebx */
797	.if \paranoid
798	jmp	paranoid_exit
799	.else
800	jmp	error_exit
801	.endif
802
803	.if \paranoid == 1
804	/*
805	 * Paranoid entry from userspace.  Switch stacks and treat it
806	 * as a normal entry.  This means that paranoid handlers
807	 * run in real process context if user_mode(regs).
808	 */
8091:
810	call	error_entry
811
812
813	movq	%rsp, %rdi			/* pt_regs pointer */
814	call	sync_regs
815	movq	%rax, %rsp			/* switch stack */
816
817	movq	%rsp, %rdi			/* pt_regs pointer */
818
819	.if \has_error_code
820	movq	ORIG_RAX(%rsp), %rsi		/* get error code */
821	movq	$-1, ORIG_RAX(%rsp)		/* no syscall to restart */
822	.else
823	xorl	%esi, %esi			/* no error code */
824	.endif
825
826	call	\do_sym
827
828	jmp	error_exit			/* %ebx: no swapgs flag */
829	.endif
830END(\sym)
831.endm
832
833#ifdef CONFIG_TRACING
834.macro trace_idtentry sym do_sym has_error_code:req
835idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
836idtentry \sym \do_sym has_error_code=\has_error_code
837.endm
838#else
839.macro trace_idtentry sym do_sym has_error_code:req
840idtentry \sym \do_sym has_error_code=\has_error_code
841.endm
842#endif
843
844idtentry divide_error			do_divide_error			has_error_code=0
845idtentry overflow			do_overflow			has_error_code=0
846idtentry bounds				do_bounds			has_error_code=0
847idtentry invalid_op			do_invalid_op			has_error_code=0
848idtentry device_not_available		do_device_not_available		has_error_code=0
849idtentry double_fault			do_double_fault			has_error_code=1 paranoid=2
850idtentry coprocessor_segment_overrun	do_coprocessor_segment_overrun	has_error_code=0
851idtentry invalid_TSS			do_invalid_TSS			has_error_code=1
852idtentry segment_not_present		do_segment_not_present		has_error_code=1
853idtentry spurious_interrupt_bug		do_spurious_interrupt_bug	has_error_code=0
854idtentry coprocessor_error		do_coprocessor_error		has_error_code=0
855idtentry alignment_check		do_alignment_check		has_error_code=1
856idtentry simd_coprocessor_error		do_simd_coprocessor_error	has_error_code=0
857
858
859	/*
860	 * Reload gs selector with exception handling
861	 * edi:  new selector
862	 */
863ENTRY(native_load_gs_index)
864	pushfq
865	DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
866	SWAPGS
867.Lgs_change:
868	movl	%edi, %gs
8692:	ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
870	SWAPGS
871	popfq
872	ret
873END(native_load_gs_index)
874EXPORT_SYMBOL(native_load_gs_index)
875
876	_ASM_EXTABLE(.Lgs_change, bad_gs)
877	.section .fixup, "ax"
878	/* running with kernelgs */
879bad_gs:
880	SWAPGS					/* switch back to user gs */
881.macro ZAP_GS
882	/* This can't be a string because the preprocessor needs to see it. */
883	movl $__USER_DS, %eax
884	movl %eax, %gs
885.endm
886	ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
887	xorl	%eax, %eax
888	movl	%eax, %gs
889	jmp	2b
890	.previous
891
892/* Call softirq on interrupt stack. Interrupts are off. */
893ENTRY(do_softirq_own_stack)
894	pushq	%rbp
895	mov	%rsp, %rbp
896	incl	PER_CPU_VAR(irq_count)
897	cmove	PER_CPU_VAR(irq_stack_ptr), %rsp
898	push	%rbp				/* frame pointer backlink */
899	call	__do_softirq
900	leaveq
901	decl	PER_CPU_VAR(irq_count)
902	ret
903END(do_softirq_own_stack)
904
905#ifdef CONFIG_XEN
906idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
907
908/*
909 * A note on the "critical region" in our callback handler.
910 * We want to avoid stacking callback handlers due to events occurring
911 * during handling of the last event. To do this, we keep events disabled
912 * until we've done all processing. HOWEVER, we must enable events before
913 * popping the stack frame (can't be done atomically) and so it would still
914 * be possible to get enough handler activations to overflow the stack.
915 * Although unlikely, bugs of that kind are hard to track down, so we'd
916 * like to avoid the possibility.
917 * So, on entry to the handler we detect whether we interrupted an
918 * existing activation in its critical region -- if so, we pop the current
919 * activation and restart the handler using the previous one.
920 */
921ENTRY(xen_do_hypervisor_callback)		/* do_hypervisor_callback(struct *pt_regs) */
922
923/*
924 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
925 * see the correct pointer to the pt_regs
926 */
927	movq	%rdi, %rsp			/* we don't return, adjust the stack frame */
92811:	incl	PER_CPU_VAR(irq_count)
929	movq	%rsp, %rbp
930	cmovzq	PER_CPU_VAR(irq_stack_ptr), %rsp
931	pushq	%rbp				/* frame pointer backlink */
932	call	xen_evtchn_do_upcall
933	popq	%rsp
934	decl	PER_CPU_VAR(irq_count)
935#ifndef CONFIG_PREEMPT
936	call	xen_maybe_preempt_hcall
937#endif
938	jmp	error_exit
939END(xen_do_hypervisor_callback)
940
941/*
942 * Hypervisor uses this for application faults while it executes.
943 * We get here for two reasons:
944 *  1. Fault while reloading DS, ES, FS or GS
945 *  2. Fault while executing IRET
946 * Category 1 we do not need to fix up as Xen has already reloaded all segment
947 * registers that could be reloaded and zeroed the others.
948 * Category 2 we fix up by killing the current process. We cannot use the
949 * normal Linux return path in this case because if we use the IRET hypercall
950 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
951 * We distinguish between categories by comparing each saved segment register
952 * with its current contents: any discrepancy means we in category 1.
953 */
954ENTRY(xen_failsafe_callback)
955	movl	%ds, %ecx
956	cmpw	%cx, 0x10(%rsp)
957	jne	1f
958	movl	%es, %ecx
959	cmpw	%cx, 0x18(%rsp)
960	jne	1f
961	movl	%fs, %ecx
962	cmpw	%cx, 0x20(%rsp)
963	jne	1f
964	movl	%gs, %ecx
965	cmpw	%cx, 0x28(%rsp)
966	jne	1f
967	/* All segments match their saved values => Category 2 (Bad IRET). */
968	movq	(%rsp), %rcx
969	movq	8(%rsp), %r11
970	addq	$0x30, %rsp
971	pushq	$0				/* RIP */
972	pushq	%r11
973	pushq	%rcx
974	jmp	general_protection
9751:	/* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
976	movq	(%rsp), %rcx
977	movq	8(%rsp), %r11
978	addq	$0x30, %rsp
979	pushq	$-1 /* orig_ax = -1 => not a system call */
980	ALLOC_PT_GPREGS_ON_STACK
981	SAVE_C_REGS
982	SAVE_EXTRA_REGS
983	ENCODE_FRAME_POINTER
984	jmp	error_exit
985END(xen_failsafe_callback)
986
987apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
988	xen_hvm_callback_vector xen_evtchn_do_upcall
989
990#endif /* CONFIG_XEN */
991
992#if IS_ENABLED(CONFIG_HYPERV)
993apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
994	hyperv_callback_vector hyperv_vector_handler
995#endif /* CONFIG_HYPERV */
996
997idtentry debug			do_debug		has_error_code=0	paranoid=1 shift_ist=DEBUG_STACK
998idtentry int3			do_int3			has_error_code=0	paranoid=1 shift_ist=DEBUG_STACK
999idtentry stack_segment		do_stack_segment	has_error_code=1
1000
1001#ifdef CONFIG_XEN
1002idtentry xen_debug		do_debug		has_error_code=0
1003idtentry xen_int3		do_int3			has_error_code=0
1004idtentry xen_stack_segment	do_stack_segment	has_error_code=1
1005#endif
1006
1007idtentry general_protection	do_general_protection	has_error_code=1
1008trace_idtentry page_fault	do_page_fault		has_error_code=1
1009
1010#ifdef CONFIG_KVM_GUEST
1011idtentry async_page_fault	do_async_page_fault	has_error_code=1
1012#endif
1013
1014#ifdef CONFIG_X86_MCE
1015idtentry machine_check					has_error_code=0	paranoid=1 do_sym=*machine_check_vector(%rip)
1016#endif
1017
1018/*
1019 * Save all registers in pt_regs, and switch gs if needed.
1020 * Use slow, but surefire "are we in kernel?" check.
1021 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1022 */
1023ENTRY(paranoid_entry)
1024	cld
1025	SAVE_C_REGS 8
1026	SAVE_EXTRA_REGS 8
1027	ENCODE_FRAME_POINTER 8
1028	movl	$1, %ebx
1029	movl	$MSR_GS_BASE, %ecx
1030	rdmsr
1031	testl	%edx, %edx
1032	js	1f				/* negative -> in kernel */
1033	SWAPGS
1034	xorl	%ebx, %ebx
10351:	ret
1036END(paranoid_entry)
1037
1038/*
1039 * "Paranoid" exit path from exception stack.  This is invoked
1040 * only on return from non-NMI IST interrupts that came
1041 * from kernel space.
1042 *
1043 * We may be returning to very strange contexts (e.g. very early
1044 * in syscall entry), so checking for preemption here would
1045 * be complicated.  Fortunately, we there's no good reason
1046 * to try to handle preemption here.
1047 *
1048 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1049 */
1050ENTRY(paranoid_exit)
1051	DISABLE_INTERRUPTS(CLBR_ANY)
1052	TRACE_IRQS_OFF_DEBUG
1053	testl	%ebx, %ebx			/* swapgs needed? */
1054	jnz	paranoid_exit_no_swapgs
1055	TRACE_IRQS_IRETQ
1056	SWAPGS_UNSAFE_STACK
1057	jmp	paranoid_exit_restore
1058paranoid_exit_no_swapgs:
1059	TRACE_IRQS_IRETQ_DEBUG
1060paranoid_exit_restore:
1061	RESTORE_EXTRA_REGS
1062	RESTORE_C_REGS
1063	REMOVE_PT_GPREGS_FROM_STACK 8
1064	INTERRUPT_RETURN
1065END(paranoid_exit)
1066
1067/*
1068 * Save all registers in pt_regs, and switch gs if needed.
1069 * Return: EBX=0: came from user mode; EBX=1: otherwise
1070 */
1071ENTRY(error_entry)
1072	cld
1073	SAVE_C_REGS 8
1074	SAVE_EXTRA_REGS 8
1075	ENCODE_FRAME_POINTER 8
1076	xorl	%ebx, %ebx
1077	testb	$3, CS+8(%rsp)
1078	jz	.Lerror_kernelspace
1079
1080	/*
1081	 * We entered from user mode or we're pretending to have entered
1082	 * from user mode due to an IRET fault.
1083	 */
1084	SWAPGS
1085
1086.Lerror_entry_from_usermode_after_swapgs:
1087	/*
1088	 * We need to tell lockdep that IRQs are off.  We can't do this until
1089	 * we fix gsbase, and we should do it before enter_from_user_mode
1090	 * (which can take locks).
1091	 */
1092	TRACE_IRQS_OFF
1093	CALL_enter_from_user_mode
1094	ret
1095
1096.Lerror_entry_done:
1097	TRACE_IRQS_OFF
1098	ret
1099
1100	/*
1101	 * There are two places in the kernel that can potentially fault with
1102	 * usergs. Handle them here.  B stepping K8s sometimes report a
1103	 * truncated RIP for IRET exceptions returning to compat mode. Check
1104	 * for these here too.
1105	 */
1106.Lerror_kernelspace:
1107	incl	%ebx
1108	leaq	native_irq_return_iret(%rip), %rcx
1109	cmpq	%rcx, RIP+8(%rsp)
1110	je	.Lerror_bad_iret
1111	movl	%ecx, %eax			/* zero extend */
1112	cmpq	%rax, RIP+8(%rsp)
1113	je	.Lbstep_iret
1114	cmpq	$.Lgs_change, RIP+8(%rsp)
1115	jne	.Lerror_entry_done
1116
1117	/*
1118	 * hack: .Lgs_change can fail with user gsbase.  If this happens, fix up
1119	 * gsbase and proceed.  We'll fix up the exception and land in
1120	 * .Lgs_change's error handler with kernel gsbase.
1121	 */
1122	SWAPGS
1123	jmp .Lerror_entry_done
1124
1125.Lbstep_iret:
1126	/* Fix truncated RIP */
1127	movq	%rcx, RIP+8(%rsp)
1128	/* fall through */
1129
1130.Lerror_bad_iret:
1131	/*
1132	 * We came from an IRET to user mode, so we have user gsbase.
1133	 * Switch to kernel gsbase:
1134	 */
1135	SWAPGS
1136
1137	/*
1138	 * Pretend that the exception came from user mode: set up pt_regs
1139	 * as if we faulted immediately after IRET and clear EBX so that
1140	 * error_exit knows that we will be returning to user mode.
1141	 */
1142	mov	%rsp, %rdi
1143	call	fixup_bad_iret
1144	mov	%rax, %rsp
1145	decl	%ebx
1146	jmp	.Lerror_entry_from_usermode_after_swapgs
1147END(error_entry)
1148
1149
1150/*
1151 * On entry, EBX is a "return to kernel mode" flag:
1152 *   1: already in kernel mode, don't need SWAPGS
1153 *   0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1154 */
1155ENTRY(error_exit)
1156	DISABLE_INTERRUPTS(CLBR_ANY)
1157	TRACE_IRQS_OFF
1158	testl	%ebx, %ebx
1159	jnz	retint_kernel
1160	jmp	retint_user
1161END(error_exit)
1162
1163/* Runs on exception stack */
1164ENTRY(nmi)
1165	/*
1166	 * Fix up the exception frame if we're on Xen.
1167	 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1168	 * one value to the stack on native, so it may clobber the rdx
1169	 * scratch slot, but it won't clobber any of the important
1170	 * slots past it.
1171	 *
1172	 * Xen is a different story, because the Xen frame itself overlaps
1173	 * the "NMI executing" variable.
1174	 */
1175	PARAVIRT_ADJUST_EXCEPTION_FRAME
1176
1177	/*
1178	 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1179	 * the iretq it performs will take us out of NMI context.
1180	 * This means that we can have nested NMIs where the next
1181	 * NMI is using the top of the stack of the previous NMI. We
1182	 * can't let it execute because the nested NMI will corrupt the
1183	 * stack of the previous NMI. NMI handlers are not re-entrant
1184	 * anyway.
1185	 *
1186	 * To handle this case we do the following:
1187	 *  Check the a special location on the stack that contains
1188	 *  a variable that is set when NMIs are executing.
1189	 *  The interrupted task's stack is also checked to see if it
1190	 *  is an NMI stack.
1191	 *  If the variable is not set and the stack is not the NMI
1192	 *  stack then:
1193	 *    o Set the special variable on the stack
1194	 *    o Copy the interrupt frame into an "outermost" location on the
1195	 *      stack
1196	 *    o Copy the interrupt frame into an "iret" location on the stack
1197	 *    o Continue processing the NMI
1198	 *  If the variable is set or the previous stack is the NMI stack:
1199	 *    o Modify the "iret" location to jump to the repeat_nmi
1200	 *    o return back to the first NMI
1201	 *
1202	 * Now on exit of the first NMI, we first clear the stack variable
1203	 * The NMI stack will tell any nested NMIs at that point that it is
1204	 * nested. Then we pop the stack normally with iret, and if there was
1205	 * a nested NMI that updated the copy interrupt stack frame, a
1206	 * jump will be made to the repeat_nmi code that will handle the second
1207	 * NMI.
1208	 *
1209	 * However, espfix prevents us from directly returning to userspace
1210	 * with a single IRET instruction.  Similarly, IRET to user mode
1211	 * can fault.  We therefore handle NMIs from user space like
1212	 * other IST entries.
1213	 */
1214
1215	/* Use %rdx as our temp variable throughout */
1216	pushq	%rdx
1217
1218	testb	$3, CS-RIP+8(%rsp)
1219	jz	.Lnmi_from_kernel
1220
1221	/*
1222	 * NMI from user mode.  We need to run on the thread stack, but we
1223	 * can't go through the normal entry paths: NMIs are masked, and
1224	 * we don't want to enable interrupts, because then we'll end
1225	 * up in an awkward situation in which IRQs are on but NMIs
1226	 * are off.
1227	 *
1228	 * We also must not push anything to the stack before switching
1229	 * stacks lest we corrupt the "NMI executing" variable.
1230	 */
1231
1232	SWAPGS_UNSAFE_STACK
1233	cld
1234	movq	%rsp, %rdx
1235	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1236	pushq	5*8(%rdx)	/* pt_regs->ss */
1237	pushq	4*8(%rdx)	/* pt_regs->rsp */
1238	pushq	3*8(%rdx)	/* pt_regs->flags */
1239	pushq	2*8(%rdx)	/* pt_regs->cs */
1240	pushq	1*8(%rdx)	/* pt_regs->rip */
1241	pushq   $-1		/* pt_regs->orig_ax */
1242	pushq   %rdi		/* pt_regs->di */
1243	pushq   %rsi		/* pt_regs->si */
1244	pushq   (%rdx)		/* pt_regs->dx */
1245	pushq   %rcx		/* pt_regs->cx */
1246	pushq   %rax		/* pt_regs->ax */
1247	pushq   %r8		/* pt_regs->r8 */
1248	pushq   %r9		/* pt_regs->r9 */
1249	pushq   %r10		/* pt_regs->r10 */
1250	pushq   %r11		/* pt_regs->r11 */
1251	pushq	%rbx		/* pt_regs->rbx */
1252	pushq	%rbp		/* pt_regs->rbp */
1253	pushq	%r12		/* pt_regs->r12 */
1254	pushq	%r13		/* pt_regs->r13 */
1255	pushq	%r14		/* pt_regs->r14 */
1256	pushq	%r15		/* pt_regs->r15 */
1257	ENCODE_FRAME_POINTER
1258
1259	/*
1260	 * At this point we no longer need to worry about stack damage
1261	 * due to nesting -- we're on the normal thread stack and we're
1262	 * done with the NMI stack.
1263	 */
1264
1265	movq	%rsp, %rdi
1266	movq	$-1, %rsi
1267	call	do_nmi
1268
1269	/*
1270	 * Return back to user mode.  We must *not* do the normal exit
1271	 * work, because we don't want to enable interrupts.
1272	 */
1273	SWAPGS
1274	jmp	restore_regs_and_iret
1275
1276.Lnmi_from_kernel:
1277	/*
1278	 * Here's what our stack frame will look like:
1279	 * +---------------------------------------------------------+
1280	 * | original SS                                             |
1281	 * | original Return RSP                                     |
1282	 * | original RFLAGS                                         |
1283	 * | original CS                                             |
1284	 * | original RIP                                            |
1285	 * +---------------------------------------------------------+
1286	 * | temp storage for rdx                                    |
1287	 * +---------------------------------------------------------+
1288	 * | "NMI executing" variable                                |
1289	 * +---------------------------------------------------------+
1290	 * | iret SS          } Copied from "outermost" frame        |
1291	 * | iret Return RSP  } on each loop iteration; overwritten  |
1292	 * | iret RFLAGS      } by a nested NMI to force another     |
1293	 * | iret CS          } iteration if needed.                 |
1294	 * | iret RIP         }                                      |
1295	 * +---------------------------------------------------------+
1296	 * | outermost SS          } initialized in first_nmi;       |
1297	 * | outermost Return RSP  } will not be changed before      |
1298	 * | outermost RFLAGS      } NMI processing is done.         |
1299	 * | outermost CS          } Copied to "iret" frame on each  |
1300	 * | outermost RIP         } iteration.                      |
1301	 * +---------------------------------------------------------+
1302	 * | pt_regs                                                 |
1303	 * +---------------------------------------------------------+
1304	 *
1305	 * The "original" frame is used by hardware.  Before re-enabling
1306	 * NMIs, we need to be done with it, and we need to leave enough
1307	 * space for the asm code here.
1308	 *
1309	 * We return by executing IRET while RSP points to the "iret" frame.
1310	 * That will either return for real or it will loop back into NMI
1311	 * processing.
1312	 *
1313	 * The "outermost" frame is copied to the "iret" frame on each
1314	 * iteration of the loop, so each iteration starts with the "iret"
1315	 * frame pointing to the final return target.
1316	 */
1317
1318	/*
1319	 * Determine whether we're a nested NMI.
1320	 *
1321	 * If we interrupted kernel code between repeat_nmi and
1322	 * end_repeat_nmi, then we are a nested NMI.  We must not
1323	 * modify the "iret" frame because it's being written by
1324	 * the outer NMI.  That's okay; the outer NMI handler is
1325	 * about to about to call do_nmi anyway, so we can just
1326	 * resume the outer NMI.
1327	 */
1328
1329	movq	$repeat_nmi, %rdx
1330	cmpq	8(%rsp), %rdx
1331	ja	1f
1332	movq	$end_repeat_nmi, %rdx
1333	cmpq	8(%rsp), %rdx
1334	ja	nested_nmi_out
13351:
1336
1337	/*
1338	 * Now check "NMI executing".  If it's set, then we're nested.
1339	 * This will not detect if we interrupted an outer NMI just
1340	 * before IRET.
1341	 */
1342	cmpl	$1, -8(%rsp)
1343	je	nested_nmi
1344
1345	/*
1346	 * Now test if the previous stack was an NMI stack.  This covers
1347	 * the case where we interrupt an outer NMI after it clears
1348	 * "NMI executing" but before IRET.  We need to be careful, though:
1349	 * there is one case in which RSP could point to the NMI stack
1350	 * despite there being no NMI active: naughty userspace controls
1351	 * RSP at the very beginning of the SYSCALL targets.  We can
1352	 * pull a fast one on naughty userspace, though: we program
1353	 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1354	 * if it controls the kernel's RSP.  We set DF before we clear
1355	 * "NMI executing".
1356	 */
1357	lea	6*8(%rsp), %rdx
1358	/* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1359	cmpq	%rdx, 4*8(%rsp)
1360	/* If the stack pointer is above the NMI stack, this is a normal NMI */
1361	ja	first_nmi
1362
1363	subq	$EXCEPTION_STKSZ, %rdx
1364	cmpq	%rdx, 4*8(%rsp)
1365	/* If it is below the NMI stack, it is a normal NMI */
1366	jb	first_nmi
1367
1368	/* Ah, it is within the NMI stack. */
1369
1370	testb	$(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1371	jz	first_nmi	/* RSP was user controlled. */
1372
1373	/* This is a nested NMI. */
1374
1375nested_nmi:
1376	/*
1377	 * Modify the "iret" frame to point to repeat_nmi, forcing another
1378	 * iteration of NMI handling.
1379	 */
1380	subq	$8, %rsp
1381	leaq	-10*8(%rsp), %rdx
1382	pushq	$__KERNEL_DS
1383	pushq	%rdx
1384	pushfq
1385	pushq	$__KERNEL_CS
1386	pushq	$repeat_nmi
1387
1388	/* Put stack back */
1389	addq	$(6*8), %rsp
1390
1391nested_nmi_out:
1392	popq	%rdx
1393
1394	/* We are returning to kernel mode, so this cannot result in a fault. */
1395	INTERRUPT_RETURN
1396
1397first_nmi:
1398	/* Restore rdx. */
1399	movq	(%rsp), %rdx
1400
1401	/* Make room for "NMI executing". */
1402	pushq	$0
1403
1404	/* Leave room for the "iret" frame */
1405	subq	$(5*8), %rsp
1406
1407	/* Copy the "original" frame to the "outermost" frame */
1408	.rept 5
1409	pushq	11*8(%rsp)
1410	.endr
1411
1412	/* Everything up to here is safe from nested NMIs */
1413
1414#ifdef CONFIG_DEBUG_ENTRY
1415	/*
1416	 * For ease of testing, unmask NMIs right away.  Disabled by
1417	 * default because IRET is very expensive.
1418	 */
1419	pushq	$0		/* SS */
1420	pushq	%rsp		/* RSP (minus 8 because of the previous push) */
1421	addq	$8, (%rsp)	/* Fix up RSP */
1422	pushfq			/* RFLAGS */
1423	pushq	$__KERNEL_CS	/* CS */
1424	pushq	$1f		/* RIP */
1425	INTERRUPT_RETURN	/* continues at repeat_nmi below */
14261:
1427#endif
1428
1429repeat_nmi:
1430	/*
1431	 * If there was a nested NMI, the first NMI's iret will return
1432	 * here. But NMIs are still enabled and we can take another
1433	 * nested NMI. The nested NMI checks the interrupted RIP to see
1434	 * if it is between repeat_nmi and end_repeat_nmi, and if so
1435	 * it will just return, as we are about to repeat an NMI anyway.
1436	 * This makes it safe to copy to the stack frame that a nested
1437	 * NMI will update.
1438	 *
1439	 * RSP is pointing to "outermost RIP".  gsbase is unknown, but, if
1440	 * we're repeating an NMI, gsbase has the same value that it had on
1441	 * the first iteration.  paranoid_entry will load the kernel
1442	 * gsbase if needed before we call do_nmi.  "NMI executing"
1443	 * is zero.
1444	 */
1445	movq	$1, 10*8(%rsp)		/* Set "NMI executing". */
1446
1447	/*
1448	 * Copy the "outermost" frame to the "iret" frame.  NMIs that nest
1449	 * here must not modify the "iret" frame while we're writing to
1450	 * it or it will end up containing garbage.
1451	 */
1452	addq	$(10*8), %rsp
1453	.rept 5
1454	pushq	-6*8(%rsp)
1455	.endr
1456	subq	$(5*8), %rsp
1457end_repeat_nmi:
1458
1459	/*
1460	 * Everything below this point can be preempted by a nested NMI.
1461	 * If this happens, then the inner NMI will change the "iret"
1462	 * frame to point back to repeat_nmi.
1463	 */
1464	pushq	$-1				/* ORIG_RAX: no syscall to restart */
1465	ALLOC_PT_GPREGS_ON_STACK
1466
1467	/*
1468	 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1469	 * as we should not be calling schedule in NMI context.
1470	 * Even with normal interrupts enabled. An NMI should not be
1471	 * setting NEED_RESCHED or anything that normal interrupts and
1472	 * exceptions might do.
1473	 */
1474	call	paranoid_entry
1475
1476	/* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1477	movq	%rsp, %rdi
1478	movq	$-1, %rsi
1479	call	do_nmi
1480
1481	testl	%ebx, %ebx			/* swapgs needed? */
1482	jnz	nmi_restore
1483nmi_swapgs:
1484	SWAPGS_UNSAFE_STACK
1485nmi_restore:
1486	RESTORE_EXTRA_REGS
1487	RESTORE_C_REGS
1488
1489	/* Point RSP at the "iret" frame. */
1490	REMOVE_PT_GPREGS_FROM_STACK 6*8
1491
1492	/*
1493	 * Clear "NMI executing".  Set DF first so that we can easily
1494	 * distinguish the remaining code between here and IRET from
1495	 * the SYSCALL entry and exit paths.  On a native kernel, we
1496	 * could just inspect RIP, but, on paravirt kernels,
1497	 * INTERRUPT_RETURN can translate into a jump into a
1498	 * hypercall page.
1499	 */
1500	std
1501	movq	$0, 5*8(%rsp)		/* clear "NMI executing" */
1502
1503	/*
1504	 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1505	 * stack in a single instruction.  We are returning to kernel
1506	 * mode, so this cannot result in a fault.
1507	 */
1508	INTERRUPT_RETURN
1509END(nmi)
1510
1511ENTRY(ignore_sysret)
1512	mov	$-ENOSYS, %eax
1513	sysret
1514END(ignore_sysret)
1515
1516ENTRY(rewind_stack_do_exit)
1517	/* Prevent any naive code from trying to unwind to our caller. */
1518	xorl	%ebp, %ebp
1519
1520	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rax
1521	leaq	-TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1522
1523	call	do_exit
15241:	jmp 1b
1525END(rewind_stack_do_exit)
1526