1/* 2 * linux/arch/x86_64/entry.S 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * 8 * entry.S contains the system-call and fault low-level handling routines. 9 * 10 * Some of this is documented in Documentation/x86/entry_64.txt 11 * 12 * A note on terminology: 13 * - iret frame: Architecture defined interrupt frame from SS to RIP 14 * at the top of the kernel process stack. 15 * 16 * Some macro usage: 17 * - ENTRY/END: Define functions in the symbol table. 18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 19 * - idtentry: Define exception entry points. 20 */ 21#include <linux/linkage.h> 22#include <asm/segment.h> 23#include <asm/cache.h> 24#include <asm/errno.h> 25#include "calling.h" 26#include <asm/asm-offsets.h> 27#include <asm/msr.h> 28#include <asm/unistd.h> 29#include <asm/thread_info.h> 30#include <asm/hw_irq.h> 31#include <asm/page_types.h> 32#include <asm/irqflags.h> 33#include <asm/paravirt.h> 34#include <asm/percpu.h> 35#include <asm/asm.h> 36#include <asm/smap.h> 37#include <asm/pgtable_types.h> 38#include <linux/err.h> 39 40/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ 41#include <linux/elf-em.h> 42#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) 43#define __AUDIT_ARCH_64BIT 0x80000000 44#define __AUDIT_ARCH_LE 0x40000000 45 46.code64 47.section .entry.text, "ax" 48 49#ifdef CONFIG_PARAVIRT 50ENTRY(native_usergs_sysret64) 51 swapgs 52 sysretq 53ENDPROC(native_usergs_sysret64) 54#endif /* CONFIG_PARAVIRT */ 55 56.macro TRACE_IRQS_IRETQ 57#ifdef CONFIG_TRACE_IRQFLAGS 58 bt $9, EFLAGS(%rsp) /* interrupts off? */ 59 jnc 1f 60 TRACE_IRQS_ON 611: 62#endif 63.endm 64 65/* 66 * When dynamic function tracer is enabled it will add a breakpoint 67 * to all locations that it is about to modify, sync CPUs, update 68 * all the code, sync CPUs, then remove the breakpoints. In this time 69 * if lockdep is enabled, it might jump back into the debug handler 70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 71 * 72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 73 * make sure the stack pointer does not get reset back to the top 74 * of the debug stack, and instead just reuses the current stack. 75 */ 76#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 77 78.macro TRACE_IRQS_OFF_DEBUG 79 call debug_stack_set_zero 80 TRACE_IRQS_OFF 81 call debug_stack_reset 82.endm 83 84.macro TRACE_IRQS_ON_DEBUG 85 call debug_stack_set_zero 86 TRACE_IRQS_ON 87 call debug_stack_reset 88.endm 89 90.macro TRACE_IRQS_IRETQ_DEBUG 91 bt $9, EFLAGS(%rsp) /* interrupts off? */ 92 jnc 1f 93 TRACE_IRQS_ON_DEBUG 941: 95.endm 96 97#else 98# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 99# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 100# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 101#endif 102 103/* 104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 105 * 106 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 107 * then loads new ss, cs, and rip from previously programmed MSRs. 108 * rflags gets masked by a value from another MSR (so CLD and CLAC 109 * are not needed). SYSCALL does not save anything on the stack 110 * and does not change rsp. 111 * 112 * Registers on entry: 113 * rax system call number 114 * rcx return address 115 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 116 * rdi arg0 117 * rsi arg1 118 * rdx arg2 119 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 120 * r8 arg4 121 * r9 arg5 122 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 123 * 124 * Only called from user space. 125 * 126 * When user can change pt_regs->foo always force IRET. That is because 127 * it deals with uncanonical addresses better. SYSRET has trouble 128 * with them due to bugs in both AMD and Intel CPUs. 129 */ 130 131ENTRY(entry_SYSCALL_64) 132 /* 133 * Interrupts are off on entry. 134 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 135 * it is too small to ever cause noticeable irq latency. 136 */ 137 SWAPGS_UNSAFE_STACK 138 /* 139 * A hypervisor implementation might want to use a label 140 * after the swapgs, so that it can do the swapgs 141 * for the guest and jump here on syscall. 142 */ 143GLOBAL(entry_SYSCALL_64_after_swapgs) 144 145 movq %rsp, PER_CPU_VAR(rsp_scratch) 146 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 147 148 /* Construct struct pt_regs on stack */ 149 pushq $__USER_DS /* pt_regs->ss */ 150 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 151 /* 152 * Re-enable interrupts. 153 * We use 'rsp_scratch' as a scratch space, hence irq-off block above 154 * must execute atomically in the face of possible interrupt-driven 155 * task preemption. We must enable interrupts only after we're done 156 * with using rsp_scratch: 157 */ 158 ENABLE_INTERRUPTS(CLBR_NONE) 159 pushq %r11 /* pt_regs->flags */ 160 pushq $__USER_CS /* pt_regs->cs */ 161 pushq %rcx /* pt_regs->ip */ 162 pushq %rax /* pt_regs->orig_ax */ 163 pushq %rdi /* pt_regs->di */ 164 pushq %rsi /* pt_regs->si */ 165 pushq %rdx /* pt_regs->dx */ 166 pushq %rcx /* pt_regs->cx */ 167 pushq $-ENOSYS /* pt_regs->ax */ 168 pushq %r8 /* pt_regs->r8 */ 169 pushq %r9 /* pt_regs->r9 */ 170 pushq %r10 /* pt_regs->r10 */ 171 pushq %r11 /* pt_regs->r11 */ 172 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 173 174 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 175 jnz tracesys 176entry_SYSCALL_64_fastpath: 177#if __SYSCALL_MASK == ~0 178 cmpq $__NR_syscall_max, %rax 179#else 180 andl $__SYSCALL_MASK, %eax 181 cmpl $__NR_syscall_max, %eax 182#endif 183 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 184 movq %r10, %rcx 185 call *sys_call_table(, %rax, 8) 186 movq %rax, RAX(%rsp) 1871: 188/* 189 * Syscall return path ending with SYSRET (fast path). 190 * Has incompletely filled pt_regs. 191 */ 192 LOCKDEP_SYS_EXIT 193 /* 194 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 195 * it is too small to ever cause noticeable irq latency. 196 */ 197 DISABLE_INTERRUPTS(CLBR_NONE) 198 199 /* 200 * We must check ti flags with interrupts (or at least preemption) 201 * off because we must *never* return to userspace without 202 * processing exit work that is enqueued if we're preempted here. 203 * In particular, returning to userspace with any of the one-shot 204 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is 205 * very bad. 206 */ 207 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 208 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */ 209 210 RESTORE_C_REGS_EXCEPT_RCX_R11 211 movq RIP(%rsp), %rcx 212 movq EFLAGS(%rsp), %r11 213 movq RSP(%rsp), %rsp 214 /* 215 * 64-bit SYSRET restores rip from rcx, 216 * rflags from r11 (but RF and VM bits are forced to 0), 217 * cs and ss are loaded from MSRs. 218 * Restoration of rflags re-enables interrupts. 219 * 220 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss 221 * descriptor is not reinitialized. This means that we should 222 * avoid SYSRET with SS == NULL, which could happen if we schedule, 223 * exit the kernel, and re-enter using an interrupt vector. (All 224 * interrupt entries on x86_64 set SS to NULL.) We prevent that 225 * from happening by reloading SS in __switch_to. (Actually 226 * detecting the failure in 64-bit userspace is tricky but can be 227 * done.) 228 */ 229 USERGS_SYSRET64 230 231GLOBAL(int_ret_from_sys_call_irqs_off) 232 TRACE_IRQS_ON 233 ENABLE_INTERRUPTS(CLBR_NONE) 234 jmp int_ret_from_sys_call 235 236 /* Do syscall entry tracing */ 237tracesys: 238 movq %rsp, %rdi 239 movl $AUDIT_ARCH_X86_64, %esi 240 call syscall_trace_enter_phase1 241 test %rax, %rax 242 jnz tracesys_phase2 /* if needed, run the slow path */ 243 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */ 244 movq ORIG_RAX(%rsp), %rax 245 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */ 246 247tracesys_phase2: 248 SAVE_EXTRA_REGS 249 movq %rsp, %rdi 250 movl $AUDIT_ARCH_X86_64, %esi 251 movq %rax, %rdx 252 call syscall_trace_enter_phase2 253 254 /* 255 * Reload registers from stack in case ptrace changed them. 256 * We don't reload %rax because syscall_trace_entry_phase2() returned 257 * the value it wants us to use in the table lookup. 258 */ 259 RESTORE_C_REGS_EXCEPT_RAX 260 RESTORE_EXTRA_REGS 261#if __SYSCALL_MASK == ~0 262 cmpq $__NR_syscall_max, %rax 263#else 264 andl $__SYSCALL_MASK, %eax 265 cmpl $__NR_syscall_max, %eax 266#endif 267 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 268 movq %r10, %rcx /* fixup for C */ 269 call *sys_call_table(, %rax, 8) 270 movq %rax, RAX(%rsp) 2711: 272 /* Use IRET because user could have changed pt_regs->foo */ 273 274/* 275 * Syscall return path ending with IRET. 276 * Has correct iret frame. 277 */ 278GLOBAL(int_ret_from_sys_call) 279 SAVE_EXTRA_REGS 280 movq %rsp, %rdi 281 call syscall_return_slowpath /* returns with IRQs disabled */ 282 RESTORE_EXTRA_REGS 283 TRACE_IRQS_IRETQ /* we're about to change IF */ 284 285 /* 286 * Try to use SYSRET instead of IRET if we're returning to 287 * a completely clean 64-bit userspace context. 288 */ 289 movq RCX(%rsp), %rcx 290 movq RIP(%rsp), %r11 291 cmpq %rcx, %r11 /* RCX == RIP */ 292 jne opportunistic_sysret_failed 293 294 /* 295 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 296 * in kernel space. This essentially lets the user take over 297 * the kernel, since userspace controls RSP. 298 * 299 * If width of "canonical tail" ever becomes variable, this will need 300 * to be updated to remain correct on both old and new CPUs. 301 */ 302 .ifne __VIRTUAL_MASK_SHIFT - 47 303 .error "virtual address width changed -- SYSRET checks need update" 304 .endif 305 306 /* Change top 16 bits to be the sign-extension of 47th bit */ 307 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 308 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 309 310 /* If this changed %rcx, it was not canonical */ 311 cmpq %rcx, %r11 312 jne opportunistic_sysret_failed 313 314 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 315 jne opportunistic_sysret_failed 316 317 movq R11(%rsp), %r11 318 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 319 jne opportunistic_sysret_failed 320 321 /* 322 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET, 323 * restoring TF results in a trap from userspace immediately after 324 * SYSRET. This would cause an infinite loop whenever #DB happens 325 * with register state that satisfies the opportunistic SYSRET 326 * conditions. For example, single-stepping this user code: 327 * 328 * movq $stuck_here, %rcx 329 * pushfq 330 * popq %r11 331 * stuck_here: 332 * 333 * would never get past 'stuck_here'. 334 */ 335 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 336 jnz opportunistic_sysret_failed 337 338 /* nothing to check for RSP */ 339 340 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 341 jne opportunistic_sysret_failed 342 343 /* 344 * We win! This label is here just for ease of understanding 345 * perf profiles. Nothing jumps here. 346 */ 347syscall_return_via_sysret: 348 /* rcx and r11 are already restored (see code above) */ 349 RESTORE_C_REGS_EXCEPT_RCX_R11 350 movq RSP(%rsp), %rsp 351 USERGS_SYSRET64 352 353opportunistic_sysret_failed: 354 SWAPGS 355 jmp restore_c_regs_and_iret 356END(entry_SYSCALL_64) 357 358 359 .macro FORK_LIKE func 360ENTRY(stub_\func) 361 SAVE_EXTRA_REGS 8 362 jmp sys_\func 363END(stub_\func) 364 .endm 365 366 FORK_LIKE clone 367 FORK_LIKE fork 368 FORK_LIKE vfork 369 370ENTRY(stub_execve) 371 call sys_execve 372return_from_execve: 373 testl %eax, %eax 374 jz 1f 375 /* exec failed, can use fast SYSRET code path in this case */ 376 ret 3771: 378 /* must use IRET code path (pt_regs->cs may have changed) */ 379 addq $8, %rsp 380 ZERO_EXTRA_REGS 381 movq %rax, RAX(%rsp) 382 jmp int_ret_from_sys_call 383END(stub_execve) 384/* 385 * Remaining execve stubs are only 7 bytes long. 386 * ENTRY() often aligns to 16 bytes, which in this case has no benefits. 387 */ 388 .align 8 389GLOBAL(stub_execveat) 390 call sys_execveat 391 jmp return_from_execve 392END(stub_execveat) 393 394#if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION) 395 .align 8 396GLOBAL(stub_x32_execve) 397GLOBAL(stub32_execve) 398 call compat_sys_execve 399 jmp return_from_execve 400END(stub32_execve) 401END(stub_x32_execve) 402 .align 8 403GLOBAL(stub_x32_execveat) 404GLOBAL(stub32_execveat) 405 call compat_sys_execveat 406 jmp return_from_execve 407END(stub32_execveat) 408END(stub_x32_execveat) 409#endif 410 411/* 412 * sigreturn is special because it needs to restore all registers on return. 413 * This cannot be done with SYSRET, so use the IRET return path instead. 414 */ 415ENTRY(stub_rt_sigreturn) 416 /* 417 * SAVE_EXTRA_REGS result is not normally needed: 418 * sigreturn overwrites all pt_regs->GPREGS. 419 * But sigreturn can fail (!), and there is no easy way to detect that. 420 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error, 421 * we SAVE_EXTRA_REGS here. 422 */ 423 SAVE_EXTRA_REGS 8 424 call sys_rt_sigreturn 425return_from_stub: 426 addq $8, %rsp 427 RESTORE_EXTRA_REGS 428 movq %rax, RAX(%rsp) 429 jmp int_ret_from_sys_call 430END(stub_rt_sigreturn) 431 432#ifdef CONFIG_X86_X32_ABI 433ENTRY(stub_x32_rt_sigreturn) 434 SAVE_EXTRA_REGS 8 435 call sys32_x32_rt_sigreturn 436 jmp return_from_stub 437END(stub_x32_rt_sigreturn) 438#endif 439 440/* 441 * A newly forked process directly context switches into this address. 442 * 443 * rdi: prev task we switched from 444 */ 445ENTRY(ret_from_fork) 446 447 LOCK ; btr $TIF_FORK, TI_flags(%r8) 448 449 pushq $0x0002 450 popfq /* reset kernel eflags */ 451 452 call schedule_tail /* rdi: 'prev' task parameter */ 453 454 RESTORE_EXTRA_REGS 455 456 testb $3, CS(%rsp) /* from kernel_thread? */ 457 458 /* 459 * By the time we get here, we have no idea whether our pt_regs, 460 * ti flags, and ti status came from the 64-bit SYSCALL fast path, 461 * the slow path, or one of the 32-bit compat paths. 462 * Use IRET code path to return, since it can safely handle 463 * all of the above. 464 */ 465 jnz int_ret_from_sys_call 466 467 /* 468 * We came from kernel_thread 469 * nb: we depend on RESTORE_EXTRA_REGS above 470 */ 471 movq %rbp, %rdi 472 call *%rbx 473 movl $0, RAX(%rsp) 474 RESTORE_EXTRA_REGS 475 jmp int_ret_from_sys_call 476END(ret_from_fork) 477 478/* 479 * Build the entry stubs with some assembler magic. 480 * We pack 1 stub into every 8-byte block. 481 */ 482 .align 8 483ENTRY(irq_entries_start) 484 vector=FIRST_EXTERNAL_VECTOR 485 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 486 pushq $(~vector+0x80) /* Note: always in signed byte range */ 487 vector=vector+1 488 jmp common_interrupt 489 .align 8 490 .endr 491END(irq_entries_start) 492 493/* 494 * Interrupt entry/exit. 495 * 496 * Interrupt entry points save only callee clobbered registers in fast path. 497 * 498 * Entry runs with interrupts off. 499 */ 500 501/* 0(%rsp): ~(interrupt number) */ 502 .macro interrupt func 503 cld 504 ALLOC_PT_GPREGS_ON_STACK 505 SAVE_C_REGS 506 SAVE_EXTRA_REGS 507 508 testb $3, CS(%rsp) 509 jz 1f 510 511 /* 512 * IRQ from user mode. Switch to kernel gsbase and inform context 513 * tracking that we're in kernel mode. 514 */ 515 SWAPGS 516#ifdef CONFIG_CONTEXT_TRACKING 517 call enter_from_user_mode 518#endif 519 5201: 521 /* 522 * Save previous stack pointer, optionally switch to interrupt stack. 523 * irq_count is used to check if a CPU is already on an interrupt stack 524 * or not. While this is essentially redundant with preempt_count it is 525 * a little cheaper to use a separate counter in the PDA (short of 526 * moving irq_enter into assembly, which would be too much work) 527 */ 528 movq %rsp, %rdi 529 incl PER_CPU_VAR(irq_count) 530 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 531 pushq %rdi 532 /* We entered an interrupt context - irqs are off: */ 533 TRACE_IRQS_OFF 534 535 call \func /* rdi points to pt_regs */ 536 .endm 537 538 /* 539 * The interrupt stubs push (~vector+0x80) onto the stack and 540 * then jump to common_interrupt. 541 */ 542 .p2align CONFIG_X86_L1_CACHE_SHIFT 543common_interrupt: 544 ASM_CLAC 545 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 546 interrupt do_IRQ 547 /* 0(%rsp): old RSP */ 548ret_from_intr: 549 DISABLE_INTERRUPTS(CLBR_NONE) 550 TRACE_IRQS_OFF 551 decl PER_CPU_VAR(irq_count) 552 553 /* Restore saved previous stack */ 554 popq %rsp 555 556 testb $3, CS(%rsp) 557 jz retint_kernel 558 559 /* Interrupt came from user space */ 560 LOCKDEP_SYS_EXIT_IRQ 561GLOBAL(retint_user) 562 mov %rsp,%rdi 563 call prepare_exit_to_usermode 564 TRACE_IRQS_IRETQ 565 SWAPGS 566 jmp restore_regs_and_iret 567 568/* Returning to kernel space */ 569retint_kernel: 570#ifdef CONFIG_PREEMPT 571 /* Interrupts are off */ 572 /* Check if we need preemption */ 573 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 574 jnc 1f 5750: cmpl $0, PER_CPU_VAR(__preempt_count) 576 jnz 1f 577 call preempt_schedule_irq 578 jmp 0b 5791: 580#endif 581 /* 582 * The iretq could re-enable interrupts: 583 */ 584 TRACE_IRQS_IRETQ 585 586/* 587 * At this label, code paths which return to kernel and to user, 588 * which come from interrupts/exception and from syscalls, merge. 589 */ 590restore_regs_and_iret: 591 RESTORE_EXTRA_REGS 592restore_c_regs_and_iret: 593 RESTORE_C_REGS 594 REMOVE_PT_GPREGS_FROM_STACK 8 595 INTERRUPT_RETURN 596 597ENTRY(native_iret) 598 /* 599 * Are we returning to a stack segment from the LDT? Note: in 600 * 64-bit mode SS:RSP on the exception stack is always valid. 601 */ 602#ifdef CONFIG_X86_ESPFIX64 603 testb $4, (SS-RIP)(%rsp) 604 jnz native_irq_return_ldt 605#endif 606 607.global native_irq_return_iret 608native_irq_return_iret: 609 /* 610 * This may fault. Non-paranoid faults on return to userspace are 611 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 612 * Double-faults due to espfix64 are handled in do_double_fault. 613 * Other faults here are fatal. 614 */ 615 iretq 616 617#ifdef CONFIG_X86_ESPFIX64 618native_irq_return_ldt: 619 pushq %rax 620 pushq %rdi 621 SWAPGS 622 movq PER_CPU_VAR(espfix_waddr), %rdi 623 movq %rax, (0*8)(%rdi) /* RAX */ 624 movq (2*8)(%rsp), %rax /* RIP */ 625 movq %rax, (1*8)(%rdi) 626 movq (3*8)(%rsp), %rax /* CS */ 627 movq %rax, (2*8)(%rdi) 628 movq (4*8)(%rsp), %rax /* RFLAGS */ 629 movq %rax, (3*8)(%rdi) 630 movq (6*8)(%rsp), %rax /* SS */ 631 movq %rax, (5*8)(%rdi) 632 movq (5*8)(%rsp), %rax /* RSP */ 633 movq %rax, (4*8)(%rdi) 634 andl $0xffff0000, %eax 635 popq %rdi 636 orq PER_CPU_VAR(espfix_stack), %rax 637 SWAPGS 638 movq %rax, %rsp 639 popq %rax 640 jmp native_irq_return_iret 641#endif 642END(common_interrupt) 643 644/* 645 * APIC interrupts. 646 */ 647.macro apicinterrupt3 num sym do_sym 648ENTRY(\sym) 649 ASM_CLAC 650 pushq $~(\num) 651.Lcommon_\sym: 652 interrupt \do_sym 653 jmp ret_from_intr 654END(\sym) 655.endm 656 657#ifdef CONFIG_TRACING 658#define trace(sym) trace_##sym 659#define smp_trace(sym) smp_trace_##sym 660 661.macro trace_apicinterrupt num sym 662apicinterrupt3 \num trace(\sym) smp_trace(\sym) 663.endm 664#else 665.macro trace_apicinterrupt num sym do_sym 666.endm 667#endif 668 669.macro apicinterrupt num sym do_sym 670apicinterrupt3 \num \sym \do_sym 671trace_apicinterrupt \num \sym 672.endm 673 674#ifdef CONFIG_SMP 675apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 676apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 677#endif 678 679#ifdef CONFIG_X86_UV 680apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 681#endif 682 683apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 684apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 685 686#ifdef CONFIG_HAVE_KVM 687apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 688apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 689#endif 690 691#ifdef CONFIG_X86_MCE_THRESHOLD 692apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 693#endif 694 695#ifdef CONFIG_X86_MCE_AMD 696apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 697#endif 698 699#ifdef CONFIG_X86_THERMAL_VECTOR 700apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 701#endif 702 703#ifdef CONFIG_SMP 704apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 705apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 706apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 707#endif 708 709apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 710apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 711 712#ifdef CONFIG_IRQ_WORK 713apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 714#endif 715 716/* 717 * Exception entry points. 718 */ 719#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) 720 721.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 722ENTRY(\sym) 723 /* Sanity check */ 724 .if \shift_ist != -1 && \paranoid == 0 725 .error "using shift_ist requires paranoid=1" 726 .endif 727 728 ASM_CLAC 729 PARAVIRT_ADJUST_EXCEPTION_FRAME 730 731 .ifeq \has_error_code 732 pushq $-1 /* ORIG_RAX: no syscall to restart */ 733 .endif 734 735 ALLOC_PT_GPREGS_ON_STACK 736 737 .if \paranoid 738 .if \paranoid == 1 739 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 740 jnz 1f 741 .endif 742 call paranoid_entry 743 .else 744 call error_entry 745 .endif 746 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 747 748 .if \paranoid 749 .if \shift_ist != -1 750 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 751 .else 752 TRACE_IRQS_OFF 753 .endif 754 .endif 755 756 movq %rsp, %rdi /* pt_regs pointer */ 757 758 .if \has_error_code 759 movq ORIG_RAX(%rsp), %rsi /* get error code */ 760 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 761 .else 762 xorl %esi, %esi /* no error code */ 763 .endif 764 765 .if \shift_ist != -1 766 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 767 .endif 768 769 call \do_sym 770 771 .if \shift_ist != -1 772 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 773 .endif 774 775 /* these procedures expect "no swapgs" flag in ebx */ 776 .if \paranoid 777 jmp paranoid_exit 778 .else 779 jmp error_exit 780 .endif 781 782 .if \paranoid == 1 783 /* 784 * Paranoid entry from userspace. Switch stacks and treat it 785 * as a normal entry. This means that paranoid handlers 786 * run in real process context if user_mode(regs). 787 */ 7881: 789 call error_entry 790 791 792 movq %rsp, %rdi /* pt_regs pointer */ 793 call sync_regs 794 movq %rax, %rsp /* switch stack */ 795 796 movq %rsp, %rdi /* pt_regs pointer */ 797 798 .if \has_error_code 799 movq ORIG_RAX(%rsp), %rsi /* get error code */ 800 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 801 .else 802 xorl %esi, %esi /* no error code */ 803 .endif 804 805 call \do_sym 806 807 jmp error_exit /* %ebx: no swapgs flag */ 808 .endif 809END(\sym) 810.endm 811 812#ifdef CONFIG_TRACING 813.macro trace_idtentry sym do_sym has_error_code:req 814idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code 815idtentry \sym \do_sym has_error_code=\has_error_code 816.endm 817#else 818.macro trace_idtentry sym do_sym has_error_code:req 819idtentry \sym \do_sym has_error_code=\has_error_code 820.endm 821#endif 822 823idtentry divide_error do_divide_error has_error_code=0 824idtentry overflow do_overflow has_error_code=0 825idtentry bounds do_bounds has_error_code=0 826idtentry invalid_op do_invalid_op has_error_code=0 827idtentry device_not_available do_device_not_available has_error_code=0 828idtentry double_fault do_double_fault has_error_code=1 paranoid=2 829idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 830idtentry invalid_TSS do_invalid_TSS has_error_code=1 831idtentry segment_not_present do_segment_not_present has_error_code=1 832idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 833idtentry coprocessor_error do_coprocessor_error has_error_code=0 834idtentry alignment_check do_alignment_check has_error_code=1 835idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 836 837 838 /* 839 * Reload gs selector with exception handling 840 * edi: new selector 841 */ 842ENTRY(native_load_gs_index) 843 pushfq 844 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 845 SWAPGS 846gs_change: 847 movl %edi, %gs 8482: mfence /* workaround */ 849 SWAPGS 850 popfq 851 ret 852END(native_load_gs_index) 853 854 _ASM_EXTABLE(gs_change, bad_gs) 855 .section .fixup, "ax" 856 /* running with kernelgs */ 857bad_gs: 858 SWAPGS /* switch back to user gs */ 859 xorl %eax, %eax 860 movl %eax, %gs 861 jmp 2b 862 .previous 863 864/* Call softirq on interrupt stack. Interrupts are off. */ 865ENTRY(do_softirq_own_stack) 866 pushq %rbp 867 mov %rsp, %rbp 868 incl PER_CPU_VAR(irq_count) 869 cmove PER_CPU_VAR(irq_stack_ptr), %rsp 870 push %rbp /* frame pointer backlink */ 871 call __do_softirq 872 leaveq 873 decl PER_CPU_VAR(irq_count) 874 ret 875END(do_softirq_own_stack) 876 877#ifdef CONFIG_XEN 878idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 879 880/* 881 * A note on the "critical region" in our callback handler. 882 * We want to avoid stacking callback handlers due to events occurring 883 * during handling of the last event. To do this, we keep events disabled 884 * until we've done all processing. HOWEVER, we must enable events before 885 * popping the stack frame (can't be done atomically) and so it would still 886 * be possible to get enough handler activations to overflow the stack. 887 * Although unlikely, bugs of that kind are hard to track down, so we'd 888 * like to avoid the possibility. 889 * So, on entry to the handler we detect whether we interrupted an 890 * existing activation in its critical region -- if so, we pop the current 891 * activation and restart the handler using the previous one. 892 */ 893ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 894 895/* 896 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 897 * see the correct pointer to the pt_regs 898 */ 899 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 90011: incl PER_CPU_VAR(irq_count) 901 movq %rsp, %rbp 902 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 903 pushq %rbp /* frame pointer backlink */ 904 call xen_evtchn_do_upcall 905 popq %rsp 906 decl PER_CPU_VAR(irq_count) 907#ifndef CONFIG_PREEMPT 908 call xen_maybe_preempt_hcall 909#endif 910 jmp error_exit 911END(xen_do_hypervisor_callback) 912 913/* 914 * Hypervisor uses this for application faults while it executes. 915 * We get here for two reasons: 916 * 1. Fault while reloading DS, ES, FS or GS 917 * 2. Fault while executing IRET 918 * Category 1 we do not need to fix up as Xen has already reloaded all segment 919 * registers that could be reloaded and zeroed the others. 920 * Category 2 we fix up by killing the current process. We cannot use the 921 * normal Linux return path in this case because if we use the IRET hypercall 922 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 923 * We distinguish between categories by comparing each saved segment register 924 * with its current contents: any discrepancy means we in category 1. 925 */ 926ENTRY(xen_failsafe_callback) 927 movl %ds, %ecx 928 cmpw %cx, 0x10(%rsp) 929 jne 1f 930 movl %es, %ecx 931 cmpw %cx, 0x18(%rsp) 932 jne 1f 933 movl %fs, %ecx 934 cmpw %cx, 0x20(%rsp) 935 jne 1f 936 movl %gs, %ecx 937 cmpw %cx, 0x28(%rsp) 938 jne 1f 939 /* All segments match their saved values => Category 2 (Bad IRET). */ 940 movq (%rsp), %rcx 941 movq 8(%rsp), %r11 942 addq $0x30, %rsp 943 pushq $0 /* RIP */ 944 pushq %r11 945 pushq %rcx 946 jmp general_protection 9471: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 948 movq (%rsp), %rcx 949 movq 8(%rsp), %r11 950 addq $0x30, %rsp 951 pushq $-1 /* orig_ax = -1 => not a system call */ 952 ALLOC_PT_GPREGS_ON_STACK 953 SAVE_C_REGS 954 SAVE_EXTRA_REGS 955 jmp error_exit 956END(xen_failsafe_callback) 957 958apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 959 xen_hvm_callback_vector xen_evtchn_do_upcall 960 961#endif /* CONFIG_XEN */ 962 963#if IS_ENABLED(CONFIG_HYPERV) 964apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 965 hyperv_callback_vector hyperv_vector_handler 966#endif /* CONFIG_HYPERV */ 967 968idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 969idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 970idtentry stack_segment do_stack_segment has_error_code=1 971 972#ifdef CONFIG_XEN 973idtentry xen_debug do_debug has_error_code=0 974idtentry xen_int3 do_int3 has_error_code=0 975idtentry xen_stack_segment do_stack_segment has_error_code=1 976#endif 977 978idtentry general_protection do_general_protection has_error_code=1 979trace_idtentry page_fault do_page_fault has_error_code=1 980 981#ifdef CONFIG_KVM_GUEST 982idtentry async_page_fault do_async_page_fault has_error_code=1 983#endif 984 985#ifdef CONFIG_X86_MCE 986idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 987#endif 988 989/* 990 * Save all registers in pt_regs, and switch gs if needed. 991 * Use slow, but surefire "are we in kernel?" check. 992 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 993 */ 994ENTRY(paranoid_entry) 995 cld 996 SAVE_C_REGS 8 997 SAVE_EXTRA_REGS 8 998 movl $1, %ebx 999 movl $MSR_GS_BASE, %ecx 1000 rdmsr 1001 testl %edx, %edx 1002 js 1f /* negative -> in kernel */ 1003 SWAPGS 1004 xorl %ebx, %ebx 10051: ret 1006END(paranoid_entry) 1007 1008/* 1009 * "Paranoid" exit path from exception stack. This is invoked 1010 * only on return from non-NMI IST interrupts that came 1011 * from kernel space. 1012 * 1013 * We may be returning to very strange contexts (e.g. very early 1014 * in syscall entry), so checking for preemption here would 1015 * be complicated. Fortunately, we there's no good reason 1016 * to try to handle preemption here. 1017 * 1018 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1019 */ 1020ENTRY(paranoid_exit) 1021 DISABLE_INTERRUPTS(CLBR_NONE) 1022 TRACE_IRQS_OFF_DEBUG 1023 testl %ebx, %ebx /* swapgs needed? */ 1024 jnz paranoid_exit_no_swapgs 1025 TRACE_IRQS_IRETQ 1026 SWAPGS_UNSAFE_STACK 1027 jmp paranoid_exit_restore 1028paranoid_exit_no_swapgs: 1029 TRACE_IRQS_IRETQ_DEBUG 1030paranoid_exit_restore: 1031 RESTORE_EXTRA_REGS 1032 RESTORE_C_REGS 1033 REMOVE_PT_GPREGS_FROM_STACK 8 1034 INTERRUPT_RETURN 1035END(paranoid_exit) 1036 1037/* 1038 * Save all registers in pt_regs, and switch gs if needed. 1039 * Return: EBX=0: came from user mode; EBX=1: otherwise 1040 */ 1041ENTRY(error_entry) 1042 cld 1043 SAVE_C_REGS 8 1044 SAVE_EXTRA_REGS 8 1045 xorl %ebx, %ebx 1046 testb $3, CS+8(%rsp) 1047 jz .Lerror_kernelspace 1048 1049.Lerror_entry_from_usermode_swapgs: 1050 /* 1051 * We entered from user mode or we're pretending to have entered 1052 * from user mode due to an IRET fault. 1053 */ 1054 SWAPGS 1055 1056.Lerror_entry_from_usermode_after_swapgs: 1057#ifdef CONFIG_CONTEXT_TRACKING 1058 call enter_from_user_mode 1059#endif 1060 1061.Lerror_entry_done: 1062 1063 TRACE_IRQS_OFF 1064 ret 1065 1066 /* 1067 * There are two places in the kernel that can potentially fault with 1068 * usergs. Handle them here. B stepping K8s sometimes report a 1069 * truncated RIP for IRET exceptions returning to compat mode. Check 1070 * for these here too. 1071 */ 1072.Lerror_kernelspace: 1073 incl %ebx 1074 leaq native_irq_return_iret(%rip), %rcx 1075 cmpq %rcx, RIP+8(%rsp) 1076 je .Lerror_bad_iret 1077 movl %ecx, %eax /* zero extend */ 1078 cmpq %rax, RIP+8(%rsp) 1079 je .Lbstep_iret 1080 cmpq $gs_change, RIP+8(%rsp) 1081 jne .Lerror_entry_done 1082 1083 /* 1084 * hack: gs_change can fail with user gsbase. If this happens, fix up 1085 * gsbase and proceed. We'll fix up the exception and land in 1086 * gs_change's error handler with kernel gsbase. 1087 */ 1088 jmp .Lerror_entry_from_usermode_swapgs 1089 1090.Lbstep_iret: 1091 /* Fix truncated RIP */ 1092 movq %rcx, RIP+8(%rsp) 1093 /* fall through */ 1094 1095.Lerror_bad_iret: 1096 /* 1097 * We came from an IRET to user mode, so we have user gsbase. 1098 * Switch to kernel gsbase: 1099 */ 1100 SWAPGS 1101 1102 /* 1103 * Pretend that the exception came from user mode: set up pt_regs 1104 * as if we faulted immediately after IRET and clear EBX so that 1105 * error_exit knows that we will be returning to user mode. 1106 */ 1107 mov %rsp, %rdi 1108 call fixup_bad_iret 1109 mov %rax, %rsp 1110 decl %ebx 1111 jmp .Lerror_entry_from_usermode_after_swapgs 1112END(error_entry) 1113 1114 1115/* 1116 * On entry, EBS is a "return to kernel mode" flag: 1117 * 1: already in kernel mode, don't need SWAPGS 1118 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1119 */ 1120ENTRY(error_exit) 1121 movl %ebx, %eax 1122 DISABLE_INTERRUPTS(CLBR_NONE) 1123 TRACE_IRQS_OFF 1124 testl %eax, %eax 1125 jnz retint_kernel 1126 jmp retint_user 1127END(error_exit) 1128 1129/* Runs on exception stack */ 1130ENTRY(nmi) 1131 /* 1132 * Fix up the exception frame if we're on Xen. 1133 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most 1134 * one value to the stack on native, so it may clobber the rdx 1135 * scratch slot, but it won't clobber any of the important 1136 * slots past it. 1137 * 1138 * Xen is a different story, because the Xen frame itself overlaps 1139 * the "NMI executing" variable. 1140 */ 1141 PARAVIRT_ADJUST_EXCEPTION_FRAME 1142 1143 /* 1144 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1145 * the iretq it performs will take us out of NMI context. 1146 * This means that we can have nested NMIs where the next 1147 * NMI is using the top of the stack of the previous NMI. We 1148 * can't let it execute because the nested NMI will corrupt the 1149 * stack of the previous NMI. NMI handlers are not re-entrant 1150 * anyway. 1151 * 1152 * To handle this case we do the following: 1153 * Check the a special location on the stack that contains 1154 * a variable that is set when NMIs are executing. 1155 * The interrupted task's stack is also checked to see if it 1156 * is an NMI stack. 1157 * If the variable is not set and the stack is not the NMI 1158 * stack then: 1159 * o Set the special variable on the stack 1160 * o Copy the interrupt frame into an "outermost" location on the 1161 * stack 1162 * o Copy the interrupt frame into an "iret" location on the stack 1163 * o Continue processing the NMI 1164 * If the variable is set or the previous stack is the NMI stack: 1165 * o Modify the "iret" location to jump to the repeat_nmi 1166 * o return back to the first NMI 1167 * 1168 * Now on exit of the first NMI, we first clear the stack variable 1169 * The NMI stack will tell any nested NMIs at that point that it is 1170 * nested. Then we pop the stack normally with iret, and if there was 1171 * a nested NMI that updated the copy interrupt stack frame, a 1172 * jump will be made to the repeat_nmi code that will handle the second 1173 * NMI. 1174 * 1175 * However, espfix prevents us from directly returning to userspace 1176 * with a single IRET instruction. Similarly, IRET to user mode 1177 * can fault. We therefore handle NMIs from user space like 1178 * other IST entries. 1179 */ 1180 1181 /* Use %rdx as our temp variable throughout */ 1182 pushq %rdx 1183 1184 testb $3, CS-RIP+8(%rsp) 1185 jz .Lnmi_from_kernel 1186 1187 /* 1188 * NMI from user mode. We need to run on the thread stack, but we 1189 * can't go through the normal entry paths: NMIs are masked, and 1190 * we don't want to enable interrupts, because then we'll end 1191 * up in an awkward situation in which IRQs are on but NMIs 1192 * are off. 1193 * 1194 * We also must not push anything to the stack before switching 1195 * stacks lest we corrupt the "NMI executing" variable. 1196 */ 1197 1198 SWAPGS_UNSAFE_STACK 1199 cld 1200 movq %rsp, %rdx 1201 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1202 pushq 5*8(%rdx) /* pt_regs->ss */ 1203 pushq 4*8(%rdx) /* pt_regs->rsp */ 1204 pushq 3*8(%rdx) /* pt_regs->flags */ 1205 pushq 2*8(%rdx) /* pt_regs->cs */ 1206 pushq 1*8(%rdx) /* pt_regs->rip */ 1207 pushq $-1 /* pt_regs->orig_ax */ 1208 pushq %rdi /* pt_regs->di */ 1209 pushq %rsi /* pt_regs->si */ 1210 pushq (%rdx) /* pt_regs->dx */ 1211 pushq %rcx /* pt_regs->cx */ 1212 pushq %rax /* pt_regs->ax */ 1213 pushq %r8 /* pt_regs->r8 */ 1214 pushq %r9 /* pt_regs->r9 */ 1215 pushq %r10 /* pt_regs->r10 */ 1216 pushq %r11 /* pt_regs->r11 */ 1217 pushq %rbx /* pt_regs->rbx */ 1218 pushq %rbp /* pt_regs->rbp */ 1219 pushq %r12 /* pt_regs->r12 */ 1220 pushq %r13 /* pt_regs->r13 */ 1221 pushq %r14 /* pt_regs->r14 */ 1222 pushq %r15 /* pt_regs->r15 */ 1223 1224 /* 1225 * At this point we no longer need to worry about stack damage 1226 * due to nesting -- we're on the normal thread stack and we're 1227 * done with the NMI stack. 1228 */ 1229 1230 movq %rsp, %rdi 1231 movq $-1, %rsi 1232 call do_nmi 1233 1234 /* 1235 * Return back to user mode. We must *not* do the normal exit 1236 * work, because we don't want to enable interrupts. Fortunately, 1237 * do_nmi doesn't modify pt_regs. 1238 */ 1239 SWAPGS 1240 jmp restore_c_regs_and_iret 1241 1242.Lnmi_from_kernel: 1243 /* 1244 * Here's what our stack frame will look like: 1245 * +---------------------------------------------------------+ 1246 * | original SS | 1247 * | original Return RSP | 1248 * | original RFLAGS | 1249 * | original CS | 1250 * | original RIP | 1251 * +---------------------------------------------------------+ 1252 * | temp storage for rdx | 1253 * +---------------------------------------------------------+ 1254 * | "NMI executing" variable | 1255 * +---------------------------------------------------------+ 1256 * | iret SS } Copied from "outermost" frame | 1257 * | iret Return RSP } on each loop iteration; overwritten | 1258 * | iret RFLAGS } by a nested NMI to force another | 1259 * | iret CS } iteration if needed. | 1260 * | iret RIP } | 1261 * +---------------------------------------------------------+ 1262 * | outermost SS } initialized in first_nmi; | 1263 * | outermost Return RSP } will not be changed before | 1264 * | outermost RFLAGS } NMI processing is done. | 1265 * | outermost CS } Copied to "iret" frame on each | 1266 * | outermost RIP } iteration. | 1267 * +---------------------------------------------------------+ 1268 * | pt_regs | 1269 * +---------------------------------------------------------+ 1270 * 1271 * The "original" frame is used by hardware. Before re-enabling 1272 * NMIs, we need to be done with it, and we need to leave enough 1273 * space for the asm code here. 1274 * 1275 * We return by executing IRET while RSP points to the "iret" frame. 1276 * That will either return for real or it will loop back into NMI 1277 * processing. 1278 * 1279 * The "outermost" frame is copied to the "iret" frame on each 1280 * iteration of the loop, so each iteration starts with the "iret" 1281 * frame pointing to the final return target. 1282 */ 1283 1284 /* 1285 * Determine whether we're a nested NMI. 1286 * 1287 * If we interrupted kernel code between repeat_nmi and 1288 * end_repeat_nmi, then we are a nested NMI. We must not 1289 * modify the "iret" frame because it's being written by 1290 * the outer NMI. That's okay; the outer NMI handler is 1291 * about to about to call do_nmi anyway, so we can just 1292 * resume the outer NMI. 1293 */ 1294 1295 movq $repeat_nmi, %rdx 1296 cmpq 8(%rsp), %rdx 1297 ja 1f 1298 movq $end_repeat_nmi, %rdx 1299 cmpq 8(%rsp), %rdx 1300 ja nested_nmi_out 13011: 1302 1303 /* 1304 * Now check "NMI executing". If it's set, then we're nested. 1305 * This will not detect if we interrupted an outer NMI just 1306 * before IRET. 1307 */ 1308 cmpl $1, -8(%rsp) 1309 je nested_nmi 1310 1311 /* 1312 * Now test if the previous stack was an NMI stack. This covers 1313 * the case where we interrupt an outer NMI after it clears 1314 * "NMI executing" but before IRET. We need to be careful, though: 1315 * there is one case in which RSP could point to the NMI stack 1316 * despite there being no NMI active: naughty userspace controls 1317 * RSP at the very beginning of the SYSCALL targets. We can 1318 * pull a fast one on naughty userspace, though: we program 1319 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1320 * if it controls the kernel's RSP. We set DF before we clear 1321 * "NMI executing". 1322 */ 1323 lea 6*8(%rsp), %rdx 1324 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1325 cmpq %rdx, 4*8(%rsp) 1326 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1327 ja first_nmi 1328 1329 subq $EXCEPTION_STKSZ, %rdx 1330 cmpq %rdx, 4*8(%rsp) 1331 /* If it is below the NMI stack, it is a normal NMI */ 1332 jb first_nmi 1333 1334 /* Ah, it is within the NMI stack. */ 1335 1336 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1337 jz first_nmi /* RSP was user controlled. */ 1338 1339 /* This is a nested NMI. */ 1340 1341nested_nmi: 1342 /* 1343 * Modify the "iret" frame to point to repeat_nmi, forcing another 1344 * iteration of NMI handling. 1345 */ 1346 subq $8, %rsp 1347 leaq -10*8(%rsp), %rdx 1348 pushq $__KERNEL_DS 1349 pushq %rdx 1350 pushfq 1351 pushq $__KERNEL_CS 1352 pushq $repeat_nmi 1353 1354 /* Put stack back */ 1355 addq $(6*8), %rsp 1356 1357nested_nmi_out: 1358 popq %rdx 1359 1360 /* We are returning to kernel mode, so this cannot result in a fault. */ 1361 INTERRUPT_RETURN 1362 1363first_nmi: 1364 /* Restore rdx. */ 1365 movq (%rsp), %rdx 1366 1367 /* Make room for "NMI executing". */ 1368 pushq $0 1369 1370 /* Leave room for the "iret" frame */ 1371 subq $(5*8), %rsp 1372 1373 /* Copy the "original" frame to the "outermost" frame */ 1374 .rept 5 1375 pushq 11*8(%rsp) 1376 .endr 1377 1378 /* Everything up to here is safe from nested NMIs */ 1379 1380#ifdef CONFIG_DEBUG_ENTRY 1381 /* 1382 * For ease of testing, unmask NMIs right away. Disabled by 1383 * default because IRET is very expensive. 1384 */ 1385 pushq $0 /* SS */ 1386 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1387 addq $8, (%rsp) /* Fix up RSP */ 1388 pushfq /* RFLAGS */ 1389 pushq $__KERNEL_CS /* CS */ 1390 pushq $1f /* RIP */ 1391 INTERRUPT_RETURN /* continues at repeat_nmi below */ 13921: 1393#endif 1394 1395repeat_nmi: 1396 /* 1397 * If there was a nested NMI, the first NMI's iret will return 1398 * here. But NMIs are still enabled and we can take another 1399 * nested NMI. The nested NMI checks the interrupted RIP to see 1400 * if it is between repeat_nmi and end_repeat_nmi, and if so 1401 * it will just return, as we are about to repeat an NMI anyway. 1402 * This makes it safe to copy to the stack frame that a nested 1403 * NMI will update. 1404 * 1405 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1406 * we're repeating an NMI, gsbase has the same value that it had on 1407 * the first iteration. paranoid_entry will load the kernel 1408 * gsbase if needed before we call do_nmi. "NMI executing" 1409 * is zero. 1410 */ 1411 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1412 1413 /* 1414 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1415 * here must not modify the "iret" frame while we're writing to 1416 * it or it will end up containing garbage. 1417 */ 1418 addq $(10*8), %rsp 1419 .rept 5 1420 pushq -6*8(%rsp) 1421 .endr 1422 subq $(5*8), %rsp 1423end_repeat_nmi: 1424 1425 /* 1426 * Everything below this point can be preempted by a nested NMI. 1427 * If this happens, then the inner NMI will change the "iret" 1428 * frame to point back to repeat_nmi. 1429 */ 1430 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1431 ALLOC_PT_GPREGS_ON_STACK 1432 1433 /* 1434 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1435 * as we should not be calling schedule in NMI context. 1436 * Even with normal interrupts enabled. An NMI should not be 1437 * setting NEED_RESCHED or anything that normal interrupts and 1438 * exceptions might do. 1439 */ 1440 call paranoid_entry 1441 1442 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1443 movq %rsp, %rdi 1444 movq $-1, %rsi 1445 call do_nmi 1446 1447 testl %ebx, %ebx /* swapgs needed? */ 1448 jnz nmi_restore 1449nmi_swapgs: 1450 SWAPGS_UNSAFE_STACK 1451nmi_restore: 1452 RESTORE_EXTRA_REGS 1453 RESTORE_C_REGS 1454 1455 /* Point RSP at the "iret" frame. */ 1456 REMOVE_PT_GPREGS_FROM_STACK 6*8 1457 1458 /* 1459 * Clear "NMI executing". Set DF first so that we can easily 1460 * distinguish the remaining code between here and IRET from 1461 * the SYSCALL entry and exit paths. On a native kernel, we 1462 * could just inspect RIP, but, on paravirt kernels, 1463 * INTERRUPT_RETURN can translate into a jump into a 1464 * hypercall page. 1465 */ 1466 std 1467 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1468 1469 /* 1470 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI 1471 * stack in a single instruction. We are returning to kernel 1472 * mode, so this cannot result in a fault. 1473 */ 1474 INTERRUPT_RETURN 1475END(nmi) 1476 1477ENTRY(ignore_sysret) 1478 mov $-ENOSYS, %eax 1479 sysret 1480END(ignore_sysret) 1481