1/* 2 * linux/arch/x86_64/entry.S 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * 8 * entry.S contains the system-call and fault low-level handling routines. 9 * 10 * Some of this is documented in Documentation/x86/entry_64.txt 11 * 12 * A note on terminology: 13 * - iret frame: Architecture defined interrupt frame from SS to RIP 14 * at the top of the kernel process stack. 15 * 16 * Some macro usage: 17 * - ENTRY/END: Define functions in the symbol table. 18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 19 * - idtentry: Define exception entry points. 20 */ 21#include <linux/linkage.h> 22#include <asm/segment.h> 23#include <asm/cache.h> 24#include <asm/errno.h> 25#include "calling.h" 26#include <asm/asm-offsets.h> 27#include <asm/msr.h> 28#include <asm/unistd.h> 29#include <asm/thread_info.h> 30#include <asm/hw_irq.h> 31#include <asm/page_types.h> 32#include <asm/irqflags.h> 33#include <asm/paravirt.h> 34#include <asm/percpu.h> 35#include <asm/asm.h> 36#include <asm/smap.h> 37#include <asm/pgtable_types.h> 38#include <linux/err.h> 39 40/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ 41#include <linux/elf-em.h> 42#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) 43#define __AUDIT_ARCH_64BIT 0x80000000 44#define __AUDIT_ARCH_LE 0x40000000 45 46.code64 47.section .entry.text, "ax" 48 49#ifdef CONFIG_PARAVIRT 50ENTRY(native_usergs_sysret64) 51 swapgs 52 sysretq 53ENDPROC(native_usergs_sysret64) 54#endif /* CONFIG_PARAVIRT */ 55 56.macro TRACE_IRQS_IRETQ 57#ifdef CONFIG_TRACE_IRQFLAGS 58 bt $9, EFLAGS(%rsp) /* interrupts off? */ 59 jnc 1f 60 TRACE_IRQS_ON 611: 62#endif 63.endm 64 65/* 66 * When dynamic function tracer is enabled it will add a breakpoint 67 * to all locations that it is about to modify, sync CPUs, update 68 * all the code, sync CPUs, then remove the breakpoints. In this time 69 * if lockdep is enabled, it might jump back into the debug handler 70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 71 * 72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 73 * make sure the stack pointer does not get reset back to the top 74 * of the debug stack, and instead just reuses the current stack. 75 */ 76#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 77 78.macro TRACE_IRQS_OFF_DEBUG 79 call debug_stack_set_zero 80 TRACE_IRQS_OFF 81 call debug_stack_reset 82.endm 83 84.macro TRACE_IRQS_ON_DEBUG 85 call debug_stack_set_zero 86 TRACE_IRQS_ON 87 call debug_stack_reset 88.endm 89 90.macro TRACE_IRQS_IRETQ_DEBUG 91 bt $9, EFLAGS(%rsp) /* interrupts off? */ 92 jnc 1f 93 TRACE_IRQS_ON_DEBUG 941: 95.endm 96 97#else 98# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 99# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 100# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 101#endif 102 103/* 104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 105 * 106 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 107 * then loads new ss, cs, and rip from previously programmed MSRs. 108 * rflags gets masked by a value from another MSR (so CLD and CLAC 109 * are not needed). SYSCALL does not save anything on the stack 110 * and does not change rsp. 111 * 112 * Registers on entry: 113 * rax system call number 114 * rcx return address 115 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 116 * rdi arg0 117 * rsi arg1 118 * rdx arg2 119 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 120 * r8 arg4 121 * r9 arg5 122 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 123 * 124 * Only called from user space. 125 * 126 * When user can change pt_regs->foo always force IRET. That is because 127 * it deals with uncanonical addresses better. SYSRET has trouble 128 * with them due to bugs in both AMD and Intel CPUs. 129 */ 130 131ENTRY(entry_SYSCALL_64) 132 /* 133 * Interrupts are off on entry. 134 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 135 * it is too small to ever cause noticeable irq latency. 136 */ 137 SWAPGS_UNSAFE_STACK 138 /* 139 * A hypervisor implementation might want to use a label 140 * after the swapgs, so that it can do the swapgs 141 * for the guest and jump here on syscall. 142 */ 143GLOBAL(entry_SYSCALL_64_after_swapgs) 144 145 movq %rsp, PER_CPU_VAR(rsp_scratch) 146 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 147 148 /* Construct struct pt_regs on stack */ 149 pushq $__USER_DS /* pt_regs->ss */ 150 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 151 /* 152 * Re-enable interrupts. 153 * We use 'rsp_scratch' as a scratch space, hence irq-off block above 154 * must execute atomically in the face of possible interrupt-driven 155 * task preemption. We must enable interrupts only after we're done 156 * with using rsp_scratch: 157 */ 158 ENABLE_INTERRUPTS(CLBR_NONE) 159 pushq %r11 /* pt_regs->flags */ 160 pushq $__USER_CS /* pt_regs->cs */ 161 pushq %rcx /* pt_regs->ip */ 162 pushq %rax /* pt_regs->orig_ax */ 163 pushq %rdi /* pt_regs->di */ 164 pushq %rsi /* pt_regs->si */ 165 pushq %rdx /* pt_regs->dx */ 166 pushq %rcx /* pt_regs->cx */ 167 pushq $-ENOSYS /* pt_regs->ax */ 168 pushq %r8 /* pt_regs->r8 */ 169 pushq %r9 /* pt_regs->r9 */ 170 pushq %r10 /* pt_regs->r10 */ 171 pushq %r11 /* pt_regs->r11 */ 172 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 173 174 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 175 jnz tracesys 176entry_SYSCALL_64_fastpath: 177#if __SYSCALL_MASK == ~0 178 cmpq $__NR_syscall_max, %rax 179#else 180 andl $__SYSCALL_MASK, %eax 181 cmpl $__NR_syscall_max, %eax 182#endif 183 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 184 movq %r10, %rcx 185 call *sys_call_table(, %rax, 8) 186 movq %rax, RAX(%rsp) 1871: 188/* 189 * Syscall return path ending with SYSRET (fast path). 190 * Has incompletely filled pt_regs. 191 */ 192 LOCKDEP_SYS_EXIT 193 /* 194 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 195 * it is too small to ever cause noticeable irq latency. 196 */ 197 DISABLE_INTERRUPTS(CLBR_NONE) 198 199 /* 200 * We must check ti flags with interrupts (or at least preemption) 201 * off because we must *never* return to userspace without 202 * processing exit work that is enqueued if we're preempted here. 203 * In particular, returning to userspace with any of the one-shot 204 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is 205 * very bad. 206 */ 207 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 208 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */ 209 210 RESTORE_C_REGS_EXCEPT_RCX_R11 211 movq RIP(%rsp), %rcx 212 movq EFLAGS(%rsp), %r11 213 movq RSP(%rsp), %rsp 214 /* 215 * 64-bit SYSRET restores rip from rcx, 216 * rflags from r11 (but RF and VM bits are forced to 0), 217 * cs and ss are loaded from MSRs. 218 * Restoration of rflags re-enables interrupts. 219 * 220 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss 221 * descriptor is not reinitialized. This means that we should 222 * avoid SYSRET with SS == NULL, which could happen if we schedule, 223 * exit the kernel, and re-enter using an interrupt vector. (All 224 * interrupt entries on x86_64 set SS to NULL.) We prevent that 225 * from happening by reloading SS in __switch_to. (Actually 226 * detecting the failure in 64-bit userspace is tricky but can be 227 * done.) 228 */ 229 USERGS_SYSRET64 230 231GLOBAL(int_ret_from_sys_call_irqs_off) 232 TRACE_IRQS_ON 233 ENABLE_INTERRUPTS(CLBR_NONE) 234 jmp int_ret_from_sys_call 235 236 /* Do syscall entry tracing */ 237tracesys: 238 movq %rsp, %rdi 239 movl $AUDIT_ARCH_X86_64, %esi 240 call syscall_trace_enter_phase1 241 test %rax, %rax 242 jnz tracesys_phase2 /* if needed, run the slow path */ 243 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */ 244 movq ORIG_RAX(%rsp), %rax 245 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */ 246 247tracesys_phase2: 248 SAVE_EXTRA_REGS 249 movq %rsp, %rdi 250 movl $AUDIT_ARCH_X86_64, %esi 251 movq %rax, %rdx 252 call syscall_trace_enter_phase2 253 254 /* 255 * Reload registers from stack in case ptrace changed them. 256 * We don't reload %rax because syscall_trace_entry_phase2() returned 257 * the value it wants us to use in the table lookup. 258 */ 259 RESTORE_C_REGS_EXCEPT_RAX 260 RESTORE_EXTRA_REGS 261#if __SYSCALL_MASK == ~0 262 cmpq $__NR_syscall_max, %rax 263#else 264 andl $__SYSCALL_MASK, %eax 265 cmpl $__NR_syscall_max, %eax 266#endif 267 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 268 movq %r10, %rcx /* fixup for C */ 269 call *sys_call_table(, %rax, 8) 270 movq %rax, RAX(%rsp) 2711: 272 /* Use IRET because user could have changed pt_regs->foo */ 273 274/* 275 * Syscall return path ending with IRET. 276 * Has correct iret frame. 277 */ 278GLOBAL(int_ret_from_sys_call) 279 SAVE_EXTRA_REGS 280 movq %rsp, %rdi 281 call syscall_return_slowpath /* returns with IRQs disabled */ 282 RESTORE_EXTRA_REGS 283 TRACE_IRQS_IRETQ /* we're about to change IF */ 284 285 /* 286 * Try to use SYSRET instead of IRET if we're returning to 287 * a completely clean 64-bit userspace context. 288 */ 289 movq RCX(%rsp), %rcx 290 movq RIP(%rsp), %r11 291 cmpq %rcx, %r11 /* RCX == RIP */ 292 jne opportunistic_sysret_failed 293 294 /* 295 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 296 * in kernel space. This essentially lets the user take over 297 * the kernel, since userspace controls RSP. 298 * 299 * If width of "canonical tail" ever becomes variable, this will need 300 * to be updated to remain correct on both old and new CPUs. 301 */ 302 .ifne __VIRTUAL_MASK_SHIFT - 47 303 .error "virtual address width changed -- SYSRET checks need update" 304 .endif 305 306 /* Change top 16 bits to be the sign-extension of 47th bit */ 307 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 308 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 309 310 /* If this changed %rcx, it was not canonical */ 311 cmpq %rcx, %r11 312 jne opportunistic_sysret_failed 313 314 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 315 jne opportunistic_sysret_failed 316 317 movq R11(%rsp), %r11 318 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 319 jne opportunistic_sysret_failed 320 321 /* 322 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET, 323 * restoring TF results in a trap from userspace immediately after 324 * SYSRET. This would cause an infinite loop whenever #DB happens 325 * with register state that satisfies the opportunistic SYSRET 326 * conditions. For example, single-stepping this user code: 327 * 328 * movq $stuck_here, %rcx 329 * pushfq 330 * popq %r11 331 * stuck_here: 332 * 333 * would never get past 'stuck_here'. 334 */ 335 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 336 jnz opportunistic_sysret_failed 337 338 /* nothing to check for RSP */ 339 340 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 341 jne opportunistic_sysret_failed 342 343 /* 344 * We win! This label is here just for ease of understanding 345 * perf profiles. Nothing jumps here. 346 */ 347syscall_return_via_sysret: 348 /* rcx and r11 are already restored (see code above) */ 349 RESTORE_C_REGS_EXCEPT_RCX_R11 350 movq RSP(%rsp), %rsp 351 USERGS_SYSRET64 352 353opportunistic_sysret_failed: 354 SWAPGS 355 jmp restore_c_regs_and_iret 356END(entry_SYSCALL_64) 357 358 359 .macro FORK_LIKE func 360ENTRY(stub_\func) 361 SAVE_EXTRA_REGS 8 362 jmp sys_\func 363END(stub_\func) 364 .endm 365 366 FORK_LIKE clone 367 FORK_LIKE fork 368 FORK_LIKE vfork 369 370ENTRY(stub_execve) 371 call sys_execve 372return_from_execve: 373 testl %eax, %eax 374 jz 1f 375 /* exec failed, can use fast SYSRET code path in this case */ 376 ret 3771: 378 /* must use IRET code path (pt_regs->cs may have changed) */ 379 addq $8, %rsp 380 ZERO_EXTRA_REGS 381 movq %rax, RAX(%rsp) 382 jmp int_ret_from_sys_call 383END(stub_execve) 384/* 385 * Remaining execve stubs are only 7 bytes long. 386 * ENTRY() often aligns to 16 bytes, which in this case has no benefits. 387 */ 388 .align 8 389GLOBAL(stub_execveat) 390 call sys_execveat 391 jmp return_from_execve 392END(stub_execveat) 393 394#if defined(CONFIG_X86_X32_ABI) 395 .align 8 396GLOBAL(stub_x32_execve) 397 call compat_sys_execve 398 jmp return_from_execve 399END(stub_x32_execve) 400 .align 8 401GLOBAL(stub_x32_execveat) 402 call compat_sys_execveat 403 jmp return_from_execve 404END(stub_x32_execveat) 405#endif 406 407/* 408 * sigreturn is special because it needs to restore all registers on return. 409 * This cannot be done with SYSRET, so use the IRET return path instead. 410 */ 411ENTRY(stub_rt_sigreturn) 412 /* 413 * SAVE_EXTRA_REGS result is not normally needed: 414 * sigreturn overwrites all pt_regs->GPREGS. 415 * But sigreturn can fail (!), and there is no easy way to detect that. 416 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error, 417 * we SAVE_EXTRA_REGS here. 418 */ 419 SAVE_EXTRA_REGS 8 420 call sys_rt_sigreturn 421return_from_stub: 422 addq $8, %rsp 423 RESTORE_EXTRA_REGS 424 movq %rax, RAX(%rsp) 425 jmp int_ret_from_sys_call 426END(stub_rt_sigreturn) 427 428#ifdef CONFIG_X86_X32_ABI 429ENTRY(stub_x32_rt_sigreturn) 430 SAVE_EXTRA_REGS 8 431 call sys32_x32_rt_sigreturn 432 jmp return_from_stub 433END(stub_x32_rt_sigreturn) 434#endif 435 436/* 437 * A newly forked process directly context switches into this address. 438 * 439 * rdi: prev task we switched from 440 */ 441ENTRY(ret_from_fork) 442 443 LOCK ; btr $TIF_FORK, TI_flags(%r8) 444 445 pushq $0x0002 446 popfq /* reset kernel eflags */ 447 448 call schedule_tail /* rdi: 'prev' task parameter */ 449 450 RESTORE_EXTRA_REGS 451 452 testb $3, CS(%rsp) /* from kernel_thread? */ 453 454 /* 455 * By the time we get here, we have no idea whether our pt_regs, 456 * ti flags, and ti status came from the 64-bit SYSCALL fast path, 457 * the slow path, or one of the 32-bit compat paths. 458 * Use IRET code path to return, since it can safely handle 459 * all of the above. 460 */ 461 jnz int_ret_from_sys_call 462 463 /* 464 * We came from kernel_thread 465 * nb: we depend on RESTORE_EXTRA_REGS above 466 */ 467 movq %rbp, %rdi 468 call *%rbx 469 movl $0, RAX(%rsp) 470 RESTORE_EXTRA_REGS 471 jmp int_ret_from_sys_call 472END(ret_from_fork) 473 474/* 475 * Build the entry stubs with some assembler magic. 476 * We pack 1 stub into every 8-byte block. 477 */ 478 .align 8 479ENTRY(irq_entries_start) 480 vector=FIRST_EXTERNAL_VECTOR 481 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 482 pushq $(~vector+0x80) /* Note: always in signed byte range */ 483 vector=vector+1 484 jmp common_interrupt 485 .align 8 486 .endr 487END(irq_entries_start) 488 489/* 490 * Interrupt entry/exit. 491 * 492 * Interrupt entry points save only callee clobbered registers in fast path. 493 * 494 * Entry runs with interrupts off. 495 */ 496 497/* 0(%rsp): ~(interrupt number) */ 498 .macro interrupt func 499 cld 500 ALLOC_PT_GPREGS_ON_STACK 501 SAVE_C_REGS 502 SAVE_EXTRA_REGS 503 504 testb $3, CS(%rsp) 505 jz 1f 506 507 /* 508 * IRQ from user mode. Switch to kernel gsbase and inform context 509 * tracking that we're in kernel mode. 510 */ 511 SWAPGS 512 513 /* 514 * We need to tell lockdep that IRQs are off. We can't do this until 515 * we fix gsbase, and we should do it before enter_from_user_mode 516 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 517 * the simplest way to handle it is to just call it twice if 518 * we enter from user mode. There's no reason to optimize this since 519 * TRACE_IRQS_OFF is a no-op if lockdep is off. 520 */ 521 TRACE_IRQS_OFF 522 523 CALL_enter_from_user_mode 524 5251: 526 /* 527 * Save previous stack pointer, optionally switch to interrupt stack. 528 * irq_count is used to check if a CPU is already on an interrupt stack 529 * or not. While this is essentially redundant with preempt_count it is 530 * a little cheaper to use a separate counter in the PDA (short of 531 * moving irq_enter into assembly, which would be too much work) 532 */ 533 movq %rsp, %rdi 534 incl PER_CPU_VAR(irq_count) 535 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 536 pushq %rdi 537 /* We entered an interrupt context - irqs are off: */ 538 TRACE_IRQS_OFF 539 540 call \func /* rdi points to pt_regs */ 541 .endm 542 543 /* 544 * The interrupt stubs push (~vector+0x80) onto the stack and 545 * then jump to common_interrupt. 546 */ 547 .p2align CONFIG_X86_L1_CACHE_SHIFT 548common_interrupt: 549 ASM_CLAC 550 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 551 interrupt do_IRQ 552 /* 0(%rsp): old RSP */ 553ret_from_intr: 554 DISABLE_INTERRUPTS(CLBR_NONE) 555 TRACE_IRQS_OFF 556 decl PER_CPU_VAR(irq_count) 557 558 /* Restore saved previous stack */ 559 popq %rsp 560 561 testb $3, CS(%rsp) 562 jz retint_kernel 563 564 /* Interrupt came from user space */ 565GLOBAL(retint_user) 566 mov %rsp,%rdi 567 call prepare_exit_to_usermode 568 TRACE_IRQS_IRETQ 569 SWAPGS 570 jmp restore_regs_and_iret 571 572/* Returning to kernel space */ 573retint_kernel: 574#ifdef CONFIG_PREEMPT 575 /* Interrupts are off */ 576 /* Check if we need preemption */ 577 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 578 jnc 1f 5790: cmpl $0, PER_CPU_VAR(__preempt_count) 580 jnz 1f 581 call preempt_schedule_irq 582 jmp 0b 5831: 584#endif 585 /* 586 * The iretq could re-enable interrupts: 587 */ 588 TRACE_IRQS_IRETQ 589 590/* 591 * At this label, code paths which return to kernel and to user, 592 * which come from interrupts/exception and from syscalls, merge. 593 */ 594GLOBAL(restore_regs_and_iret) 595 RESTORE_EXTRA_REGS 596restore_c_regs_and_iret: 597 RESTORE_C_REGS 598 REMOVE_PT_GPREGS_FROM_STACK 8 599 INTERRUPT_RETURN 600 601ENTRY(native_iret) 602 /* 603 * Are we returning to a stack segment from the LDT? Note: in 604 * 64-bit mode SS:RSP on the exception stack is always valid. 605 */ 606#ifdef CONFIG_X86_ESPFIX64 607 testb $4, (SS-RIP)(%rsp) 608 jnz native_irq_return_ldt 609#endif 610 611.global native_irq_return_iret 612native_irq_return_iret: 613 /* 614 * This may fault. Non-paranoid faults on return to userspace are 615 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 616 * Double-faults due to espfix64 are handled in do_double_fault. 617 * Other faults here are fatal. 618 */ 619 iretq 620 621#ifdef CONFIG_X86_ESPFIX64 622native_irq_return_ldt: 623 pushq %rax 624 pushq %rdi 625 SWAPGS 626 movq PER_CPU_VAR(espfix_waddr), %rdi 627 movq %rax, (0*8)(%rdi) /* RAX */ 628 movq (2*8)(%rsp), %rax /* RIP */ 629 movq %rax, (1*8)(%rdi) 630 movq (3*8)(%rsp), %rax /* CS */ 631 movq %rax, (2*8)(%rdi) 632 movq (4*8)(%rsp), %rax /* RFLAGS */ 633 movq %rax, (3*8)(%rdi) 634 movq (6*8)(%rsp), %rax /* SS */ 635 movq %rax, (5*8)(%rdi) 636 movq (5*8)(%rsp), %rax /* RSP */ 637 movq %rax, (4*8)(%rdi) 638 andl $0xffff0000, %eax 639 popq %rdi 640 orq PER_CPU_VAR(espfix_stack), %rax 641 SWAPGS 642 movq %rax, %rsp 643 popq %rax 644 jmp native_irq_return_iret 645#endif 646END(common_interrupt) 647 648/* 649 * APIC interrupts. 650 */ 651.macro apicinterrupt3 num sym do_sym 652ENTRY(\sym) 653 ASM_CLAC 654 pushq $~(\num) 655.Lcommon_\sym: 656 interrupt \do_sym 657 jmp ret_from_intr 658END(\sym) 659.endm 660 661#ifdef CONFIG_TRACING 662#define trace(sym) trace_##sym 663#define smp_trace(sym) smp_trace_##sym 664 665.macro trace_apicinterrupt num sym 666apicinterrupt3 \num trace(\sym) smp_trace(\sym) 667.endm 668#else 669.macro trace_apicinterrupt num sym do_sym 670.endm 671#endif 672 673.macro apicinterrupt num sym do_sym 674apicinterrupt3 \num \sym \do_sym 675trace_apicinterrupt \num \sym 676.endm 677 678#ifdef CONFIG_SMP 679apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 680apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 681#endif 682 683#ifdef CONFIG_X86_UV 684apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 685#endif 686 687apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 688apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 689 690#ifdef CONFIG_HAVE_KVM 691apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 692apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 693#endif 694 695#ifdef CONFIG_X86_MCE_THRESHOLD 696apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 697#endif 698 699#ifdef CONFIG_X86_MCE_AMD 700apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 701#endif 702 703#ifdef CONFIG_X86_THERMAL_VECTOR 704apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 705#endif 706 707#ifdef CONFIG_SMP 708apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 709apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 710apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 711#endif 712 713apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 714apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 715 716#ifdef CONFIG_IRQ_WORK 717apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 718#endif 719 720/* 721 * Exception entry points. 722 */ 723#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) 724 725.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 726ENTRY(\sym) 727 /* Sanity check */ 728 .if \shift_ist != -1 && \paranoid == 0 729 .error "using shift_ist requires paranoid=1" 730 .endif 731 732 ASM_CLAC 733 PARAVIRT_ADJUST_EXCEPTION_FRAME 734 735 .ifeq \has_error_code 736 pushq $-1 /* ORIG_RAX: no syscall to restart */ 737 .endif 738 739 ALLOC_PT_GPREGS_ON_STACK 740 741 .if \paranoid 742 .if \paranoid == 1 743 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 744 jnz 1f 745 .endif 746 call paranoid_entry 747 .else 748 call error_entry 749 .endif 750 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 751 752 .if \paranoid 753 .if \shift_ist != -1 754 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 755 .else 756 TRACE_IRQS_OFF 757 .endif 758 .endif 759 760 movq %rsp, %rdi /* pt_regs pointer */ 761 762 .if \has_error_code 763 movq ORIG_RAX(%rsp), %rsi /* get error code */ 764 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 765 .else 766 xorl %esi, %esi /* no error code */ 767 .endif 768 769 .if \shift_ist != -1 770 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 771 .endif 772 773 call \do_sym 774 775 .if \shift_ist != -1 776 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 777 .endif 778 779 /* these procedures expect "no swapgs" flag in ebx */ 780 .if \paranoid 781 jmp paranoid_exit 782 .else 783 jmp error_exit 784 .endif 785 786 .if \paranoid == 1 787 /* 788 * Paranoid entry from userspace. Switch stacks and treat it 789 * as a normal entry. This means that paranoid handlers 790 * run in real process context if user_mode(regs). 791 */ 7921: 793 call error_entry 794 795 796 movq %rsp, %rdi /* pt_regs pointer */ 797 call sync_regs 798 movq %rax, %rsp /* switch stack */ 799 800 movq %rsp, %rdi /* pt_regs pointer */ 801 802 .if \has_error_code 803 movq ORIG_RAX(%rsp), %rsi /* get error code */ 804 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 805 .else 806 xorl %esi, %esi /* no error code */ 807 .endif 808 809 call \do_sym 810 811 jmp error_exit /* %ebx: no swapgs flag */ 812 .endif 813END(\sym) 814.endm 815 816#ifdef CONFIG_TRACING 817.macro trace_idtentry sym do_sym has_error_code:req 818idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code 819idtentry \sym \do_sym has_error_code=\has_error_code 820.endm 821#else 822.macro trace_idtentry sym do_sym has_error_code:req 823idtentry \sym \do_sym has_error_code=\has_error_code 824.endm 825#endif 826 827idtentry divide_error do_divide_error has_error_code=0 828idtentry overflow do_overflow has_error_code=0 829idtentry bounds do_bounds has_error_code=0 830idtentry invalid_op do_invalid_op has_error_code=0 831idtentry device_not_available do_device_not_available has_error_code=0 832idtentry double_fault do_double_fault has_error_code=1 paranoid=2 833idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 834idtentry invalid_TSS do_invalid_TSS has_error_code=1 835idtentry segment_not_present do_segment_not_present has_error_code=1 836idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 837idtentry coprocessor_error do_coprocessor_error has_error_code=0 838idtentry alignment_check do_alignment_check has_error_code=1 839idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 840 841 842 /* 843 * Reload gs selector with exception handling 844 * edi: new selector 845 */ 846ENTRY(native_load_gs_index) 847 pushfq 848 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 849 SWAPGS 850gs_change: 851 movl %edi, %gs 8522: mfence /* workaround */ 853 SWAPGS 854 popfq 855 ret 856END(native_load_gs_index) 857 858 _ASM_EXTABLE(gs_change, bad_gs) 859 .section .fixup, "ax" 860 /* running with kernelgs */ 861bad_gs: 862 SWAPGS /* switch back to user gs */ 863 xorl %eax, %eax 864 movl %eax, %gs 865 jmp 2b 866 .previous 867 868/* Call softirq on interrupt stack. Interrupts are off. */ 869ENTRY(do_softirq_own_stack) 870 pushq %rbp 871 mov %rsp, %rbp 872 incl PER_CPU_VAR(irq_count) 873 cmove PER_CPU_VAR(irq_stack_ptr), %rsp 874 push %rbp /* frame pointer backlink */ 875 call __do_softirq 876 leaveq 877 decl PER_CPU_VAR(irq_count) 878 ret 879END(do_softirq_own_stack) 880 881#ifdef CONFIG_XEN 882idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 883 884/* 885 * A note on the "critical region" in our callback handler. 886 * We want to avoid stacking callback handlers due to events occurring 887 * during handling of the last event. To do this, we keep events disabled 888 * until we've done all processing. HOWEVER, we must enable events before 889 * popping the stack frame (can't be done atomically) and so it would still 890 * be possible to get enough handler activations to overflow the stack. 891 * Although unlikely, bugs of that kind are hard to track down, so we'd 892 * like to avoid the possibility. 893 * So, on entry to the handler we detect whether we interrupted an 894 * existing activation in its critical region -- if so, we pop the current 895 * activation and restart the handler using the previous one. 896 */ 897ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 898 899/* 900 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 901 * see the correct pointer to the pt_regs 902 */ 903 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 90411: incl PER_CPU_VAR(irq_count) 905 movq %rsp, %rbp 906 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 907 pushq %rbp /* frame pointer backlink */ 908 call xen_evtchn_do_upcall 909 popq %rsp 910 decl PER_CPU_VAR(irq_count) 911#ifndef CONFIG_PREEMPT 912 call xen_maybe_preempt_hcall 913#endif 914 jmp error_exit 915END(xen_do_hypervisor_callback) 916 917/* 918 * Hypervisor uses this for application faults while it executes. 919 * We get here for two reasons: 920 * 1. Fault while reloading DS, ES, FS or GS 921 * 2. Fault while executing IRET 922 * Category 1 we do not need to fix up as Xen has already reloaded all segment 923 * registers that could be reloaded and zeroed the others. 924 * Category 2 we fix up by killing the current process. We cannot use the 925 * normal Linux return path in this case because if we use the IRET hypercall 926 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 927 * We distinguish between categories by comparing each saved segment register 928 * with its current contents: any discrepancy means we in category 1. 929 */ 930ENTRY(xen_failsafe_callback) 931 movl %ds, %ecx 932 cmpw %cx, 0x10(%rsp) 933 jne 1f 934 movl %es, %ecx 935 cmpw %cx, 0x18(%rsp) 936 jne 1f 937 movl %fs, %ecx 938 cmpw %cx, 0x20(%rsp) 939 jne 1f 940 movl %gs, %ecx 941 cmpw %cx, 0x28(%rsp) 942 jne 1f 943 /* All segments match their saved values => Category 2 (Bad IRET). */ 944 movq (%rsp), %rcx 945 movq 8(%rsp), %r11 946 addq $0x30, %rsp 947 pushq $0 /* RIP */ 948 pushq %r11 949 pushq %rcx 950 jmp general_protection 9511: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 952 movq (%rsp), %rcx 953 movq 8(%rsp), %r11 954 addq $0x30, %rsp 955 pushq $-1 /* orig_ax = -1 => not a system call */ 956 ALLOC_PT_GPREGS_ON_STACK 957 SAVE_C_REGS 958 SAVE_EXTRA_REGS 959 jmp error_exit 960END(xen_failsafe_callback) 961 962apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 963 xen_hvm_callback_vector xen_evtchn_do_upcall 964 965#endif /* CONFIG_XEN */ 966 967#if IS_ENABLED(CONFIG_HYPERV) 968apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 969 hyperv_callback_vector hyperv_vector_handler 970#endif /* CONFIG_HYPERV */ 971 972idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 973idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 974idtentry stack_segment do_stack_segment has_error_code=1 975 976#ifdef CONFIG_XEN 977idtentry xen_debug do_debug has_error_code=0 978idtentry xen_int3 do_int3 has_error_code=0 979idtentry xen_stack_segment do_stack_segment has_error_code=1 980#endif 981 982idtentry general_protection do_general_protection has_error_code=1 983trace_idtentry page_fault do_page_fault has_error_code=1 984 985#ifdef CONFIG_KVM_GUEST 986idtentry async_page_fault do_async_page_fault has_error_code=1 987#endif 988 989#ifdef CONFIG_X86_MCE 990idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 991#endif 992 993/* 994 * Save all registers in pt_regs, and switch gs if needed. 995 * Use slow, but surefire "are we in kernel?" check. 996 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 997 */ 998ENTRY(paranoid_entry) 999 cld 1000 SAVE_C_REGS 8 1001 SAVE_EXTRA_REGS 8 1002 movl $1, %ebx 1003 movl $MSR_GS_BASE, %ecx 1004 rdmsr 1005 testl %edx, %edx 1006 js 1f /* negative -> in kernel */ 1007 SWAPGS 1008 xorl %ebx, %ebx 10091: ret 1010END(paranoid_entry) 1011 1012/* 1013 * "Paranoid" exit path from exception stack. This is invoked 1014 * only on return from non-NMI IST interrupts that came 1015 * from kernel space. 1016 * 1017 * We may be returning to very strange contexts (e.g. very early 1018 * in syscall entry), so checking for preemption here would 1019 * be complicated. Fortunately, we there's no good reason 1020 * to try to handle preemption here. 1021 * 1022 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1023 */ 1024ENTRY(paranoid_exit) 1025 DISABLE_INTERRUPTS(CLBR_NONE) 1026 TRACE_IRQS_OFF_DEBUG 1027 testl %ebx, %ebx /* swapgs needed? */ 1028 jnz paranoid_exit_no_swapgs 1029 TRACE_IRQS_IRETQ 1030 SWAPGS_UNSAFE_STACK 1031 jmp paranoid_exit_restore 1032paranoid_exit_no_swapgs: 1033 TRACE_IRQS_IRETQ_DEBUG 1034paranoid_exit_restore: 1035 RESTORE_EXTRA_REGS 1036 RESTORE_C_REGS 1037 REMOVE_PT_GPREGS_FROM_STACK 8 1038 INTERRUPT_RETURN 1039END(paranoid_exit) 1040 1041/* 1042 * Save all registers in pt_regs, and switch gs if needed. 1043 * Return: EBX=0: came from user mode; EBX=1: otherwise 1044 */ 1045ENTRY(error_entry) 1046 cld 1047 SAVE_C_REGS 8 1048 SAVE_EXTRA_REGS 8 1049 xorl %ebx, %ebx 1050 testb $3, CS+8(%rsp) 1051 jz .Lerror_kernelspace 1052 1053.Lerror_entry_from_usermode_swapgs: 1054 /* 1055 * We entered from user mode or we're pretending to have entered 1056 * from user mode due to an IRET fault. 1057 */ 1058 SWAPGS 1059 1060.Lerror_entry_from_usermode_after_swapgs: 1061 /* 1062 * We need to tell lockdep that IRQs are off. We can't do this until 1063 * we fix gsbase, and we should do it before enter_from_user_mode 1064 * (which can take locks). 1065 */ 1066 TRACE_IRQS_OFF 1067 CALL_enter_from_user_mode 1068 ret 1069 1070.Lerror_entry_done: 1071 TRACE_IRQS_OFF 1072 ret 1073 1074 /* 1075 * There are two places in the kernel that can potentially fault with 1076 * usergs. Handle them here. B stepping K8s sometimes report a 1077 * truncated RIP for IRET exceptions returning to compat mode. Check 1078 * for these here too. 1079 */ 1080.Lerror_kernelspace: 1081 incl %ebx 1082 leaq native_irq_return_iret(%rip), %rcx 1083 cmpq %rcx, RIP+8(%rsp) 1084 je .Lerror_bad_iret 1085 movl %ecx, %eax /* zero extend */ 1086 cmpq %rax, RIP+8(%rsp) 1087 je .Lbstep_iret 1088 cmpq $gs_change, RIP+8(%rsp) 1089 jne .Lerror_entry_done 1090 1091 /* 1092 * hack: gs_change can fail with user gsbase. If this happens, fix up 1093 * gsbase and proceed. We'll fix up the exception and land in 1094 * gs_change's error handler with kernel gsbase. 1095 */ 1096 jmp .Lerror_entry_from_usermode_swapgs 1097 1098.Lbstep_iret: 1099 /* Fix truncated RIP */ 1100 movq %rcx, RIP+8(%rsp) 1101 /* fall through */ 1102 1103.Lerror_bad_iret: 1104 /* 1105 * We came from an IRET to user mode, so we have user gsbase. 1106 * Switch to kernel gsbase: 1107 */ 1108 SWAPGS 1109 1110 /* 1111 * Pretend that the exception came from user mode: set up pt_regs 1112 * as if we faulted immediately after IRET and clear EBX so that 1113 * error_exit knows that we will be returning to user mode. 1114 */ 1115 mov %rsp, %rdi 1116 call fixup_bad_iret 1117 mov %rax, %rsp 1118 decl %ebx 1119 jmp .Lerror_entry_from_usermode_after_swapgs 1120END(error_entry) 1121 1122 1123/* 1124 * On entry, EBS is a "return to kernel mode" flag: 1125 * 1: already in kernel mode, don't need SWAPGS 1126 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1127 */ 1128ENTRY(error_exit) 1129 movl %ebx, %eax 1130 DISABLE_INTERRUPTS(CLBR_NONE) 1131 TRACE_IRQS_OFF 1132 testl %eax, %eax 1133 jnz retint_kernel 1134 jmp retint_user 1135END(error_exit) 1136 1137/* Runs on exception stack */ 1138ENTRY(nmi) 1139 /* 1140 * Fix up the exception frame if we're on Xen. 1141 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most 1142 * one value to the stack on native, so it may clobber the rdx 1143 * scratch slot, but it won't clobber any of the important 1144 * slots past it. 1145 * 1146 * Xen is a different story, because the Xen frame itself overlaps 1147 * the "NMI executing" variable. 1148 */ 1149 PARAVIRT_ADJUST_EXCEPTION_FRAME 1150 1151 /* 1152 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1153 * the iretq it performs will take us out of NMI context. 1154 * This means that we can have nested NMIs where the next 1155 * NMI is using the top of the stack of the previous NMI. We 1156 * can't let it execute because the nested NMI will corrupt the 1157 * stack of the previous NMI. NMI handlers are not re-entrant 1158 * anyway. 1159 * 1160 * To handle this case we do the following: 1161 * Check the a special location on the stack that contains 1162 * a variable that is set when NMIs are executing. 1163 * The interrupted task's stack is also checked to see if it 1164 * is an NMI stack. 1165 * If the variable is not set and the stack is not the NMI 1166 * stack then: 1167 * o Set the special variable on the stack 1168 * o Copy the interrupt frame into an "outermost" location on the 1169 * stack 1170 * o Copy the interrupt frame into an "iret" location on the stack 1171 * o Continue processing the NMI 1172 * If the variable is set or the previous stack is the NMI stack: 1173 * o Modify the "iret" location to jump to the repeat_nmi 1174 * o return back to the first NMI 1175 * 1176 * Now on exit of the first NMI, we first clear the stack variable 1177 * The NMI stack will tell any nested NMIs at that point that it is 1178 * nested. Then we pop the stack normally with iret, and if there was 1179 * a nested NMI that updated the copy interrupt stack frame, a 1180 * jump will be made to the repeat_nmi code that will handle the second 1181 * NMI. 1182 * 1183 * However, espfix prevents us from directly returning to userspace 1184 * with a single IRET instruction. Similarly, IRET to user mode 1185 * can fault. We therefore handle NMIs from user space like 1186 * other IST entries. 1187 */ 1188 1189 /* Use %rdx as our temp variable throughout */ 1190 pushq %rdx 1191 1192 testb $3, CS-RIP+8(%rsp) 1193 jz .Lnmi_from_kernel 1194 1195 /* 1196 * NMI from user mode. We need to run on the thread stack, but we 1197 * can't go through the normal entry paths: NMIs are masked, and 1198 * we don't want to enable interrupts, because then we'll end 1199 * up in an awkward situation in which IRQs are on but NMIs 1200 * are off. 1201 * 1202 * We also must not push anything to the stack before switching 1203 * stacks lest we corrupt the "NMI executing" variable. 1204 */ 1205 1206 SWAPGS_UNSAFE_STACK 1207 cld 1208 movq %rsp, %rdx 1209 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1210 pushq 5*8(%rdx) /* pt_regs->ss */ 1211 pushq 4*8(%rdx) /* pt_regs->rsp */ 1212 pushq 3*8(%rdx) /* pt_regs->flags */ 1213 pushq 2*8(%rdx) /* pt_regs->cs */ 1214 pushq 1*8(%rdx) /* pt_regs->rip */ 1215 pushq $-1 /* pt_regs->orig_ax */ 1216 pushq %rdi /* pt_regs->di */ 1217 pushq %rsi /* pt_regs->si */ 1218 pushq (%rdx) /* pt_regs->dx */ 1219 pushq %rcx /* pt_regs->cx */ 1220 pushq %rax /* pt_regs->ax */ 1221 pushq %r8 /* pt_regs->r8 */ 1222 pushq %r9 /* pt_regs->r9 */ 1223 pushq %r10 /* pt_regs->r10 */ 1224 pushq %r11 /* pt_regs->r11 */ 1225 pushq %rbx /* pt_regs->rbx */ 1226 pushq %rbp /* pt_regs->rbp */ 1227 pushq %r12 /* pt_regs->r12 */ 1228 pushq %r13 /* pt_regs->r13 */ 1229 pushq %r14 /* pt_regs->r14 */ 1230 pushq %r15 /* pt_regs->r15 */ 1231 1232 /* 1233 * At this point we no longer need to worry about stack damage 1234 * due to nesting -- we're on the normal thread stack and we're 1235 * done with the NMI stack. 1236 */ 1237 1238 movq %rsp, %rdi 1239 movq $-1, %rsi 1240 call do_nmi 1241 1242 /* 1243 * Return back to user mode. We must *not* do the normal exit 1244 * work, because we don't want to enable interrupts. Fortunately, 1245 * do_nmi doesn't modify pt_regs. 1246 */ 1247 SWAPGS 1248 jmp restore_c_regs_and_iret 1249 1250.Lnmi_from_kernel: 1251 /* 1252 * Here's what our stack frame will look like: 1253 * +---------------------------------------------------------+ 1254 * | original SS | 1255 * | original Return RSP | 1256 * | original RFLAGS | 1257 * | original CS | 1258 * | original RIP | 1259 * +---------------------------------------------------------+ 1260 * | temp storage for rdx | 1261 * +---------------------------------------------------------+ 1262 * | "NMI executing" variable | 1263 * +---------------------------------------------------------+ 1264 * | iret SS } Copied from "outermost" frame | 1265 * | iret Return RSP } on each loop iteration; overwritten | 1266 * | iret RFLAGS } by a nested NMI to force another | 1267 * | iret CS } iteration if needed. | 1268 * | iret RIP } | 1269 * +---------------------------------------------------------+ 1270 * | outermost SS } initialized in first_nmi; | 1271 * | outermost Return RSP } will not be changed before | 1272 * | outermost RFLAGS } NMI processing is done. | 1273 * | outermost CS } Copied to "iret" frame on each | 1274 * | outermost RIP } iteration. | 1275 * +---------------------------------------------------------+ 1276 * | pt_regs | 1277 * +---------------------------------------------------------+ 1278 * 1279 * The "original" frame is used by hardware. Before re-enabling 1280 * NMIs, we need to be done with it, and we need to leave enough 1281 * space for the asm code here. 1282 * 1283 * We return by executing IRET while RSP points to the "iret" frame. 1284 * That will either return for real or it will loop back into NMI 1285 * processing. 1286 * 1287 * The "outermost" frame is copied to the "iret" frame on each 1288 * iteration of the loop, so each iteration starts with the "iret" 1289 * frame pointing to the final return target. 1290 */ 1291 1292 /* 1293 * Determine whether we're a nested NMI. 1294 * 1295 * If we interrupted kernel code between repeat_nmi and 1296 * end_repeat_nmi, then we are a nested NMI. We must not 1297 * modify the "iret" frame because it's being written by 1298 * the outer NMI. That's okay; the outer NMI handler is 1299 * about to about to call do_nmi anyway, so we can just 1300 * resume the outer NMI. 1301 */ 1302 1303 movq $repeat_nmi, %rdx 1304 cmpq 8(%rsp), %rdx 1305 ja 1f 1306 movq $end_repeat_nmi, %rdx 1307 cmpq 8(%rsp), %rdx 1308 ja nested_nmi_out 13091: 1310 1311 /* 1312 * Now check "NMI executing". If it's set, then we're nested. 1313 * This will not detect if we interrupted an outer NMI just 1314 * before IRET. 1315 */ 1316 cmpl $1, -8(%rsp) 1317 je nested_nmi 1318 1319 /* 1320 * Now test if the previous stack was an NMI stack. This covers 1321 * the case where we interrupt an outer NMI after it clears 1322 * "NMI executing" but before IRET. We need to be careful, though: 1323 * there is one case in which RSP could point to the NMI stack 1324 * despite there being no NMI active: naughty userspace controls 1325 * RSP at the very beginning of the SYSCALL targets. We can 1326 * pull a fast one on naughty userspace, though: we program 1327 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1328 * if it controls the kernel's RSP. We set DF before we clear 1329 * "NMI executing". 1330 */ 1331 lea 6*8(%rsp), %rdx 1332 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1333 cmpq %rdx, 4*8(%rsp) 1334 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1335 ja first_nmi 1336 1337 subq $EXCEPTION_STKSZ, %rdx 1338 cmpq %rdx, 4*8(%rsp) 1339 /* If it is below the NMI stack, it is a normal NMI */ 1340 jb first_nmi 1341 1342 /* Ah, it is within the NMI stack. */ 1343 1344 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1345 jz first_nmi /* RSP was user controlled. */ 1346 1347 /* This is a nested NMI. */ 1348 1349nested_nmi: 1350 /* 1351 * Modify the "iret" frame to point to repeat_nmi, forcing another 1352 * iteration of NMI handling. 1353 */ 1354 subq $8, %rsp 1355 leaq -10*8(%rsp), %rdx 1356 pushq $__KERNEL_DS 1357 pushq %rdx 1358 pushfq 1359 pushq $__KERNEL_CS 1360 pushq $repeat_nmi 1361 1362 /* Put stack back */ 1363 addq $(6*8), %rsp 1364 1365nested_nmi_out: 1366 popq %rdx 1367 1368 /* We are returning to kernel mode, so this cannot result in a fault. */ 1369 INTERRUPT_RETURN 1370 1371first_nmi: 1372 /* Restore rdx. */ 1373 movq (%rsp), %rdx 1374 1375 /* Make room for "NMI executing". */ 1376 pushq $0 1377 1378 /* Leave room for the "iret" frame */ 1379 subq $(5*8), %rsp 1380 1381 /* Copy the "original" frame to the "outermost" frame */ 1382 .rept 5 1383 pushq 11*8(%rsp) 1384 .endr 1385 1386 /* Everything up to here is safe from nested NMIs */ 1387 1388#ifdef CONFIG_DEBUG_ENTRY 1389 /* 1390 * For ease of testing, unmask NMIs right away. Disabled by 1391 * default because IRET is very expensive. 1392 */ 1393 pushq $0 /* SS */ 1394 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1395 addq $8, (%rsp) /* Fix up RSP */ 1396 pushfq /* RFLAGS */ 1397 pushq $__KERNEL_CS /* CS */ 1398 pushq $1f /* RIP */ 1399 INTERRUPT_RETURN /* continues at repeat_nmi below */ 14001: 1401#endif 1402 1403repeat_nmi: 1404 /* 1405 * If there was a nested NMI, the first NMI's iret will return 1406 * here. But NMIs are still enabled and we can take another 1407 * nested NMI. The nested NMI checks the interrupted RIP to see 1408 * if it is between repeat_nmi and end_repeat_nmi, and if so 1409 * it will just return, as we are about to repeat an NMI anyway. 1410 * This makes it safe to copy to the stack frame that a nested 1411 * NMI will update. 1412 * 1413 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1414 * we're repeating an NMI, gsbase has the same value that it had on 1415 * the first iteration. paranoid_entry will load the kernel 1416 * gsbase if needed before we call do_nmi. "NMI executing" 1417 * is zero. 1418 */ 1419 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1420 1421 /* 1422 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1423 * here must not modify the "iret" frame while we're writing to 1424 * it or it will end up containing garbage. 1425 */ 1426 addq $(10*8), %rsp 1427 .rept 5 1428 pushq -6*8(%rsp) 1429 .endr 1430 subq $(5*8), %rsp 1431end_repeat_nmi: 1432 1433 /* 1434 * Everything below this point can be preempted by a nested NMI. 1435 * If this happens, then the inner NMI will change the "iret" 1436 * frame to point back to repeat_nmi. 1437 */ 1438 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1439 ALLOC_PT_GPREGS_ON_STACK 1440 1441 /* 1442 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1443 * as we should not be calling schedule in NMI context. 1444 * Even with normal interrupts enabled. An NMI should not be 1445 * setting NEED_RESCHED or anything that normal interrupts and 1446 * exceptions might do. 1447 */ 1448 call paranoid_entry 1449 1450 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1451 movq %rsp, %rdi 1452 movq $-1, %rsi 1453 call do_nmi 1454 1455 testl %ebx, %ebx /* swapgs needed? */ 1456 jnz nmi_restore 1457nmi_swapgs: 1458 SWAPGS_UNSAFE_STACK 1459nmi_restore: 1460 RESTORE_EXTRA_REGS 1461 RESTORE_C_REGS 1462 1463 /* Point RSP at the "iret" frame. */ 1464 REMOVE_PT_GPREGS_FROM_STACK 6*8 1465 1466 /* 1467 * Clear "NMI executing". Set DF first so that we can easily 1468 * distinguish the remaining code between here and IRET from 1469 * the SYSCALL entry and exit paths. On a native kernel, we 1470 * could just inspect RIP, but, on paravirt kernels, 1471 * INTERRUPT_RETURN can translate into a jump into a 1472 * hypercall page. 1473 */ 1474 std 1475 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1476 1477 /* 1478 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI 1479 * stack in a single instruction. We are returning to kernel 1480 * mode, so this cannot result in a fault. 1481 */ 1482 INTERRUPT_RETURN 1483END(nmi) 1484 1485ENTRY(ignore_sysret) 1486 mov $-ENOSYS, %eax 1487 sysret 1488END(ignore_sysret) 1489