1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86_64/entry.S 4 * 5 * Copyright (C) 1991, 1992 Linus Torvalds 6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 8 * 9 * entry.S contains the system-call and fault low-level handling routines. 10 * 11 * Some of this is documented in Documentation/x86/entry_64.txt 12 * 13 * A note on terminology: 14 * - iret frame: Architecture defined interrupt frame from SS to RIP 15 * at the top of the kernel process stack. 16 * 17 * Some macro usage: 18 * - ENTRY/END: Define functions in the symbol table. 19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 20 * - idtentry: Define exception entry points. 21 */ 22#include <linux/linkage.h> 23#include <asm/segment.h> 24#include <asm/cache.h> 25#include <asm/errno.h> 26#include "calling.h" 27#include <asm/asm-offsets.h> 28#include <asm/msr.h> 29#include <asm/unistd.h> 30#include <asm/thread_info.h> 31#include <asm/hw_irq.h> 32#include <asm/page_types.h> 33#include <asm/irqflags.h> 34#include <asm/paravirt.h> 35#include <asm/percpu.h> 36#include <asm/asm.h> 37#include <asm/smap.h> 38#include <asm/pgtable_types.h> 39#include <asm/export.h> 40#include <asm/frame.h> 41#include <linux/err.h> 42 43.code64 44.section .entry.text, "ax" 45 46#ifdef CONFIG_PARAVIRT 47ENTRY(native_usergs_sysret64) 48 UNWIND_HINT_EMPTY 49 swapgs 50 sysretq 51END(native_usergs_sysret64) 52#endif /* CONFIG_PARAVIRT */ 53 54.macro TRACE_IRQS_FLAGS flags:req 55#ifdef CONFIG_TRACE_IRQFLAGS 56 bt $9, \flags /* interrupts off? */ 57 jnc 1f 58 TRACE_IRQS_ON 591: 60#endif 61.endm 62 63.macro TRACE_IRQS_IRETQ 64 TRACE_IRQS_FLAGS EFLAGS(%rsp) 65.endm 66 67/* 68 * When dynamic function tracer is enabled it will add a breakpoint 69 * to all locations that it is about to modify, sync CPUs, update 70 * all the code, sync CPUs, then remove the breakpoints. In this time 71 * if lockdep is enabled, it might jump back into the debug handler 72 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 73 * 74 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 75 * make sure the stack pointer does not get reset back to the top 76 * of the debug stack, and instead just reuses the current stack. 77 */ 78#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 79 80.macro TRACE_IRQS_OFF_DEBUG 81 call debug_stack_set_zero 82 TRACE_IRQS_OFF 83 call debug_stack_reset 84.endm 85 86.macro TRACE_IRQS_ON_DEBUG 87 call debug_stack_set_zero 88 TRACE_IRQS_ON 89 call debug_stack_reset 90.endm 91 92.macro TRACE_IRQS_IRETQ_DEBUG 93 bt $9, EFLAGS(%rsp) /* interrupts off? */ 94 jnc 1f 95 TRACE_IRQS_ON_DEBUG 961: 97.endm 98 99#else 100# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 101# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 102# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 103#endif 104 105/* 106 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 107 * 108 * This is the only entry point used for 64-bit system calls. The 109 * hardware interface is reasonably well designed and the register to 110 * argument mapping Linux uses fits well with the registers that are 111 * available when SYSCALL is used. 112 * 113 * SYSCALL instructions can be found inlined in libc implementations as 114 * well as some other programs and libraries. There are also a handful 115 * of SYSCALL instructions in the vDSO used, for example, as a 116 * clock_gettimeofday fallback. 117 * 118 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 119 * then loads new ss, cs, and rip from previously programmed MSRs. 120 * rflags gets masked by a value from another MSR (so CLD and CLAC 121 * are not needed). SYSCALL does not save anything on the stack 122 * and does not change rsp. 123 * 124 * Registers on entry: 125 * rax system call number 126 * rcx return address 127 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 128 * rdi arg0 129 * rsi arg1 130 * rdx arg2 131 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 132 * r8 arg4 133 * r9 arg5 134 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 135 * 136 * Only called from user space. 137 * 138 * When user can change pt_regs->foo always force IRET. That is because 139 * it deals with uncanonical addresses better. SYSRET has trouble 140 * with them due to bugs in both AMD and Intel CPUs. 141 */ 142 143 .pushsection .entry_trampoline, "ax" 144 145/* 146 * The code in here gets remapped into cpu_entry_area's trampoline. This means 147 * that the assembler and linker have the wrong idea as to where this code 148 * lives (and, in fact, it's mapped more than once, so it's not even at a 149 * fixed address). So we can't reference any symbols outside the entry 150 * trampoline and expect it to work. 151 * 152 * Instead, we carefully abuse %rip-relative addressing. 153 * _entry_trampoline(%rip) refers to the start of the remapped) entry 154 * trampoline. We can thus find cpu_entry_area with this macro: 155 */ 156 157#define CPU_ENTRY_AREA \ 158 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip) 159 160/* The top word of the SYSENTER stack is hot and is usable as scratch space. */ 161#define RSP_SCRATCH CPU_ENTRY_AREA_entry_stack + \ 162 SIZEOF_entry_stack - 8 + CPU_ENTRY_AREA 163 164ENTRY(entry_SYSCALL_64_trampoline) 165 UNWIND_HINT_EMPTY 166 swapgs 167 168 /* Stash the user RSP. */ 169 movq %rsp, RSP_SCRATCH 170 171 /* Load the top of the task stack into RSP */ 172 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp 173 174 /* Start building the simulated IRET frame. */ 175 pushq $__USER_DS /* pt_regs->ss */ 176 pushq RSP_SCRATCH /* pt_regs->sp */ 177 pushq %r11 /* pt_regs->flags */ 178 pushq $__USER_CS /* pt_regs->cs */ 179 pushq %rcx /* pt_regs->ip */ 180 181 /* 182 * x86 lacks a near absolute jump, and we can't jump to the real 183 * entry text with a relative jump. We could push the target 184 * address and then use retq, but this destroys the pipeline on 185 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead, 186 * spill RDI and restore it in a second-stage trampoline. 187 */ 188 pushq %rdi 189 movq $entry_SYSCALL_64_stage2, %rdi 190 jmp *%rdi 191END(entry_SYSCALL_64_trampoline) 192 193 .popsection 194 195ENTRY(entry_SYSCALL_64_stage2) 196 UNWIND_HINT_EMPTY 197 popq %rdi 198 jmp entry_SYSCALL_64_after_hwframe 199END(entry_SYSCALL_64_stage2) 200 201ENTRY(entry_SYSCALL_64) 202 UNWIND_HINT_EMPTY 203 /* 204 * Interrupts are off on entry. 205 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 206 * it is too small to ever cause noticeable irq latency. 207 */ 208 209 swapgs 210 movq %rsp, PER_CPU_VAR(rsp_scratch) 211 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 212 213 /* Construct struct pt_regs on stack */ 214 pushq $__USER_DS /* pt_regs->ss */ 215 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 216 pushq %r11 /* pt_regs->flags */ 217 pushq $__USER_CS /* pt_regs->cs */ 218 pushq %rcx /* pt_regs->ip */ 219GLOBAL(entry_SYSCALL_64_after_hwframe) 220 pushq %rax /* pt_regs->orig_ax */ 221 pushq %rdi /* pt_regs->di */ 222 pushq %rsi /* pt_regs->si */ 223 pushq %rdx /* pt_regs->dx */ 224 pushq %rcx /* pt_regs->cx */ 225 pushq $-ENOSYS /* pt_regs->ax */ 226 pushq %r8 /* pt_regs->r8 */ 227 pushq %r9 /* pt_regs->r9 */ 228 pushq %r10 /* pt_regs->r10 */ 229 pushq %r11 /* pt_regs->r11 */ 230 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 231 UNWIND_HINT_REGS extra=0 232 233 TRACE_IRQS_OFF 234 235 /* 236 * If we need to do entry work or if we guess we'll need to do 237 * exit work, go straight to the slow path. 238 */ 239 movq PER_CPU_VAR(current_task), %r11 240 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 241 jnz entry_SYSCALL64_slow_path 242 243entry_SYSCALL_64_fastpath: 244 /* 245 * Easy case: enable interrupts and issue the syscall. If the syscall 246 * needs pt_regs, we'll call a stub that disables interrupts again 247 * and jumps to the slow path. 248 */ 249 TRACE_IRQS_ON 250 ENABLE_INTERRUPTS(CLBR_NONE) 251#if __SYSCALL_MASK == ~0 252 cmpq $__NR_syscall_max, %rax 253#else 254 andl $__SYSCALL_MASK, %eax 255 cmpl $__NR_syscall_max, %eax 256#endif 257 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 258 movq %r10, %rcx 259 260 /* 261 * This call instruction is handled specially in stub_ptregs_64. 262 * It might end up jumping to the slow path. If it jumps, RAX 263 * and all argument registers are clobbered. 264 */ 265 call *sys_call_table(, %rax, 8) 266.Lentry_SYSCALL_64_after_fastpath_call: 267 268 movq %rax, RAX(%rsp) 2691: 270 271 /* 272 * If we get here, then we know that pt_regs is clean for SYSRET64. 273 * If we see that no exit work is required (which we are required 274 * to check with IRQs off), then we can go straight to SYSRET64. 275 */ 276 DISABLE_INTERRUPTS(CLBR_ANY) 277 TRACE_IRQS_OFF 278 movq PER_CPU_VAR(current_task), %r11 279 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 280 jnz 1f 281 282 LOCKDEP_SYS_EXIT 283 TRACE_IRQS_ON /* user mode is traced as IRQs on */ 284 movq RIP(%rsp), %rcx 285 movq EFLAGS(%rsp), %r11 286 addq $6*8, %rsp /* skip extra regs -- they were preserved */ 287 UNWIND_HINT_EMPTY 288 jmp .Lpop_c_regs_except_rcx_r11_and_sysret 289 2901: 291 /* 292 * The fast path looked good when we started, but something changed 293 * along the way and we need to switch to the slow path. Calling 294 * raise(3) will trigger this, for example. IRQs are off. 295 */ 296 TRACE_IRQS_ON 297 ENABLE_INTERRUPTS(CLBR_ANY) 298 SAVE_EXTRA_REGS 299 movq %rsp, %rdi 300 call syscall_return_slowpath /* returns with IRQs disabled */ 301 jmp return_from_SYSCALL_64 302 303entry_SYSCALL64_slow_path: 304 /* IRQs are off. */ 305 SAVE_EXTRA_REGS 306 movq %rsp, %rdi 307 call do_syscall_64 /* returns with IRQs disabled */ 308 309return_from_SYSCALL_64: 310 TRACE_IRQS_IRETQ /* we're about to change IF */ 311 312 /* 313 * Try to use SYSRET instead of IRET if we're returning to 314 * a completely clean 64-bit userspace context. If we're not, 315 * go to the slow exit path. 316 */ 317 movq RCX(%rsp), %rcx 318 movq RIP(%rsp), %r11 319 320 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */ 321 jne swapgs_restore_regs_and_return_to_usermode 322 323 /* 324 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 325 * in kernel space. This essentially lets the user take over 326 * the kernel, since userspace controls RSP. 327 * 328 * If width of "canonical tail" ever becomes variable, this will need 329 * to be updated to remain correct on both old and new CPUs. 330 * 331 * Change top bits to match most significant bit (47th or 56th bit 332 * depending on paging mode) in the address. 333 */ 334 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 335 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 336 337 /* If this changed %rcx, it was not canonical */ 338 cmpq %rcx, %r11 339 jne swapgs_restore_regs_and_return_to_usermode 340 341 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 342 jne swapgs_restore_regs_and_return_to_usermode 343 344 movq R11(%rsp), %r11 345 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 346 jne swapgs_restore_regs_and_return_to_usermode 347 348 /* 349 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot 350 * restore RF properly. If the slowpath sets it for whatever reason, we 351 * need to restore it correctly. 352 * 353 * SYSRET can restore TF, but unlike IRET, restoring TF results in a 354 * trap from userspace immediately after SYSRET. This would cause an 355 * infinite loop whenever #DB happens with register state that satisfies 356 * the opportunistic SYSRET conditions. For example, single-stepping 357 * this user code: 358 * 359 * movq $stuck_here, %rcx 360 * pushfq 361 * popq %r11 362 * stuck_here: 363 * 364 * would never get past 'stuck_here'. 365 */ 366 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 367 jnz swapgs_restore_regs_and_return_to_usermode 368 369 /* nothing to check for RSP */ 370 371 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 372 jne swapgs_restore_regs_and_return_to_usermode 373 374 /* 375 * We win! This label is here just for ease of understanding 376 * perf profiles. Nothing jumps here. 377 */ 378syscall_return_via_sysret: 379 /* rcx and r11 are already restored (see code above) */ 380 UNWIND_HINT_EMPTY 381 POP_EXTRA_REGS 382.Lpop_c_regs_except_rcx_r11_and_sysret: 383 popq %rsi /* skip r11 */ 384 popq %r10 385 popq %r9 386 popq %r8 387 popq %rax 388 popq %rsi /* skip rcx */ 389 popq %rdx 390 popq %rsi 391 392 /* 393 * Now all regs are restored except RSP and RDI. 394 * Save old stack pointer and switch to trampoline stack. 395 */ 396 movq %rsp, %rdi 397 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp 398 399 pushq RSP-RDI(%rdi) /* RSP */ 400 pushq (%rdi) /* RDI */ 401 402 /* 403 * We are on the trampoline stack. All regs except RDI are live. 404 * We can do future final exit work right here. 405 */ 406 407 popq %rdi 408 popq %rsp 409 USERGS_SYSRET64 410END(entry_SYSCALL_64) 411 412ENTRY(stub_ptregs_64) 413 /* 414 * Syscalls marked as needing ptregs land here. 415 * If we are on the fast path, we need to save the extra regs, 416 * which we achieve by trying again on the slow path. If we are on 417 * the slow path, the extra regs are already saved. 418 * 419 * RAX stores a pointer to the C function implementing the syscall. 420 * IRQs are on. 421 */ 422 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp) 423 jne 1f 424 425 /* 426 * Called from fast path -- disable IRQs again, pop return address 427 * and jump to slow path 428 */ 429 DISABLE_INTERRUPTS(CLBR_ANY) 430 TRACE_IRQS_OFF 431 popq %rax 432 UNWIND_HINT_REGS extra=0 433 jmp entry_SYSCALL64_slow_path 434 4351: 436 jmp *%rax /* Called from C */ 437END(stub_ptregs_64) 438 439.macro ptregs_stub func 440ENTRY(ptregs_\func) 441 UNWIND_HINT_FUNC 442 leaq \func(%rip), %rax 443 jmp stub_ptregs_64 444END(ptregs_\func) 445.endm 446 447/* Instantiate ptregs_stub for each ptregs-using syscall */ 448#define __SYSCALL_64_QUAL_(sym) 449#define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym 450#define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym) 451#include <asm/syscalls_64.h> 452 453/* 454 * %rdi: prev task 455 * %rsi: next task 456 */ 457ENTRY(__switch_to_asm) 458 UNWIND_HINT_FUNC 459 /* 460 * Save callee-saved registers 461 * This must match the order in inactive_task_frame 462 */ 463 pushq %rbp 464 pushq %rbx 465 pushq %r12 466 pushq %r13 467 pushq %r14 468 pushq %r15 469 470 /* switch stack */ 471 movq %rsp, TASK_threadsp(%rdi) 472 movq TASK_threadsp(%rsi), %rsp 473 474#ifdef CONFIG_CC_STACKPROTECTOR 475 movq TASK_stack_canary(%rsi), %rbx 476 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset 477#endif 478 479 /* restore callee-saved registers */ 480 popq %r15 481 popq %r14 482 popq %r13 483 popq %r12 484 popq %rbx 485 popq %rbp 486 487 jmp __switch_to 488END(__switch_to_asm) 489 490/* 491 * A newly forked process directly context switches into this address. 492 * 493 * rax: prev task we switched from 494 * rbx: kernel thread func (NULL for user thread) 495 * r12: kernel thread arg 496 */ 497ENTRY(ret_from_fork) 498 UNWIND_HINT_EMPTY 499 movq %rax, %rdi 500 call schedule_tail /* rdi: 'prev' task parameter */ 501 502 testq %rbx, %rbx /* from kernel_thread? */ 503 jnz 1f /* kernel threads are uncommon */ 504 5052: 506 UNWIND_HINT_REGS 507 movq %rsp, %rdi 508 call syscall_return_slowpath /* returns with IRQs disabled */ 509 TRACE_IRQS_ON /* user mode is traced as IRQS on */ 510 jmp swapgs_restore_regs_and_return_to_usermode 511 5121: 513 /* kernel thread */ 514 movq %r12, %rdi 515 call *%rbx 516 /* 517 * A kernel thread is allowed to return here after successfully 518 * calling do_execve(). Exit to userspace to complete the execve() 519 * syscall. 520 */ 521 movq $0, RAX(%rsp) 522 jmp 2b 523END(ret_from_fork) 524 525/* 526 * Build the entry stubs with some assembler magic. 527 * We pack 1 stub into every 8-byte block. 528 */ 529 .align 8 530ENTRY(irq_entries_start) 531 vector=FIRST_EXTERNAL_VECTOR 532 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 533 UNWIND_HINT_IRET_REGS 534 pushq $(~vector+0x80) /* Note: always in signed byte range */ 535 jmp common_interrupt 536 .align 8 537 vector=vector+1 538 .endr 539END(irq_entries_start) 540 541.macro DEBUG_ENTRY_ASSERT_IRQS_OFF 542#ifdef CONFIG_DEBUG_ENTRY 543 pushq %rax 544 SAVE_FLAGS(CLBR_RAX) 545 testl $X86_EFLAGS_IF, %eax 546 jz .Lokay_\@ 547 ud2 548.Lokay_\@: 549 popq %rax 550#endif 551.endm 552 553/* 554 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers 555 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone. 556 * Requires kernel GSBASE. 557 * 558 * The invariant is that, if irq_count != -1, then the IRQ stack is in use. 559 */ 560.macro ENTER_IRQ_STACK regs=1 old_rsp 561 DEBUG_ENTRY_ASSERT_IRQS_OFF 562 movq %rsp, \old_rsp 563 564 .if \regs 565 UNWIND_HINT_REGS base=\old_rsp 566 .endif 567 568 incl PER_CPU_VAR(irq_count) 569 jnz .Lirq_stack_push_old_rsp_\@ 570 571 /* 572 * Right now, if we just incremented irq_count to zero, we've 573 * claimed the IRQ stack but we haven't switched to it yet. 574 * 575 * If anything is added that can interrupt us here without using IST, 576 * it must be *extremely* careful to limit its stack usage. This 577 * could include kprobes and a hypothetical future IST-less #DB 578 * handler. 579 * 580 * The OOPS unwinder relies on the word at the top of the IRQ 581 * stack linking back to the previous RSP for the entire time we're 582 * on the IRQ stack. For this to work reliably, we need to write 583 * it before we actually move ourselves to the IRQ stack. 584 */ 585 586 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8) 587 movq PER_CPU_VAR(irq_stack_ptr), %rsp 588 589#ifdef CONFIG_DEBUG_ENTRY 590 /* 591 * If the first movq above becomes wrong due to IRQ stack layout 592 * changes, the only way we'll notice is if we try to unwind right 593 * here. Assert that we set up the stack right to catch this type 594 * of bug quickly. 595 */ 596 cmpq -8(%rsp), \old_rsp 597 je .Lirq_stack_okay\@ 598 ud2 599 .Lirq_stack_okay\@: 600#endif 601 602.Lirq_stack_push_old_rsp_\@: 603 pushq \old_rsp 604 605 .if \regs 606 UNWIND_HINT_REGS indirect=1 607 .endif 608.endm 609 610/* 611 * Undoes ENTER_IRQ_STACK. 612 */ 613.macro LEAVE_IRQ_STACK regs=1 614 DEBUG_ENTRY_ASSERT_IRQS_OFF 615 /* We need to be off the IRQ stack before decrementing irq_count. */ 616 popq %rsp 617 618 .if \regs 619 UNWIND_HINT_REGS 620 .endif 621 622 /* 623 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming 624 * the irq stack but we're not on it. 625 */ 626 627 decl PER_CPU_VAR(irq_count) 628.endm 629 630/* 631 * Interrupt entry/exit. 632 * 633 * Interrupt entry points save only callee clobbered registers in fast path. 634 * 635 * Entry runs with interrupts off. 636 */ 637 638/* 0(%rsp): ~(interrupt number) */ 639 .macro interrupt func 640 cld 641 642 testb $3, CS-ORIG_RAX(%rsp) 643 jz 1f 644 SWAPGS 645 call switch_to_thread_stack 6461: 647 648 ALLOC_PT_GPREGS_ON_STACK 649 SAVE_C_REGS 650 SAVE_EXTRA_REGS 651 ENCODE_FRAME_POINTER 652 653 testb $3, CS(%rsp) 654 jz 1f 655 656 /* 657 * IRQ from user mode. 658 * 659 * We need to tell lockdep that IRQs are off. We can't do this until 660 * we fix gsbase, and we should do it before enter_from_user_mode 661 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 662 * the simplest way to handle it is to just call it twice if 663 * we enter from user mode. There's no reason to optimize this since 664 * TRACE_IRQS_OFF is a no-op if lockdep is off. 665 */ 666 TRACE_IRQS_OFF 667 668 CALL_enter_from_user_mode 669 6701: 671 ENTER_IRQ_STACK old_rsp=%rdi 672 /* We entered an interrupt context - irqs are off: */ 673 TRACE_IRQS_OFF 674 675 call \func /* rdi points to pt_regs */ 676 .endm 677 678 /* 679 * The interrupt stubs push (~vector+0x80) onto the stack and 680 * then jump to common_interrupt. 681 */ 682 .p2align CONFIG_X86_L1_CACHE_SHIFT 683common_interrupt: 684 ASM_CLAC 685 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 686 interrupt do_IRQ 687 /* 0(%rsp): old RSP */ 688ret_from_intr: 689 DISABLE_INTERRUPTS(CLBR_ANY) 690 TRACE_IRQS_OFF 691 692 LEAVE_IRQ_STACK 693 694 testb $3, CS(%rsp) 695 jz retint_kernel 696 697 /* Interrupt came from user space */ 698GLOBAL(retint_user) 699 mov %rsp,%rdi 700 call prepare_exit_to_usermode 701 TRACE_IRQS_IRETQ 702 703GLOBAL(swapgs_restore_regs_and_return_to_usermode) 704#ifdef CONFIG_DEBUG_ENTRY 705 /* Assert that pt_regs indicates user mode. */ 706 testb $3, CS(%rsp) 707 jnz 1f 708 ud2 7091: 710#endif 711 POP_EXTRA_REGS 712 popq %r11 713 popq %r10 714 popq %r9 715 popq %r8 716 popq %rax 717 popq %rcx 718 popq %rdx 719 popq %rsi 720 721 /* 722 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS. 723 * Save old stack pointer and switch to trampoline stack. 724 */ 725 movq %rsp, %rdi 726 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp 727 728 /* Copy the IRET frame to the trampoline stack. */ 729 pushq 6*8(%rdi) /* SS */ 730 pushq 5*8(%rdi) /* RSP */ 731 pushq 4*8(%rdi) /* EFLAGS */ 732 pushq 3*8(%rdi) /* CS */ 733 pushq 2*8(%rdi) /* RIP */ 734 735 /* Push user RDI on the trampoline stack. */ 736 pushq (%rdi) 737 738 /* 739 * We are on the trampoline stack. All regs except RDI are live. 740 * We can do future final exit work right here. 741 */ 742 743 /* Restore RDI. */ 744 popq %rdi 745 SWAPGS 746 INTERRUPT_RETURN 747 748 749/* Returning to kernel space */ 750retint_kernel: 751#ifdef CONFIG_PREEMPT 752 /* Interrupts are off */ 753 /* Check if we need preemption */ 754 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 755 jnc 1f 7560: cmpl $0, PER_CPU_VAR(__preempt_count) 757 jnz 1f 758 call preempt_schedule_irq 759 jmp 0b 7601: 761#endif 762 /* 763 * The iretq could re-enable interrupts: 764 */ 765 TRACE_IRQS_IRETQ 766 767GLOBAL(restore_regs_and_return_to_kernel) 768#ifdef CONFIG_DEBUG_ENTRY 769 /* Assert that pt_regs indicates kernel mode. */ 770 testb $3, CS(%rsp) 771 jz 1f 772 ud2 7731: 774#endif 775 POP_EXTRA_REGS 776 POP_C_REGS 777 addq $8, %rsp /* skip regs->orig_ax */ 778 INTERRUPT_RETURN 779 780ENTRY(native_iret) 781 UNWIND_HINT_IRET_REGS 782 /* 783 * Are we returning to a stack segment from the LDT? Note: in 784 * 64-bit mode SS:RSP on the exception stack is always valid. 785 */ 786#ifdef CONFIG_X86_ESPFIX64 787 testb $4, (SS-RIP)(%rsp) 788 jnz native_irq_return_ldt 789#endif 790 791.global native_irq_return_iret 792native_irq_return_iret: 793 /* 794 * This may fault. Non-paranoid faults on return to userspace are 795 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 796 * Double-faults due to espfix64 are handled in do_double_fault. 797 * Other faults here are fatal. 798 */ 799 iretq 800 801#ifdef CONFIG_X86_ESPFIX64 802native_irq_return_ldt: 803 /* 804 * We are running with user GSBASE. All GPRs contain their user 805 * values. We have a percpu ESPFIX stack that is eight slots 806 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom 807 * of the ESPFIX stack. 808 * 809 * We clobber RAX and RDI in this code. We stash RDI on the 810 * normal stack and RAX on the ESPFIX stack. 811 * 812 * The ESPFIX stack layout we set up looks like this: 813 * 814 * --- top of ESPFIX stack --- 815 * SS 816 * RSP 817 * RFLAGS 818 * CS 819 * RIP <-- RSP points here when we're done 820 * RAX <-- espfix_waddr points here 821 * --- bottom of ESPFIX stack --- 822 */ 823 824 pushq %rdi /* Stash user RDI */ 825 SWAPGS 826 movq PER_CPU_VAR(espfix_waddr), %rdi 827 movq %rax, (0*8)(%rdi) /* user RAX */ 828 movq (1*8)(%rsp), %rax /* user RIP */ 829 movq %rax, (1*8)(%rdi) 830 movq (2*8)(%rsp), %rax /* user CS */ 831 movq %rax, (2*8)(%rdi) 832 movq (3*8)(%rsp), %rax /* user RFLAGS */ 833 movq %rax, (3*8)(%rdi) 834 movq (5*8)(%rsp), %rax /* user SS */ 835 movq %rax, (5*8)(%rdi) 836 movq (4*8)(%rsp), %rax /* user RSP */ 837 movq %rax, (4*8)(%rdi) 838 /* Now RAX == RSP. */ 839 840 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */ 841 popq %rdi /* Restore user RDI */ 842 843 /* 844 * espfix_stack[31:16] == 0. The page tables are set up such that 845 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of 846 * espfix_waddr for any X. That is, there are 65536 RO aliases of 847 * the same page. Set up RSP so that RSP[31:16] contains the 848 * respective 16 bits of the /userspace/ RSP and RSP nonetheless 849 * still points to an RO alias of the ESPFIX stack. 850 */ 851 orq PER_CPU_VAR(espfix_stack), %rax 852 SWAPGS 853 movq %rax, %rsp 854 UNWIND_HINT_IRET_REGS offset=8 855 856 /* 857 * At this point, we cannot write to the stack any more, but we can 858 * still read. 859 */ 860 popq %rax /* Restore user RAX */ 861 862 /* 863 * RSP now points to an ordinary IRET frame, except that the page 864 * is read-only and RSP[31:16] are preloaded with the userspace 865 * values. We can now IRET back to userspace. 866 */ 867 jmp native_irq_return_iret 868#endif 869END(common_interrupt) 870 871/* 872 * APIC interrupts. 873 */ 874.macro apicinterrupt3 num sym do_sym 875ENTRY(\sym) 876 UNWIND_HINT_IRET_REGS 877 ASM_CLAC 878 pushq $~(\num) 879.Lcommon_\sym: 880 interrupt \do_sym 881 jmp ret_from_intr 882END(\sym) 883.endm 884 885/* Make sure APIC interrupt handlers end up in the irqentry section: */ 886#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax" 887#define POP_SECTION_IRQENTRY .popsection 888 889.macro apicinterrupt num sym do_sym 890PUSH_SECTION_IRQENTRY 891apicinterrupt3 \num \sym \do_sym 892POP_SECTION_IRQENTRY 893.endm 894 895#ifdef CONFIG_SMP 896apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 897apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 898#endif 899 900#ifdef CONFIG_X86_UV 901apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 902#endif 903 904apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 905apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 906 907#ifdef CONFIG_HAVE_KVM 908apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 909apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 910apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi 911#endif 912 913#ifdef CONFIG_X86_MCE_THRESHOLD 914apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 915#endif 916 917#ifdef CONFIG_X86_MCE_AMD 918apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 919#endif 920 921#ifdef CONFIG_X86_THERMAL_VECTOR 922apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 923#endif 924 925#ifdef CONFIG_SMP 926apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 927apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 928apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 929#endif 930 931apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 932apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 933 934#ifdef CONFIG_IRQ_WORK 935apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 936#endif 937 938/* 939 * Exception entry points. 940 */ 941#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8) 942 943/* 944 * Switch to the thread stack. This is called with the IRET frame and 945 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and 946 * space has not been allocated for them.) 947 */ 948ENTRY(switch_to_thread_stack) 949 UNWIND_HINT_FUNC 950 951 pushq %rdi 952 movq %rsp, %rdi 953 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 954 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI 955 956 pushq 7*8(%rdi) /* regs->ss */ 957 pushq 6*8(%rdi) /* regs->rsp */ 958 pushq 5*8(%rdi) /* regs->eflags */ 959 pushq 4*8(%rdi) /* regs->cs */ 960 pushq 3*8(%rdi) /* regs->ip */ 961 pushq 2*8(%rdi) /* regs->orig_ax */ 962 pushq 8(%rdi) /* return address */ 963 UNWIND_HINT_FUNC 964 965 movq (%rdi), %rdi 966 ret 967END(switch_to_thread_stack) 968 969.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 970ENTRY(\sym) 971 UNWIND_HINT_IRET_REGS offset=\has_error_code*8 972 973 /* Sanity check */ 974 .if \shift_ist != -1 && \paranoid == 0 975 .error "using shift_ist requires paranoid=1" 976 .endif 977 978 ASM_CLAC 979 980 .if \has_error_code == 0 981 pushq $-1 /* ORIG_RAX: no syscall to restart */ 982 .endif 983 984 ALLOC_PT_GPREGS_ON_STACK 985 986 .if \paranoid < 2 987 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 988 jnz .Lfrom_usermode_switch_stack_\@ 989 .endif 990 991 .if \paranoid 992 call paranoid_entry 993 .else 994 call error_entry 995 .endif 996 UNWIND_HINT_REGS 997 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 998 999 .if \paranoid 1000 .if \shift_ist != -1 1001 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 1002 .else 1003 TRACE_IRQS_OFF 1004 .endif 1005 .endif 1006 1007 movq %rsp, %rdi /* pt_regs pointer */ 1008 1009 .if \has_error_code 1010 movq ORIG_RAX(%rsp), %rsi /* get error code */ 1011 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 1012 .else 1013 xorl %esi, %esi /* no error code */ 1014 .endif 1015 1016 .if \shift_ist != -1 1017 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 1018 .endif 1019 1020 call \do_sym 1021 1022 .if \shift_ist != -1 1023 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 1024 .endif 1025 1026 /* these procedures expect "no swapgs" flag in ebx */ 1027 .if \paranoid 1028 jmp paranoid_exit 1029 .else 1030 jmp error_exit 1031 .endif 1032 1033 .if \paranoid < 2 1034 /* 1035 * Entry from userspace. Switch stacks and treat it 1036 * as a normal entry. This means that paranoid handlers 1037 * run in real process context if user_mode(regs). 1038 */ 1039.Lfrom_usermode_switch_stack_\@: 1040 call error_entry 1041 1042 movq %rsp, %rdi /* pt_regs pointer */ 1043 1044 .if \has_error_code 1045 movq ORIG_RAX(%rsp), %rsi /* get error code */ 1046 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 1047 .else 1048 xorl %esi, %esi /* no error code */ 1049 .endif 1050 1051 call \do_sym 1052 1053 jmp error_exit /* %ebx: no swapgs flag */ 1054 .endif 1055END(\sym) 1056.endm 1057 1058idtentry divide_error do_divide_error has_error_code=0 1059idtentry overflow do_overflow has_error_code=0 1060idtentry bounds do_bounds has_error_code=0 1061idtentry invalid_op do_invalid_op has_error_code=0 1062idtentry device_not_available do_device_not_available has_error_code=0 1063idtentry double_fault do_double_fault has_error_code=1 paranoid=2 1064idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 1065idtentry invalid_TSS do_invalid_TSS has_error_code=1 1066idtentry segment_not_present do_segment_not_present has_error_code=1 1067idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 1068idtentry coprocessor_error do_coprocessor_error has_error_code=0 1069idtentry alignment_check do_alignment_check has_error_code=1 1070idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 1071 1072 1073 /* 1074 * Reload gs selector with exception handling 1075 * edi: new selector 1076 */ 1077ENTRY(native_load_gs_index) 1078 FRAME_BEGIN 1079 pushfq 1080 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 1081 TRACE_IRQS_OFF 1082 SWAPGS 1083.Lgs_change: 1084 movl %edi, %gs 10852: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE 1086 SWAPGS 1087 TRACE_IRQS_FLAGS (%rsp) 1088 popfq 1089 FRAME_END 1090 ret 1091ENDPROC(native_load_gs_index) 1092EXPORT_SYMBOL(native_load_gs_index) 1093 1094 _ASM_EXTABLE(.Lgs_change, bad_gs) 1095 .section .fixup, "ax" 1096 /* running with kernelgs */ 1097bad_gs: 1098 SWAPGS /* switch back to user gs */ 1099.macro ZAP_GS 1100 /* This can't be a string because the preprocessor needs to see it. */ 1101 movl $__USER_DS, %eax 1102 movl %eax, %gs 1103.endm 1104 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG 1105 xorl %eax, %eax 1106 movl %eax, %gs 1107 jmp 2b 1108 .previous 1109 1110/* Call softirq on interrupt stack. Interrupts are off. */ 1111ENTRY(do_softirq_own_stack) 1112 pushq %rbp 1113 mov %rsp, %rbp 1114 ENTER_IRQ_STACK regs=0 old_rsp=%r11 1115 call __do_softirq 1116 LEAVE_IRQ_STACK regs=0 1117 leaveq 1118 ret 1119ENDPROC(do_softirq_own_stack) 1120 1121#ifdef CONFIG_XEN 1122idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0 1123 1124/* 1125 * A note on the "critical region" in our callback handler. 1126 * We want to avoid stacking callback handlers due to events occurring 1127 * during handling of the last event. To do this, we keep events disabled 1128 * until we've done all processing. HOWEVER, we must enable events before 1129 * popping the stack frame (can't be done atomically) and so it would still 1130 * be possible to get enough handler activations to overflow the stack. 1131 * Although unlikely, bugs of that kind are hard to track down, so we'd 1132 * like to avoid the possibility. 1133 * So, on entry to the handler we detect whether we interrupted an 1134 * existing activation in its critical region -- if so, we pop the current 1135 * activation and restart the handler using the previous one. 1136 */ 1137ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 1138 1139/* 1140 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 1141 * see the correct pointer to the pt_regs 1142 */ 1143 UNWIND_HINT_FUNC 1144 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 1145 UNWIND_HINT_REGS 1146 1147 ENTER_IRQ_STACK old_rsp=%r10 1148 call xen_evtchn_do_upcall 1149 LEAVE_IRQ_STACK 1150 1151#ifndef CONFIG_PREEMPT 1152 call xen_maybe_preempt_hcall 1153#endif 1154 jmp error_exit 1155END(xen_do_hypervisor_callback) 1156 1157/* 1158 * Hypervisor uses this for application faults while it executes. 1159 * We get here for two reasons: 1160 * 1. Fault while reloading DS, ES, FS or GS 1161 * 2. Fault while executing IRET 1162 * Category 1 we do not need to fix up as Xen has already reloaded all segment 1163 * registers that could be reloaded and zeroed the others. 1164 * Category 2 we fix up by killing the current process. We cannot use the 1165 * normal Linux return path in this case because if we use the IRET hypercall 1166 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 1167 * We distinguish between categories by comparing each saved segment register 1168 * with its current contents: any discrepancy means we in category 1. 1169 */ 1170ENTRY(xen_failsafe_callback) 1171 UNWIND_HINT_EMPTY 1172 movl %ds, %ecx 1173 cmpw %cx, 0x10(%rsp) 1174 jne 1f 1175 movl %es, %ecx 1176 cmpw %cx, 0x18(%rsp) 1177 jne 1f 1178 movl %fs, %ecx 1179 cmpw %cx, 0x20(%rsp) 1180 jne 1f 1181 movl %gs, %ecx 1182 cmpw %cx, 0x28(%rsp) 1183 jne 1f 1184 /* All segments match their saved values => Category 2 (Bad IRET). */ 1185 movq (%rsp), %rcx 1186 movq 8(%rsp), %r11 1187 addq $0x30, %rsp 1188 pushq $0 /* RIP */ 1189 UNWIND_HINT_IRET_REGS offset=8 1190 jmp general_protection 11911: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 1192 movq (%rsp), %rcx 1193 movq 8(%rsp), %r11 1194 addq $0x30, %rsp 1195 UNWIND_HINT_IRET_REGS 1196 pushq $-1 /* orig_ax = -1 => not a system call */ 1197 ALLOC_PT_GPREGS_ON_STACK 1198 SAVE_C_REGS 1199 SAVE_EXTRA_REGS 1200 ENCODE_FRAME_POINTER 1201 jmp error_exit 1202END(xen_failsafe_callback) 1203 1204apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1205 xen_hvm_callback_vector xen_evtchn_do_upcall 1206 1207#endif /* CONFIG_XEN */ 1208 1209#if IS_ENABLED(CONFIG_HYPERV) 1210apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1211 hyperv_callback_vector hyperv_vector_handler 1212#endif /* CONFIG_HYPERV */ 1213 1214idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1215idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1216idtentry stack_segment do_stack_segment has_error_code=1 1217 1218#ifdef CONFIG_XEN 1219idtentry xennmi do_nmi has_error_code=0 1220idtentry xendebug do_debug has_error_code=0 1221idtentry xenint3 do_int3 has_error_code=0 1222#endif 1223 1224idtentry general_protection do_general_protection has_error_code=1 1225idtentry page_fault do_page_fault has_error_code=1 1226 1227#ifdef CONFIG_KVM_GUEST 1228idtentry async_page_fault do_async_page_fault has_error_code=1 1229#endif 1230 1231#ifdef CONFIG_X86_MCE 1232idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 1233#endif 1234 1235/* 1236 * Save all registers in pt_regs, and switch gs if needed. 1237 * Use slow, but surefire "are we in kernel?" check. 1238 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 1239 */ 1240ENTRY(paranoid_entry) 1241 UNWIND_HINT_FUNC 1242 cld 1243 SAVE_C_REGS 8 1244 SAVE_EXTRA_REGS 8 1245 ENCODE_FRAME_POINTER 8 1246 movl $1, %ebx 1247 movl $MSR_GS_BASE, %ecx 1248 rdmsr 1249 testl %edx, %edx 1250 js 1f /* negative -> in kernel */ 1251 SWAPGS 1252 xorl %ebx, %ebx 12531: ret 1254END(paranoid_entry) 1255 1256/* 1257 * "Paranoid" exit path from exception stack. This is invoked 1258 * only on return from non-NMI IST interrupts that came 1259 * from kernel space. 1260 * 1261 * We may be returning to very strange contexts (e.g. very early 1262 * in syscall entry), so checking for preemption here would 1263 * be complicated. Fortunately, we there's no good reason 1264 * to try to handle preemption here. 1265 * 1266 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1267 */ 1268ENTRY(paranoid_exit) 1269 UNWIND_HINT_REGS 1270 DISABLE_INTERRUPTS(CLBR_ANY) 1271 TRACE_IRQS_OFF_DEBUG 1272 testl %ebx, %ebx /* swapgs needed? */ 1273 jnz .Lparanoid_exit_no_swapgs 1274 TRACE_IRQS_IRETQ 1275 SWAPGS_UNSAFE_STACK 1276 jmp .Lparanoid_exit_restore 1277.Lparanoid_exit_no_swapgs: 1278 TRACE_IRQS_IRETQ_DEBUG 1279.Lparanoid_exit_restore: 1280 jmp restore_regs_and_return_to_kernel 1281END(paranoid_exit) 1282 1283/* 1284 * Save all registers in pt_regs, and switch gs if needed. 1285 * Return: EBX=0: came from user mode; EBX=1: otherwise 1286 */ 1287ENTRY(error_entry) 1288 UNWIND_HINT_FUNC 1289 cld 1290 SAVE_C_REGS 8 1291 SAVE_EXTRA_REGS 8 1292 ENCODE_FRAME_POINTER 8 1293 xorl %ebx, %ebx 1294 testb $3, CS+8(%rsp) 1295 jz .Lerror_kernelspace 1296 1297 /* 1298 * We entered from user mode or we're pretending to have entered 1299 * from user mode due to an IRET fault. 1300 */ 1301 SWAPGS 1302 1303.Lerror_entry_from_usermode_after_swapgs: 1304 /* Put us onto the real thread stack. */ 1305 popq %r12 /* save return addr in %12 */ 1306 movq %rsp, %rdi /* arg0 = pt_regs pointer */ 1307 call sync_regs 1308 movq %rax, %rsp /* switch stack */ 1309 ENCODE_FRAME_POINTER 1310 pushq %r12 1311 1312 /* 1313 * We need to tell lockdep that IRQs are off. We can't do this until 1314 * we fix gsbase, and we should do it before enter_from_user_mode 1315 * (which can take locks). 1316 */ 1317 TRACE_IRQS_OFF 1318 CALL_enter_from_user_mode 1319 ret 1320 1321.Lerror_entry_done: 1322 TRACE_IRQS_OFF 1323 ret 1324 1325 /* 1326 * There are two places in the kernel that can potentially fault with 1327 * usergs. Handle them here. B stepping K8s sometimes report a 1328 * truncated RIP for IRET exceptions returning to compat mode. Check 1329 * for these here too. 1330 */ 1331.Lerror_kernelspace: 1332 incl %ebx 1333 leaq native_irq_return_iret(%rip), %rcx 1334 cmpq %rcx, RIP+8(%rsp) 1335 je .Lerror_bad_iret 1336 movl %ecx, %eax /* zero extend */ 1337 cmpq %rax, RIP+8(%rsp) 1338 je .Lbstep_iret 1339 cmpq $.Lgs_change, RIP+8(%rsp) 1340 jne .Lerror_entry_done 1341 1342 /* 1343 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up 1344 * gsbase and proceed. We'll fix up the exception and land in 1345 * .Lgs_change's error handler with kernel gsbase. 1346 */ 1347 SWAPGS 1348 jmp .Lerror_entry_done 1349 1350.Lbstep_iret: 1351 /* Fix truncated RIP */ 1352 movq %rcx, RIP+8(%rsp) 1353 /* fall through */ 1354 1355.Lerror_bad_iret: 1356 /* 1357 * We came from an IRET to user mode, so we have user gsbase. 1358 * Switch to kernel gsbase: 1359 */ 1360 SWAPGS 1361 1362 /* 1363 * Pretend that the exception came from user mode: set up pt_regs 1364 * as if we faulted immediately after IRET and clear EBX so that 1365 * error_exit knows that we will be returning to user mode. 1366 */ 1367 mov %rsp, %rdi 1368 call fixup_bad_iret 1369 mov %rax, %rsp 1370 decl %ebx 1371 jmp .Lerror_entry_from_usermode_after_swapgs 1372END(error_entry) 1373 1374 1375/* 1376 * On entry, EBX is a "return to kernel mode" flag: 1377 * 1: already in kernel mode, don't need SWAPGS 1378 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1379 */ 1380ENTRY(error_exit) 1381 UNWIND_HINT_REGS 1382 DISABLE_INTERRUPTS(CLBR_ANY) 1383 TRACE_IRQS_OFF 1384 testl %ebx, %ebx 1385 jnz retint_kernel 1386 jmp retint_user 1387END(error_exit) 1388 1389/* 1390 * Runs on exception stack. Xen PV does not go through this path at all, 1391 * so we can use real assembly here. 1392 */ 1393ENTRY(nmi) 1394 UNWIND_HINT_IRET_REGS 1395 1396 /* 1397 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1398 * the iretq it performs will take us out of NMI context. 1399 * This means that we can have nested NMIs where the next 1400 * NMI is using the top of the stack of the previous NMI. We 1401 * can't let it execute because the nested NMI will corrupt the 1402 * stack of the previous NMI. NMI handlers are not re-entrant 1403 * anyway. 1404 * 1405 * To handle this case we do the following: 1406 * Check the a special location on the stack that contains 1407 * a variable that is set when NMIs are executing. 1408 * The interrupted task's stack is also checked to see if it 1409 * is an NMI stack. 1410 * If the variable is not set and the stack is not the NMI 1411 * stack then: 1412 * o Set the special variable on the stack 1413 * o Copy the interrupt frame into an "outermost" location on the 1414 * stack 1415 * o Copy the interrupt frame into an "iret" location on the stack 1416 * o Continue processing the NMI 1417 * If the variable is set or the previous stack is the NMI stack: 1418 * o Modify the "iret" location to jump to the repeat_nmi 1419 * o return back to the first NMI 1420 * 1421 * Now on exit of the first NMI, we first clear the stack variable 1422 * The NMI stack will tell any nested NMIs at that point that it is 1423 * nested. Then we pop the stack normally with iret, and if there was 1424 * a nested NMI that updated the copy interrupt stack frame, a 1425 * jump will be made to the repeat_nmi code that will handle the second 1426 * NMI. 1427 * 1428 * However, espfix prevents us from directly returning to userspace 1429 * with a single IRET instruction. Similarly, IRET to user mode 1430 * can fault. We therefore handle NMIs from user space like 1431 * other IST entries. 1432 */ 1433 1434 ASM_CLAC 1435 1436 /* Use %rdx as our temp variable throughout */ 1437 pushq %rdx 1438 1439 testb $3, CS-RIP+8(%rsp) 1440 jz .Lnmi_from_kernel 1441 1442 /* 1443 * NMI from user mode. We need to run on the thread stack, but we 1444 * can't go through the normal entry paths: NMIs are masked, and 1445 * we don't want to enable interrupts, because then we'll end 1446 * up in an awkward situation in which IRQs are on but NMIs 1447 * are off. 1448 * 1449 * We also must not push anything to the stack before switching 1450 * stacks lest we corrupt the "NMI executing" variable. 1451 */ 1452 1453 swapgs 1454 cld 1455 movq %rsp, %rdx 1456 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1457 UNWIND_HINT_IRET_REGS base=%rdx offset=8 1458 pushq 5*8(%rdx) /* pt_regs->ss */ 1459 pushq 4*8(%rdx) /* pt_regs->rsp */ 1460 pushq 3*8(%rdx) /* pt_regs->flags */ 1461 pushq 2*8(%rdx) /* pt_regs->cs */ 1462 pushq 1*8(%rdx) /* pt_regs->rip */ 1463 UNWIND_HINT_IRET_REGS 1464 pushq $-1 /* pt_regs->orig_ax */ 1465 pushq %rdi /* pt_regs->di */ 1466 pushq %rsi /* pt_regs->si */ 1467 pushq (%rdx) /* pt_regs->dx */ 1468 pushq %rcx /* pt_regs->cx */ 1469 pushq %rax /* pt_regs->ax */ 1470 pushq %r8 /* pt_regs->r8 */ 1471 pushq %r9 /* pt_regs->r9 */ 1472 pushq %r10 /* pt_regs->r10 */ 1473 pushq %r11 /* pt_regs->r11 */ 1474 pushq %rbx /* pt_regs->rbx */ 1475 pushq %rbp /* pt_regs->rbp */ 1476 pushq %r12 /* pt_regs->r12 */ 1477 pushq %r13 /* pt_regs->r13 */ 1478 pushq %r14 /* pt_regs->r14 */ 1479 pushq %r15 /* pt_regs->r15 */ 1480 UNWIND_HINT_REGS 1481 ENCODE_FRAME_POINTER 1482 1483 /* 1484 * At this point we no longer need to worry about stack damage 1485 * due to nesting -- we're on the normal thread stack and we're 1486 * done with the NMI stack. 1487 */ 1488 1489 movq %rsp, %rdi 1490 movq $-1, %rsi 1491 call do_nmi 1492 1493 /* 1494 * Return back to user mode. We must *not* do the normal exit 1495 * work, because we don't want to enable interrupts. 1496 */ 1497 jmp swapgs_restore_regs_and_return_to_usermode 1498 1499.Lnmi_from_kernel: 1500 /* 1501 * Here's what our stack frame will look like: 1502 * +---------------------------------------------------------+ 1503 * | original SS | 1504 * | original Return RSP | 1505 * | original RFLAGS | 1506 * | original CS | 1507 * | original RIP | 1508 * +---------------------------------------------------------+ 1509 * | temp storage for rdx | 1510 * +---------------------------------------------------------+ 1511 * | "NMI executing" variable | 1512 * +---------------------------------------------------------+ 1513 * | iret SS } Copied from "outermost" frame | 1514 * | iret Return RSP } on each loop iteration; overwritten | 1515 * | iret RFLAGS } by a nested NMI to force another | 1516 * | iret CS } iteration if needed. | 1517 * | iret RIP } | 1518 * +---------------------------------------------------------+ 1519 * | outermost SS } initialized in first_nmi; | 1520 * | outermost Return RSP } will not be changed before | 1521 * | outermost RFLAGS } NMI processing is done. | 1522 * | outermost CS } Copied to "iret" frame on each | 1523 * | outermost RIP } iteration. | 1524 * +---------------------------------------------------------+ 1525 * | pt_regs | 1526 * +---------------------------------------------------------+ 1527 * 1528 * The "original" frame is used by hardware. Before re-enabling 1529 * NMIs, we need to be done with it, and we need to leave enough 1530 * space for the asm code here. 1531 * 1532 * We return by executing IRET while RSP points to the "iret" frame. 1533 * That will either return for real or it will loop back into NMI 1534 * processing. 1535 * 1536 * The "outermost" frame is copied to the "iret" frame on each 1537 * iteration of the loop, so each iteration starts with the "iret" 1538 * frame pointing to the final return target. 1539 */ 1540 1541 /* 1542 * Determine whether we're a nested NMI. 1543 * 1544 * If we interrupted kernel code between repeat_nmi and 1545 * end_repeat_nmi, then we are a nested NMI. We must not 1546 * modify the "iret" frame because it's being written by 1547 * the outer NMI. That's okay; the outer NMI handler is 1548 * about to about to call do_nmi anyway, so we can just 1549 * resume the outer NMI. 1550 */ 1551 1552 movq $repeat_nmi, %rdx 1553 cmpq 8(%rsp), %rdx 1554 ja 1f 1555 movq $end_repeat_nmi, %rdx 1556 cmpq 8(%rsp), %rdx 1557 ja nested_nmi_out 15581: 1559 1560 /* 1561 * Now check "NMI executing". If it's set, then we're nested. 1562 * This will not detect if we interrupted an outer NMI just 1563 * before IRET. 1564 */ 1565 cmpl $1, -8(%rsp) 1566 je nested_nmi 1567 1568 /* 1569 * Now test if the previous stack was an NMI stack. This covers 1570 * the case where we interrupt an outer NMI after it clears 1571 * "NMI executing" but before IRET. We need to be careful, though: 1572 * there is one case in which RSP could point to the NMI stack 1573 * despite there being no NMI active: naughty userspace controls 1574 * RSP at the very beginning of the SYSCALL targets. We can 1575 * pull a fast one on naughty userspace, though: we program 1576 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1577 * if it controls the kernel's RSP. We set DF before we clear 1578 * "NMI executing". 1579 */ 1580 lea 6*8(%rsp), %rdx 1581 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1582 cmpq %rdx, 4*8(%rsp) 1583 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1584 ja first_nmi 1585 1586 subq $EXCEPTION_STKSZ, %rdx 1587 cmpq %rdx, 4*8(%rsp) 1588 /* If it is below the NMI stack, it is a normal NMI */ 1589 jb first_nmi 1590 1591 /* Ah, it is within the NMI stack. */ 1592 1593 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1594 jz first_nmi /* RSP was user controlled. */ 1595 1596 /* This is a nested NMI. */ 1597 1598nested_nmi: 1599 /* 1600 * Modify the "iret" frame to point to repeat_nmi, forcing another 1601 * iteration of NMI handling. 1602 */ 1603 subq $8, %rsp 1604 leaq -10*8(%rsp), %rdx 1605 pushq $__KERNEL_DS 1606 pushq %rdx 1607 pushfq 1608 pushq $__KERNEL_CS 1609 pushq $repeat_nmi 1610 1611 /* Put stack back */ 1612 addq $(6*8), %rsp 1613 1614nested_nmi_out: 1615 popq %rdx 1616 1617 /* We are returning to kernel mode, so this cannot result in a fault. */ 1618 iretq 1619 1620first_nmi: 1621 /* Restore rdx. */ 1622 movq (%rsp), %rdx 1623 1624 /* Make room for "NMI executing". */ 1625 pushq $0 1626 1627 /* Leave room for the "iret" frame */ 1628 subq $(5*8), %rsp 1629 1630 /* Copy the "original" frame to the "outermost" frame */ 1631 .rept 5 1632 pushq 11*8(%rsp) 1633 .endr 1634 UNWIND_HINT_IRET_REGS 1635 1636 /* Everything up to here is safe from nested NMIs */ 1637 1638#ifdef CONFIG_DEBUG_ENTRY 1639 /* 1640 * For ease of testing, unmask NMIs right away. Disabled by 1641 * default because IRET is very expensive. 1642 */ 1643 pushq $0 /* SS */ 1644 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1645 addq $8, (%rsp) /* Fix up RSP */ 1646 pushfq /* RFLAGS */ 1647 pushq $__KERNEL_CS /* CS */ 1648 pushq $1f /* RIP */ 1649 iretq /* continues at repeat_nmi below */ 1650 UNWIND_HINT_IRET_REGS 16511: 1652#endif 1653 1654repeat_nmi: 1655 /* 1656 * If there was a nested NMI, the first NMI's iret will return 1657 * here. But NMIs are still enabled and we can take another 1658 * nested NMI. The nested NMI checks the interrupted RIP to see 1659 * if it is between repeat_nmi and end_repeat_nmi, and if so 1660 * it will just return, as we are about to repeat an NMI anyway. 1661 * This makes it safe to copy to the stack frame that a nested 1662 * NMI will update. 1663 * 1664 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1665 * we're repeating an NMI, gsbase has the same value that it had on 1666 * the first iteration. paranoid_entry will load the kernel 1667 * gsbase if needed before we call do_nmi. "NMI executing" 1668 * is zero. 1669 */ 1670 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1671 1672 /* 1673 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1674 * here must not modify the "iret" frame while we're writing to 1675 * it or it will end up containing garbage. 1676 */ 1677 addq $(10*8), %rsp 1678 .rept 5 1679 pushq -6*8(%rsp) 1680 .endr 1681 subq $(5*8), %rsp 1682end_repeat_nmi: 1683 1684 /* 1685 * Everything below this point can be preempted by a nested NMI. 1686 * If this happens, then the inner NMI will change the "iret" 1687 * frame to point back to repeat_nmi. 1688 */ 1689 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1690 ALLOC_PT_GPREGS_ON_STACK 1691 1692 /* 1693 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1694 * as we should not be calling schedule in NMI context. 1695 * Even with normal interrupts enabled. An NMI should not be 1696 * setting NEED_RESCHED or anything that normal interrupts and 1697 * exceptions might do. 1698 */ 1699 call paranoid_entry 1700 UNWIND_HINT_REGS 1701 1702 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1703 movq %rsp, %rdi 1704 movq $-1, %rsi 1705 call do_nmi 1706 1707 testl %ebx, %ebx /* swapgs needed? */ 1708 jnz nmi_restore 1709nmi_swapgs: 1710 SWAPGS_UNSAFE_STACK 1711nmi_restore: 1712 POP_EXTRA_REGS 1713 POP_C_REGS 1714 1715 /* 1716 * Skip orig_ax and the "outermost" frame to point RSP at the "iret" 1717 * at the "iret" frame. 1718 */ 1719 addq $6*8, %rsp 1720 1721 /* 1722 * Clear "NMI executing". Set DF first so that we can easily 1723 * distinguish the remaining code between here and IRET from 1724 * the SYSCALL entry and exit paths. 1725 * 1726 * We arguably should just inspect RIP instead, but I (Andy) wrote 1727 * this code when I had the misapprehension that Xen PV supported 1728 * NMIs, and Xen PV would break that approach. 1729 */ 1730 std 1731 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1732 1733 /* 1734 * iretq reads the "iret" frame and exits the NMI stack in a 1735 * single instruction. We are returning to kernel mode, so this 1736 * cannot result in a fault. Similarly, we don't need to worry 1737 * about espfix64 on the way back to kernel mode. 1738 */ 1739 iretq 1740END(nmi) 1741 1742ENTRY(ignore_sysret) 1743 UNWIND_HINT_EMPTY 1744 mov $-ENOSYS, %eax 1745 sysret 1746END(ignore_sysret) 1747 1748ENTRY(rewind_stack_do_exit) 1749 UNWIND_HINT_FUNC 1750 /* Prevent any naive code from trying to unwind to our caller. */ 1751 xorl %ebp, %ebp 1752 1753 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax 1754 leaq -PTREGS_SIZE(%rax), %rsp 1755 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE 1756 1757 call do_exit 1758END(rewind_stack_do_exit) 1759