1/* 2 * linux/arch/x86_64/entry.S 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 7 * 8 * entry.S contains the system-call and fault low-level handling routines. 9 * 10 * Some of this is documented in Documentation/x86/entry_64.txt 11 * 12 * A note on terminology: 13 * - iret frame: Architecture defined interrupt frame from SS to RIP 14 * at the top of the kernel process stack. 15 * 16 * Some macro usage: 17 * - ENTRY/END: Define functions in the symbol table. 18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 19 * - idtentry: Define exception entry points. 20 */ 21#include <linux/linkage.h> 22#include <asm/segment.h> 23#include <asm/cache.h> 24#include <asm/errno.h> 25#include "calling.h" 26#include <asm/asm-offsets.h> 27#include <asm/msr.h> 28#include <asm/unistd.h> 29#include <asm/thread_info.h> 30#include <asm/hw_irq.h> 31#include <asm/page_types.h> 32#include <asm/irqflags.h> 33#include <asm/paravirt.h> 34#include <asm/percpu.h> 35#include <asm/asm.h> 36#include <asm/smap.h> 37#include <asm/pgtable_types.h> 38#include <linux/err.h> 39 40/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ 41#include <linux/elf-em.h> 42#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) 43#define __AUDIT_ARCH_64BIT 0x80000000 44#define __AUDIT_ARCH_LE 0x40000000 45 46.code64 47.section .entry.text, "ax" 48 49#ifdef CONFIG_PARAVIRT 50ENTRY(native_usergs_sysret64) 51 swapgs 52 sysretq 53ENDPROC(native_usergs_sysret64) 54#endif /* CONFIG_PARAVIRT */ 55 56.macro TRACE_IRQS_IRETQ 57#ifdef CONFIG_TRACE_IRQFLAGS 58 bt $9, EFLAGS(%rsp) /* interrupts off? */ 59 jnc 1f 60 TRACE_IRQS_ON 611: 62#endif 63.endm 64 65/* 66 * When dynamic function tracer is enabled it will add a breakpoint 67 * to all locations that it is about to modify, sync CPUs, update 68 * all the code, sync CPUs, then remove the breakpoints. In this time 69 * if lockdep is enabled, it might jump back into the debug handler 70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 71 * 72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 73 * make sure the stack pointer does not get reset back to the top 74 * of the debug stack, and instead just reuses the current stack. 75 */ 76#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 77 78.macro TRACE_IRQS_OFF_DEBUG 79 call debug_stack_set_zero 80 TRACE_IRQS_OFF 81 call debug_stack_reset 82.endm 83 84.macro TRACE_IRQS_ON_DEBUG 85 call debug_stack_set_zero 86 TRACE_IRQS_ON 87 call debug_stack_reset 88.endm 89 90.macro TRACE_IRQS_IRETQ_DEBUG 91 bt $9, EFLAGS(%rsp) /* interrupts off? */ 92 jnc 1f 93 TRACE_IRQS_ON_DEBUG 941: 95.endm 96 97#else 98# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 99# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 100# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 101#endif 102 103/* 104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 105 * 106 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 107 * then loads new ss, cs, and rip from previously programmed MSRs. 108 * rflags gets masked by a value from another MSR (so CLD and CLAC 109 * are not needed). SYSCALL does not save anything on the stack 110 * and does not change rsp. 111 * 112 * Registers on entry: 113 * rax system call number 114 * rcx return address 115 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 116 * rdi arg0 117 * rsi arg1 118 * rdx arg2 119 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 120 * r8 arg4 121 * r9 arg5 122 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 123 * 124 * Only called from user space. 125 * 126 * When user can change pt_regs->foo always force IRET. That is because 127 * it deals with uncanonical addresses better. SYSRET has trouble 128 * with them due to bugs in both AMD and Intel CPUs. 129 */ 130 131ENTRY(entry_SYSCALL_64) 132 /* 133 * Interrupts are off on entry. 134 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 135 * it is too small to ever cause noticeable irq latency. 136 */ 137 SWAPGS_UNSAFE_STACK 138 /* 139 * A hypervisor implementation might want to use a label 140 * after the swapgs, so that it can do the swapgs 141 * for the guest and jump here on syscall. 142 */ 143GLOBAL(entry_SYSCALL_64_after_swapgs) 144 145 movq %rsp, PER_CPU_VAR(rsp_scratch) 146 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 147 148 /* Construct struct pt_regs on stack */ 149 pushq $__USER_DS /* pt_regs->ss */ 150 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 151 /* 152 * Re-enable interrupts. 153 * We use 'rsp_scratch' as a scratch space, hence irq-off block above 154 * must execute atomically in the face of possible interrupt-driven 155 * task preemption. We must enable interrupts only after we're done 156 * with using rsp_scratch: 157 */ 158 ENABLE_INTERRUPTS(CLBR_NONE) 159 pushq %r11 /* pt_regs->flags */ 160 pushq $__USER_CS /* pt_regs->cs */ 161 pushq %rcx /* pt_regs->ip */ 162 pushq %rax /* pt_regs->orig_ax */ 163 pushq %rdi /* pt_regs->di */ 164 pushq %rsi /* pt_regs->si */ 165 pushq %rdx /* pt_regs->dx */ 166 pushq %rcx /* pt_regs->cx */ 167 pushq $-ENOSYS /* pt_regs->ax */ 168 pushq %r8 /* pt_regs->r8 */ 169 pushq %r9 /* pt_regs->r9 */ 170 pushq %r10 /* pt_regs->r10 */ 171 pushq %r11 /* pt_regs->r11 */ 172 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 173 174 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 175 jnz tracesys 176entry_SYSCALL_64_fastpath: 177#if __SYSCALL_MASK == ~0 178 cmpq $__NR_syscall_max, %rax 179#else 180 andl $__SYSCALL_MASK, %eax 181 cmpl $__NR_syscall_max, %eax 182#endif 183 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 184 movq %r10, %rcx 185 call *sys_call_table(, %rax, 8) 186 movq %rax, RAX(%rsp) 1871: 188/* 189 * Syscall return path ending with SYSRET (fast path). 190 * Has incompletely filled pt_regs. 191 */ 192 LOCKDEP_SYS_EXIT 193 /* 194 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 195 * it is too small to ever cause noticeable irq latency. 196 */ 197 DISABLE_INTERRUPTS(CLBR_NONE) 198 199 /* 200 * We must check ti flags with interrupts (or at least preemption) 201 * off because we must *never* return to userspace without 202 * processing exit work that is enqueued if we're preempted here. 203 * In particular, returning to userspace with any of the one-shot 204 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is 205 * very bad. 206 */ 207 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) 208 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */ 209 210 RESTORE_C_REGS_EXCEPT_RCX_R11 211 movq RIP(%rsp), %rcx 212 movq EFLAGS(%rsp), %r11 213 movq RSP(%rsp), %rsp 214 /* 215 * 64-bit SYSRET restores rip from rcx, 216 * rflags from r11 (but RF and VM bits are forced to 0), 217 * cs and ss are loaded from MSRs. 218 * Restoration of rflags re-enables interrupts. 219 * 220 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss 221 * descriptor is not reinitialized. This means that we should 222 * avoid SYSRET with SS == NULL, which could happen if we schedule, 223 * exit the kernel, and re-enter using an interrupt vector. (All 224 * interrupt entries on x86_64 set SS to NULL.) We prevent that 225 * from happening by reloading SS in __switch_to. (Actually 226 * detecting the failure in 64-bit userspace is tricky but can be 227 * done.) 228 */ 229 USERGS_SYSRET64 230 231GLOBAL(int_ret_from_sys_call_irqs_off) 232 TRACE_IRQS_ON 233 ENABLE_INTERRUPTS(CLBR_NONE) 234 jmp int_ret_from_sys_call 235 236 /* Do syscall entry tracing */ 237tracesys: 238 movq %rsp, %rdi 239 movl $AUDIT_ARCH_X86_64, %esi 240 call syscall_trace_enter_phase1 241 test %rax, %rax 242 jnz tracesys_phase2 /* if needed, run the slow path */ 243 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */ 244 movq ORIG_RAX(%rsp), %rax 245 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */ 246 247tracesys_phase2: 248 SAVE_EXTRA_REGS 249 movq %rsp, %rdi 250 movl $AUDIT_ARCH_X86_64, %esi 251 movq %rax, %rdx 252 call syscall_trace_enter_phase2 253 254 /* 255 * Reload registers from stack in case ptrace changed them. 256 * We don't reload %rax because syscall_trace_entry_phase2() returned 257 * the value it wants us to use in the table lookup. 258 */ 259 RESTORE_C_REGS_EXCEPT_RAX 260 RESTORE_EXTRA_REGS 261#if __SYSCALL_MASK == ~0 262 cmpq $__NR_syscall_max, %rax 263#else 264 andl $__SYSCALL_MASK, %eax 265 cmpl $__NR_syscall_max, %eax 266#endif 267 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 268 movq %r10, %rcx /* fixup for C */ 269 call *sys_call_table(, %rax, 8) 270 movq %rax, RAX(%rsp) 2711: 272 /* Use IRET because user could have changed pt_regs->foo */ 273 274/* 275 * Syscall return path ending with IRET. 276 * Has correct iret frame. 277 */ 278GLOBAL(int_ret_from_sys_call) 279 SAVE_EXTRA_REGS 280 movq %rsp, %rdi 281 call syscall_return_slowpath /* returns with IRQs disabled */ 282 RESTORE_EXTRA_REGS 283 TRACE_IRQS_IRETQ /* we're about to change IF */ 284 285 /* 286 * Try to use SYSRET instead of IRET if we're returning to 287 * a completely clean 64-bit userspace context. 288 */ 289 movq RCX(%rsp), %rcx 290 movq RIP(%rsp), %r11 291 cmpq %rcx, %r11 /* RCX == RIP */ 292 jne opportunistic_sysret_failed 293 294 /* 295 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 296 * in kernel space. This essentially lets the user take over 297 * the kernel, since userspace controls RSP. 298 * 299 * If width of "canonical tail" ever becomes variable, this will need 300 * to be updated to remain correct on both old and new CPUs. 301 */ 302 .ifne __VIRTUAL_MASK_SHIFT - 47 303 .error "virtual address width changed -- SYSRET checks need update" 304 .endif 305 306 /* Change top 16 bits to be the sign-extension of 47th bit */ 307 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 308 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 309 310 /* If this changed %rcx, it was not canonical */ 311 cmpq %rcx, %r11 312 jne opportunistic_sysret_failed 313 314 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 315 jne opportunistic_sysret_failed 316 317 movq R11(%rsp), %r11 318 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 319 jne opportunistic_sysret_failed 320 321 /* 322 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET, 323 * restoring TF results in a trap from userspace immediately after 324 * SYSRET. This would cause an infinite loop whenever #DB happens 325 * with register state that satisfies the opportunistic SYSRET 326 * conditions. For example, single-stepping this user code: 327 * 328 * movq $stuck_here, %rcx 329 * pushfq 330 * popq %r11 331 * stuck_here: 332 * 333 * would never get past 'stuck_here'. 334 */ 335 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 336 jnz opportunistic_sysret_failed 337 338 /* nothing to check for RSP */ 339 340 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 341 jne opportunistic_sysret_failed 342 343 /* 344 * We win! This label is here just for ease of understanding 345 * perf profiles. Nothing jumps here. 346 */ 347syscall_return_via_sysret: 348 /* rcx and r11 are already restored (see code above) */ 349 RESTORE_C_REGS_EXCEPT_RCX_R11 350 movq RSP(%rsp), %rsp 351 USERGS_SYSRET64 352 353opportunistic_sysret_failed: 354 SWAPGS 355 jmp restore_c_regs_and_iret 356END(entry_SYSCALL_64) 357 358 359 .macro FORK_LIKE func 360ENTRY(stub_\func) 361 SAVE_EXTRA_REGS 8 362 jmp sys_\func 363END(stub_\func) 364 .endm 365 366 FORK_LIKE clone 367 FORK_LIKE fork 368 FORK_LIKE vfork 369 370ENTRY(stub_execve) 371 call sys_execve 372return_from_execve: 373 testl %eax, %eax 374 jz 1f 375 /* exec failed, can use fast SYSRET code path in this case */ 376 ret 3771: 378 /* must use IRET code path (pt_regs->cs may have changed) */ 379 addq $8, %rsp 380 ZERO_EXTRA_REGS 381 movq %rax, RAX(%rsp) 382 jmp int_ret_from_sys_call 383END(stub_execve) 384/* 385 * Remaining execve stubs are only 7 bytes long. 386 * ENTRY() often aligns to 16 bytes, which in this case has no benefits. 387 */ 388 .align 8 389GLOBAL(stub_execveat) 390 call sys_execveat 391 jmp return_from_execve 392END(stub_execveat) 393 394#if defined(CONFIG_X86_X32_ABI) 395 .align 8 396GLOBAL(stub_x32_execve) 397 call compat_sys_execve 398 jmp return_from_execve 399END(stub_x32_execve) 400 .align 8 401GLOBAL(stub_x32_execveat) 402 call compat_sys_execveat 403 jmp return_from_execve 404END(stub_x32_execveat) 405#endif 406 407/* 408 * sigreturn is special because it needs to restore all registers on return. 409 * This cannot be done with SYSRET, so use the IRET return path instead. 410 */ 411ENTRY(stub_rt_sigreturn) 412 /* 413 * SAVE_EXTRA_REGS result is not normally needed: 414 * sigreturn overwrites all pt_regs->GPREGS. 415 * But sigreturn can fail (!), and there is no easy way to detect that. 416 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error, 417 * we SAVE_EXTRA_REGS here. 418 */ 419 SAVE_EXTRA_REGS 8 420 call sys_rt_sigreturn 421return_from_stub: 422 addq $8, %rsp 423 RESTORE_EXTRA_REGS 424 movq %rax, RAX(%rsp) 425 jmp int_ret_from_sys_call 426END(stub_rt_sigreturn) 427 428#ifdef CONFIG_X86_X32_ABI 429ENTRY(stub_x32_rt_sigreturn) 430 SAVE_EXTRA_REGS 8 431 call sys32_x32_rt_sigreturn 432 jmp return_from_stub 433END(stub_x32_rt_sigreturn) 434#endif 435 436/* 437 * A newly forked process directly context switches into this address. 438 * 439 * rdi: prev task we switched from 440 */ 441ENTRY(ret_from_fork) 442 443 LOCK ; btr $TIF_FORK, TI_flags(%r8) 444 445 pushq $0x0002 446 popfq /* reset kernel eflags */ 447 448 call schedule_tail /* rdi: 'prev' task parameter */ 449 450 RESTORE_EXTRA_REGS 451 452 testb $3, CS(%rsp) /* from kernel_thread? */ 453 454 /* 455 * By the time we get here, we have no idea whether our pt_regs, 456 * ti flags, and ti status came from the 64-bit SYSCALL fast path, 457 * the slow path, or one of the 32-bit compat paths. 458 * Use IRET code path to return, since it can safely handle 459 * all of the above. 460 */ 461 jnz int_ret_from_sys_call 462 463 /* 464 * We came from kernel_thread 465 * nb: we depend on RESTORE_EXTRA_REGS above 466 */ 467 movq %rbp, %rdi 468 call *%rbx 469 movl $0, RAX(%rsp) 470 RESTORE_EXTRA_REGS 471 jmp int_ret_from_sys_call 472END(ret_from_fork) 473 474/* 475 * Build the entry stubs with some assembler magic. 476 * We pack 1 stub into every 8-byte block. 477 */ 478 .align 8 479ENTRY(irq_entries_start) 480 vector=FIRST_EXTERNAL_VECTOR 481 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 482 pushq $(~vector+0x80) /* Note: always in signed byte range */ 483 vector=vector+1 484 jmp common_interrupt 485 .align 8 486 .endr 487END(irq_entries_start) 488 489/* 490 * Interrupt entry/exit. 491 * 492 * Interrupt entry points save only callee clobbered registers in fast path. 493 * 494 * Entry runs with interrupts off. 495 */ 496 497/* 0(%rsp): ~(interrupt number) */ 498 .macro interrupt func 499 cld 500 ALLOC_PT_GPREGS_ON_STACK 501 SAVE_C_REGS 502 SAVE_EXTRA_REGS 503 504 testb $3, CS(%rsp) 505 jz 1f 506 507 /* 508 * IRQ from user mode. Switch to kernel gsbase and inform context 509 * tracking that we're in kernel mode. 510 */ 511 SWAPGS 512 513 /* 514 * We need to tell lockdep that IRQs are off. We can't do this until 515 * we fix gsbase, and we should do it before enter_from_user_mode 516 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 517 * the simplest way to handle it is to just call it twice if 518 * we enter from user mode. There's no reason to optimize this since 519 * TRACE_IRQS_OFF is a no-op if lockdep is off. 520 */ 521 TRACE_IRQS_OFF 522 523#ifdef CONFIG_CONTEXT_TRACKING 524 call enter_from_user_mode 525#endif 526 5271: 528 /* 529 * Save previous stack pointer, optionally switch to interrupt stack. 530 * irq_count is used to check if a CPU is already on an interrupt stack 531 * or not. While this is essentially redundant with preempt_count it is 532 * a little cheaper to use a separate counter in the PDA (short of 533 * moving irq_enter into assembly, which would be too much work) 534 */ 535 movq %rsp, %rdi 536 incl PER_CPU_VAR(irq_count) 537 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 538 pushq %rdi 539 /* We entered an interrupt context - irqs are off: */ 540 TRACE_IRQS_OFF 541 542 call \func /* rdi points to pt_regs */ 543 .endm 544 545 /* 546 * The interrupt stubs push (~vector+0x80) onto the stack and 547 * then jump to common_interrupt. 548 */ 549 .p2align CONFIG_X86_L1_CACHE_SHIFT 550common_interrupt: 551 ASM_CLAC 552 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 553 interrupt do_IRQ 554 /* 0(%rsp): old RSP */ 555ret_from_intr: 556 DISABLE_INTERRUPTS(CLBR_NONE) 557 TRACE_IRQS_OFF 558 decl PER_CPU_VAR(irq_count) 559 560 /* Restore saved previous stack */ 561 popq %rsp 562 563 testb $3, CS(%rsp) 564 jz retint_kernel 565 566 /* Interrupt came from user space */ 567GLOBAL(retint_user) 568 mov %rsp,%rdi 569 call prepare_exit_to_usermode 570 TRACE_IRQS_IRETQ 571 SWAPGS 572 jmp restore_regs_and_iret 573 574/* Returning to kernel space */ 575retint_kernel: 576#ifdef CONFIG_PREEMPT 577 /* Interrupts are off */ 578 /* Check if we need preemption */ 579 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 580 jnc 1f 5810: cmpl $0, PER_CPU_VAR(__preempt_count) 582 jnz 1f 583 call preempt_schedule_irq 584 jmp 0b 5851: 586#endif 587 /* 588 * The iretq could re-enable interrupts: 589 */ 590 TRACE_IRQS_IRETQ 591 592/* 593 * At this label, code paths which return to kernel and to user, 594 * which come from interrupts/exception and from syscalls, merge. 595 */ 596GLOBAL(restore_regs_and_iret) 597 RESTORE_EXTRA_REGS 598restore_c_regs_and_iret: 599 RESTORE_C_REGS 600 REMOVE_PT_GPREGS_FROM_STACK 8 601 INTERRUPT_RETURN 602 603ENTRY(native_iret) 604 /* 605 * Are we returning to a stack segment from the LDT? Note: in 606 * 64-bit mode SS:RSP on the exception stack is always valid. 607 */ 608#ifdef CONFIG_X86_ESPFIX64 609 testb $4, (SS-RIP)(%rsp) 610 jnz native_irq_return_ldt 611#endif 612 613.global native_irq_return_iret 614native_irq_return_iret: 615 /* 616 * This may fault. Non-paranoid faults on return to userspace are 617 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 618 * Double-faults due to espfix64 are handled in do_double_fault. 619 * Other faults here are fatal. 620 */ 621 iretq 622 623#ifdef CONFIG_X86_ESPFIX64 624native_irq_return_ldt: 625 pushq %rax 626 pushq %rdi 627 SWAPGS 628 movq PER_CPU_VAR(espfix_waddr), %rdi 629 movq %rax, (0*8)(%rdi) /* RAX */ 630 movq (2*8)(%rsp), %rax /* RIP */ 631 movq %rax, (1*8)(%rdi) 632 movq (3*8)(%rsp), %rax /* CS */ 633 movq %rax, (2*8)(%rdi) 634 movq (4*8)(%rsp), %rax /* RFLAGS */ 635 movq %rax, (3*8)(%rdi) 636 movq (6*8)(%rsp), %rax /* SS */ 637 movq %rax, (5*8)(%rdi) 638 movq (5*8)(%rsp), %rax /* RSP */ 639 movq %rax, (4*8)(%rdi) 640 andl $0xffff0000, %eax 641 popq %rdi 642 orq PER_CPU_VAR(espfix_stack), %rax 643 SWAPGS 644 movq %rax, %rsp 645 popq %rax 646 jmp native_irq_return_iret 647#endif 648END(common_interrupt) 649 650/* 651 * APIC interrupts. 652 */ 653.macro apicinterrupt3 num sym do_sym 654ENTRY(\sym) 655 ASM_CLAC 656 pushq $~(\num) 657.Lcommon_\sym: 658 interrupt \do_sym 659 jmp ret_from_intr 660END(\sym) 661.endm 662 663#ifdef CONFIG_TRACING 664#define trace(sym) trace_##sym 665#define smp_trace(sym) smp_trace_##sym 666 667.macro trace_apicinterrupt num sym 668apicinterrupt3 \num trace(\sym) smp_trace(\sym) 669.endm 670#else 671.macro trace_apicinterrupt num sym do_sym 672.endm 673#endif 674 675.macro apicinterrupt num sym do_sym 676apicinterrupt3 \num \sym \do_sym 677trace_apicinterrupt \num \sym 678.endm 679 680#ifdef CONFIG_SMP 681apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 682apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 683#endif 684 685#ifdef CONFIG_X86_UV 686apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 687#endif 688 689apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 690apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 691 692#ifdef CONFIG_HAVE_KVM 693apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 694apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 695#endif 696 697#ifdef CONFIG_X86_MCE_THRESHOLD 698apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 699#endif 700 701#ifdef CONFIG_X86_MCE_AMD 702apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 703#endif 704 705#ifdef CONFIG_X86_THERMAL_VECTOR 706apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 707#endif 708 709#ifdef CONFIG_SMP 710apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 711apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 712apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 713#endif 714 715apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 716apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 717 718#ifdef CONFIG_IRQ_WORK 719apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 720#endif 721 722/* 723 * Exception entry points. 724 */ 725#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) 726 727.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 728ENTRY(\sym) 729 /* Sanity check */ 730 .if \shift_ist != -1 && \paranoid == 0 731 .error "using shift_ist requires paranoid=1" 732 .endif 733 734 ASM_CLAC 735 PARAVIRT_ADJUST_EXCEPTION_FRAME 736 737 .ifeq \has_error_code 738 pushq $-1 /* ORIG_RAX: no syscall to restart */ 739 .endif 740 741 ALLOC_PT_GPREGS_ON_STACK 742 743 .if \paranoid 744 .if \paranoid == 1 745 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 746 jnz 1f 747 .endif 748 call paranoid_entry 749 .else 750 call error_entry 751 .endif 752 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 753 754 .if \paranoid 755 .if \shift_ist != -1 756 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 757 .else 758 TRACE_IRQS_OFF 759 .endif 760 .endif 761 762 movq %rsp, %rdi /* pt_regs pointer */ 763 764 .if \has_error_code 765 movq ORIG_RAX(%rsp), %rsi /* get error code */ 766 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 767 .else 768 xorl %esi, %esi /* no error code */ 769 .endif 770 771 .if \shift_ist != -1 772 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 773 .endif 774 775 call \do_sym 776 777 .if \shift_ist != -1 778 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 779 .endif 780 781 /* these procedures expect "no swapgs" flag in ebx */ 782 .if \paranoid 783 jmp paranoid_exit 784 .else 785 jmp error_exit 786 .endif 787 788 .if \paranoid == 1 789 /* 790 * Paranoid entry from userspace. Switch stacks and treat it 791 * as a normal entry. This means that paranoid handlers 792 * run in real process context if user_mode(regs). 793 */ 7941: 795 call error_entry 796 797 798 movq %rsp, %rdi /* pt_regs pointer */ 799 call sync_regs 800 movq %rax, %rsp /* switch stack */ 801 802 movq %rsp, %rdi /* pt_regs pointer */ 803 804 .if \has_error_code 805 movq ORIG_RAX(%rsp), %rsi /* get error code */ 806 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 807 .else 808 xorl %esi, %esi /* no error code */ 809 .endif 810 811 call \do_sym 812 813 jmp error_exit /* %ebx: no swapgs flag */ 814 .endif 815END(\sym) 816.endm 817 818#ifdef CONFIG_TRACING 819.macro trace_idtentry sym do_sym has_error_code:req 820idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code 821idtentry \sym \do_sym has_error_code=\has_error_code 822.endm 823#else 824.macro trace_idtentry sym do_sym has_error_code:req 825idtentry \sym \do_sym has_error_code=\has_error_code 826.endm 827#endif 828 829idtentry divide_error do_divide_error has_error_code=0 830idtentry overflow do_overflow has_error_code=0 831idtentry bounds do_bounds has_error_code=0 832idtentry invalid_op do_invalid_op has_error_code=0 833idtentry device_not_available do_device_not_available has_error_code=0 834idtentry double_fault do_double_fault has_error_code=1 paranoid=2 835idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 836idtentry invalid_TSS do_invalid_TSS has_error_code=1 837idtentry segment_not_present do_segment_not_present has_error_code=1 838idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 839idtentry coprocessor_error do_coprocessor_error has_error_code=0 840idtentry alignment_check do_alignment_check has_error_code=1 841idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 842 843 844 /* 845 * Reload gs selector with exception handling 846 * edi: new selector 847 */ 848ENTRY(native_load_gs_index) 849 pushfq 850 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 851 SWAPGS 852gs_change: 853 movl %edi, %gs 8542: mfence /* workaround */ 855 SWAPGS 856 popfq 857 ret 858END(native_load_gs_index) 859 860 _ASM_EXTABLE(gs_change, bad_gs) 861 .section .fixup, "ax" 862 /* running with kernelgs */ 863bad_gs: 864 SWAPGS /* switch back to user gs */ 865 xorl %eax, %eax 866 movl %eax, %gs 867 jmp 2b 868 .previous 869 870/* Call softirq on interrupt stack. Interrupts are off. */ 871ENTRY(do_softirq_own_stack) 872 pushq %rbp 873 mov %rsp, %rbp 874 incl PER_CPU_VAR(irq_count) 875 cmove PER_CPU_VAR(irq_stack_ptr), %rsp 876 push %rbp /* frame pointer backlink */ 877 call __do_softirq 878 leaveq 879 decl PER_CPU_VAR(irq_count) 880 ret 881END(do_softirq_own_stack) 882 883#ifdef CONFIG_XEN 884idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 885 886/* 887 * A note on the "critical region" in our callback handler. 888 * We want to avoid stacking callback handlers due to events occurring 889 * during handling of the last event. To do this, we keep events disabled 890 * until we've done all processing. HOWEVER, we must enable events before 891 * popping the stack frame (can't be done atomically) and so it would still 892 * be possible to get enough handler activations to overflow the stack. 893 * Although unlikely, bugs of that kind are hard to track down, so we'd 894 * like to avoid the possibility. 895 * So, on entry to the handler we detect whether we interrupted an 896 * existing activation in its critical region -- if so, we pop the current 897 * activation and restart the handler using the previous one. 898 */ 899ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 900 901/* 902 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 903 * see the correct pointer to the pt_regs 904 */ 905 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 90611: incl PER_CPU_VAR(irq_count) 907 movq %rsp, %rbp 908 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp 909 pushq %rbp /* frame pointer backlink */ 910 call xen_evtchn_do_upcall 911 popq %rsp 912 decl PER_CPU_VAR(irq_count) 913#ifndef CONFIG_PREEMPT 914 call xen_maybe_preempt_hcall 915#endif 916 jmp error_exit 917END(xen_do_hypervisor_callback) 918 919/* 920 * Hypervisor uses this for application faults while it executes. 921 * We get here for two reasons: 922 * 1. Fault while reloading DS, ES, FS or GS 923 * 2. Fault while executing IRET 924 * Category 1 we do not need to fix up as Xen has already reloaded all segment 925 * registers that could be reloaded and zeroed the others. 926 * Category 2 we fix up by killing the current process. We cannot use the 927 * normal Linux return path in this case because if we use the IRET hypercall 928 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 929 * We distinguish between categories by comparing each saved segment register 930 * with its current contents: any discrepancy means we in category 1. 931 */ 932ENTRY(xen_failsafe_callback) 933 movl %ds, %ecx 934 cmpw %cx, 0x10(%rsp) 935 jne 1f 936 movl %es, %ecx 937 cmpw %cx, 0x18(%rsp) 938 jne 1f 939 movl %fs, %ecx 940 cmpw %cx, 0x20(%rsp) 941 jne 1f 942 movl %gs, %ecx 943 cmpw %cx, 0x28(%rsp) 944 jne 1f 945 /* All segments match their saved values => Category 2 (Bad IRET). */ 946 movq (%rsp), %rcx 947 movq 8(%rsp), %r11 948 addq $0x30, %rsp 949 pushq $0 /* RIP */ 950 pushq %r11 951 pushq %rcx 952 jmp general_protection 9531: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 954 movq (%rsp), %rcx 955 movq 8(%rsp), %r11 956 addq $0x30, %rsp 957 pushq $-1 /* orig_ax = -1 => not a system call */ 958 ALLOC_PT_GPREGS_ON_STACK 959 SAVE_C_REGS 960 SAVE_EXTRA_REGS 961 jmp error_exit 962END(xen_failsafe_callback) 963 964apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 965 xen_hvm_callback_vector xen_evtchn_do_upcall 966 967#endif /* CONFIG_XEN */ 968 969#if IS_ENABLED(CONFIG_HYPERV) 970apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 971 hyperv_callback_vector hyperv_vector_handler 972#endif /* CONFIG_HYPERV */ 973 974idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 975idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 976idtentry stack_segment do_stack_segment has_error_code=1 977 978#ifdef CONFIG_XEN 979idtentry xen_debug do_debug has_error_code=0 980idtentry xen_int3 do_int3 has_error_code=0 981idtentry xen_stack_segment do_stack_segment has_error_code=1 982#endif 983 984idtentry general_protection do_general_protection has_error_code=1 985trace_idtentry page_fault do_page_fault has_error_code=1 986 987#ifdef CONFIG_KVM_GUEST 988idtentry async_page_fault do_async_page_fault has_error_code=1 989#endif 990 991#ifdef CONFIG_X86_MCE 992idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 993#endif 994 995/* 996 * Save all registers in pt_regs, and switch gs if needed. 997 * Use slow, but surefire "are we in kernel?" check. 998 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 999 */ 1000ENTRY(paranoid_entry) 1001 cld 1002 SAVE_C_REGS 8 1003 SAVE_EXTRA_REGS 8 1004 movl $1, %ebx 1005 movl $MSR_GS_BASE, %ecx 1006 rdmsr 1007 testl %edx, %edx 1008 js 1f /* negative -> in kernel */ 1009 SWAPGS 1010 xorl %ebx, %ebx 10111: ret 1012END(paranoid_entry) 1013 1014/* 1015 * "Paranoid" exit path from exception stack. This is invoked 1016 * only on return from non-NMI IST interrupts that came 1017 * from kernel space. 1018 * 1019 * We may be returning to very strange contexts (e.g. very early 1020 * in syscall entry), so checking for preemption here would 1021 * be complicated. Fortunately, we there's no good reason 1022 * to try to handle preemption here. 1023 * 1024 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1025 */ 1026ENTRY(paranoid_exit) 1027 DISABLE_INTERRUPTS(CLBR_NONE) 1028 TRACE_IRQS_OFF_DEBUG 1029 testl %ebx, %ebx /* swapgs needed? */ 1030 jnz paranoid_exit_no_swapgs 1031 TRACE_IRQS_IRETQ 1032 SWAPGS_UNSAFE_STACK 1033 jmp paranoid_exit_restore 1034paranoid_exit_no_swapgs: 1035 TRACE_IRQS_IRETQ_DEBUG 1036paranoid_exit_restore: 1037 RESTORE_EXTRA_REGS 1038 RESTORE_C_REGS 1039 REMOVE_PT_GPREGS_FROM_STACK 8 1040 INTERRUPT_RETURN 1041END(paranoid_exit) 1042 1043/* 1044 * Save all registers in pt_regs, and switch gs if needed. 1045 * Return: EBX=0: came from user mode; EBX=1: otherwise 1046 */ 1047ENTRY(error_entry) 1048 cld 1049 SAVE_C_REGS 8 1050 SAVE_EXTRA_REGS 8 1051 xorl %ebx, %ebx 1052 testb $3, CS+8(%rsp) 1053 jz .Lerror_kernelspace 1054 1055.Lerror_entry_from_usermode_swapgs: 1056 /* 1057 * We entered from user mode or we're pretending to have entered 1058 * from user mode due to an IRET fault. 1059 */ 1060 SWAPGS 1061 1062.Lerror_entry_from_usermode_after_swapgs: 1063 /* 1064 * We need to tell lockdep that IRQs are off. We can't do this until 1065 * we fix gsbase, and we should do it before enter_from_user_mode 1066 * (which can take locks). 1067 */ 1068 TRACE_IRQS_OFF 1069#ifdef CONFIG_CONTEXT_TRACKING 1070 call enter_from_user_mode 1071#endif 1072 ret 1073 1074.Lerror_entry_done: 1075 TRACE_IRQS_OFF 1076 ret 1077 1078 /* 1079 * There are two places in the kernel that can potentially fault with 1080 * usergs. Handle them here. B stepping K8s sometimes report a 1081 * truncated RIP for IRET exceptions returning to compat mode. Check 1082 * for these here too. 1083 */ 1084.Lerror_kernelspace: 1085 incl %ebx 1086 leaq native_irq_return_iret(%rip), %rcx 1087 cmpq %rcx, RIP+8(%rsp) 1088 je .Lerror_bad_iret 1089 movl %ecx, %eax /* zero extend */ 1090 cmpq %rax, RIP+8(%rsp) 1091 je .Lbstep_iret 1092 cmpq $gs_change, RIP+8(%rsp) 1093 jne .Lerror_entry_done 1094 1095 /* 1096 * hack: gs_change can fail with user gsbase. If this happens, fix up 1097 * gsbase and proceed. We'll fix up the exception and land in 1098 * gs_change's error handler with kernel gsbase. 1099 */ 1100 jmp .Lerror_entry_from_usermode_swapgs 1101 1102.Lbstep_iret: 1103 /* Fix truncated RIP */ 1104 movq %rcx, RIP+8(%rsp) 1105 /* fall through */ 1106 1107.Lerror_bad_iret: 1108 /* 1109 * We came from an IRET to user mode, so we have user gsbase. 1110 * Switch to kernel gsbase: 1111 */ 1112 SWAPGS 1113 1114 /* 1115 * Pretend that the exception came from user mode: set up pt_regs 1116 * as if we faulted immediately after IRET and clear EBX so that 1117 * error_exit knows that we will be returning to user mode. 1118 */ 1119 mov %rsp, %rdi 1120 call fixup_bad_iret 1121 mov %rax, %rsp 1122 decl %ebx 1123 jmp .Lerror_entry_from_usermode_after_swapgs 1124END(error_entry) 1125 1126 1127/* 1128 * On entry, EBS is a "return to kernel mode" flag: 1129 * 1: already in kernel mode, don't need SWAPGS 1130 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1131 */ 1132ENTRY(error_exit) 1133 movl %ebx, %eax 1134 DISABLE_INTERRUPTS(CLBR_NONE) 1135 TRACE_IRQS_OFF 1136 testl %eax, %eax 1137 jnz retint_kernel 1138 jmp retint_user 1139END(error_exit) 1140 1141/* Runs on exception stack */ 1142ENTRY(nmi) 1143 /* 1144 * Fix up the exception frame if we're on Xen. 1145 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most 1146 * one value to the stack on native, so it may clobber the rdx 1147 * scratch slot, but it won't clobber any of the important 1148 * slots past it. 1149 * 1150 * Xen is a different story, because the Xen frame itself overlaps 1151 * the "NMI executing" variable. 1152 */ 1153 PARAVIRT_ADJUST_EXCEPTION_FRAME 1154 1155 /* 1156 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1157 * the iretq it performs will take us out of NMI context. 1158 * This means that we can have nested NMIs where the next 1159 * NMI is using the top of the stack of the previous NMI. We 1160 * can't let it execute because the nested NMI will corrupt the 1161 * stack of the previous NMI. NMI handlers are not re-entrant 1162 * anyway. 1163 * 1164 * To handle this case we do the following: 1165 * Check the a special location on the stack that contains 1166 * a variable that is set when NMIs are executing. 1167 * The interrupted task's stack is also checked to see if it 1168 * is an NMI stack. 1169 * If the variable is not set and the stack is not the NMI 1170 * stack then: 1171 * o Set the special variable on the stack 1172 * o Copy the interrupt frame into an "outermost" location on the 1173 * stack 1174 * o Copy the interrupt frame into an "iret" location on the stack 1175 * o Continue processing the NMI 1176 * If the variable is set or the previous stack is the NMI stack: 1177 * o Modify the "iret" location to jump to the repeat_nmi 1178 * o return back to the first NMI 1179 * 1180 * Now on exit of the first NMI, we first clear the stack variable 1181 * The NMI stack will tell any nested NMIs at that point that it is 1182 * nested. Then we pop the stack normally with iret, and if there was 1183 * a nested NMI that updated the copy interrupt stack frame, a 1184 * jump will be made to the repeat_nmi code that will handle the second 1185 * NMI. 1186 * 1187 * However, espfix prevents us from directly returning to userspace 1188 * with a single IRET instruction. Similarly, IRET to user mode 1189 * can fault. We therefore handle NMIs from user space like 1190 * other IST entries. 1191 */ 1192 1193 /* Use %rdx as our temp variable throughout */ 1194 pushq %rdx 1195 1196 testb $3, CS-RIP+8(%rsp) 1197 jz .Lnmi_from_kernel 1198 1199 /* 1200 * NMI from user mode. We need to run on the thread stack, but we 1201 * can't go through the normal entry paths: NMIs are masked, and 1202 * we don't want to enable interrupts, because then we'll end 1203 * up in an awkward situation in which IRQs are on but NMIs 1204 * are off. 1205 * 1206 * We also must not push anything to the stack before switching 1207 * stacks lest we corrupt the "NMI executing" variable. 1208 */ 1209 1210 SWAPGS_UNSAFE_STACK 1211 cld 1212 movq %rsp, %rdx 1213 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1214 pushq 5*8(%rdx) /* pt_regs->ss */ 1215 pushq 4*8(%rdx) /* pt_regs->rsp */ 1216 pushq 3*8(%rdx) /* pt_regs->flags */ 1217 pushq 2*8(%rdx) /* pt_regs->cs */ 1218 pushq 1*8(%rdx) /* pt_regs->rip */ 1219 pushq $-1 /* pt_regs->orig_ax */ 1220 pushq %rdi /* pt_regs->di */ 1221 pushq %rsi /* pt_regs->si */ 1222 pushq (%rdx) /* pt_regs->dx */ 1223 pushq %rcx /* pt_regs->cx */ 1224 pushq %rax /* pt_regs->ax */ 1225 pushq %r8 /* pt_regs->r8 */ 1226 pushq %r9 /* pt_regs->r9 */ 1227 pushq %r10 /* pt_regs->r10 */ 1228 pushq %r11 /* pt_regs->r11 */ 1229 pushq %rbx /* pt_regs->rbx */ 1230 pushq %rbp /* pt_regs->rbp */ 1231 pushq %r12 /* pt_regs->r12 */ 1232 pushq %r13 /* pt_regs->r13 */ 1233 pushq %r14 /* pt_regs->r14 */ 1234 pushq %r15 /* pt_regs->r15 */ 1235 1236 /* 1237 * At this point we no longer need to worry about stack damage 1238 * due to nesting -- we're on the normal thread stack and we're 1239 * done with the NMI stack. 1240 */ 1241 1242 movq %rsp, %rdi 1243 movq $-1, %rsi 1244 call do_nmi 1245 1246 /* 1247 * Return back to user mode. We must *not* do the normal exit 1248 * work, because we don't want to enable interrupts. Fortunately, 1249 * do_nmi doesn't modify pt_regs. 1250 */ 1251 SWAPGS 1252 jmp restore_c_regs_and_iret 1253 1254.Lnmi_from_kernel: 1255 /* 1256 * Here's what our stack frame will look like: 1257 * +---------------------------------------------------------+ 1258 * | original SS | 1259 * | original Return RSP | 1260 * | original RFLAGS | 1261 * | original CS | 1262 * | original RIP | 1263 * +---------------------------------------------------------+ 1264 * | temp storage for rdx | 1265 * +---------------------------------------------------------+ 1266 * | "NMI executing" variable | 1267 * +---------------------------------------------------------+ 1268 * | iret SS } Copied from "outermost" frame | 1269 * | iret Return RSP } on each loop iteration; overwritten | 1270 * | iret RFLAGS } by a nested NMI to force another | 1271 * | iret CS } iteration if needed. | 1272 * | iret RIP } | 1273 * +---------------------------------------------------------+ 1274 * | outermost SS } initialized in first_nmi; | 1275 * | outermost Return RSP } will not be changed before | 1276 * | outermost RFLAGS } NMI processing is done. | 1277 * | outermost CS } Copied to "iret" frame on each | 1278 * | outermost RIP } iteration. | 1279 * +---------------------------------------------------------+ 1280 * | pt_regs | 1281 * +---------------------------------------------------------+ 1282 * 1283 * The "original" frame is used by hardware. Before re-enabling 1284 * NMIs, we need to be done with it, and we need to leave enough 1285 * space for the asm code here. 1286 * 1287 * We return by executing IRET while RSP points to the "iret" frame. 1288 * That will either return for real or it will loop back into NMI 1289 * processing. 1290 * 1291 * The "outermost" frame is copied to the "iret" frame on each 1292 * iteration of the loop, so each iteration starts with the "iret" 1293 * frame pointing to the final return target. 1294 */ 1295 1296 /* 1297 * Determine whether we're a nested NMI. 1298 * 1299 * If we interrupted kernel code between repeat_nmi and 1300 * end_repeat_nmi, then we are a nested NMI. We must not 1301 * modify the "iret" frame because it's being written by 1302 * the outer NMI. That's okay; the outer NMI handler is 1303 * about to about to call do_nmi anyway, so we can just 1304 * resume the outer NMI. 1305 */ 1306 1307 movq $repeat_nmi, %rdx 1308 cmpq 8(%rsp), %rdx 1309 ja 1f 1310 movq $end_repeat_nmi, %rdx 1311 cmpq 8(%rsp), %rdx 1312 ja nested_nmi_out 13131: 1314 1315 /* 1316 * Now check "NMI executing". If it's set, then we're nested. 1317 * This will not detect if we interrupted an outer NMI just 1318 * before IRET. 1319 */ 1320 cmpl $1, -8(%rsp) 1321 je nested_nmi 1322 1323 /* 1324 * Now test if the previous stack was an NMI stack. This covers 1325 * the case where we interrupt an outer NMI after it clears 1326 * "NMI executing" but before IRET. We need to be careful, though: 1327 * there is one case in which RSP could point to the NMI stack 1328 * despite there being no NMI active: naughty userspace controls 1329 * RSP at the very beginning of the SYSCALL targets. We can 1330 * pull a fast one on naughty userspace, though: we program 1331 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1332 * if it controls the kernel's RSP. We set DF before we clear 1333 * "NMI executing". 1334 */ 1335 lea 6*8(%rsp), %rdx 1336 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1337 cmpq %rdx, 4*8(%rsp) 1338 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1339 ja first_nmi 1340 1341 subq $EXCEPTION_STKSZ, %rdx 1342 cmpq %rdx, 4*8(%rsp) 1343 /* If it is below the NMI stack, it is a normal NMI */ 1344 jb first_nmi 1345 1346 /* Ah, it is within the NMI stack. */ 1347 1348 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1349 jz first_nmi /* RSP was user controlled. */ 1350 1351 /* This is a nested NMI. */ 1352 1353nested_nmi: 1354 /* 1355 * Modify the "iret" frame to point to repeat_nmi, forcing another 1356 * iteration of NMI handling. 1357 */ 1358 subq $8, %rsp 1359 leaq -10*8(%rsp), %rdx 1360 pushq $__KERNEL_DS 1361 pushq %rdx 1362 pushfq 1363 pushq $__KERNEL_CS 1364 pushq $repeat_nmi 1365 1366 /* Put stack back */ 1367 addq $(6*8), %rsp 1368 1369nested_nmi_out: 1370 popq %rdx 1371 1372 /* We are returning to kernel mode, so this cannot result in a fault. */ 1373 INTERRUPT_RETURN 1374 1375first_nmi: 1376 /* Restore rdx. */ 1377 movq (%rsp), %rdx 1378 1379 /* Make room for "NMI executing". */ 1380 pushq $0 1381 1382 /* Leave room for the "iret" frame */ 1383 subq $(5*8), %rsp 1384 1385 /* Copy the "original" frame to the "outermost" frame */ 1386 .rept 5 1387 pushq 11*8(%rsp) 1388 .endr 1389 1390 /* Everything up to here is safe from nested NMIs */ 1391 1392#ifdef CONFIG_DEBUG_ENTRY 1393 /* 1394 * For ease of testing, unmask NMIs right away. Disabled by 1395 * default because IRET is very expensive. 1396 */ 1397 pushq $0 /* SS */ 1398 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1399 addq $8, (%rsp) /* Fix up RSP */ 1400 pushfq /* RFLAGS */ 1401 pushq $__KERNEL_CS /* CS */ 1402 pushq $1f /* RIP */ 1403 INTERRUPT_RETURN /* continues at repeat_nmi below */ 14041: 1405#endif 1406 1407repeat_nmi: 1408 /* 1409 * If there was a nested NMI, the first NMI's iret will return 1410 * here. But NMIs are still enabled and we can take another 1411 * nested NMI. The nested NMI checks the interrupted RIP to see 1412 * if it is between repeat_nmi and end_repeat_nmi, and if so 1413 * it will just return, as we are about to repeat an NMI anyway. 1414 * This makes it safe to copy to the stack frame that a nested 1415 * NMI will update. 1416 * 1417 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1418 * we're repeating an NMI, gsbase has the same value that it had on 1419 * the first iteration. paranoid_entry will load the kernel 1420 * gsbase if needed before we call do_nmi. "NMI executing" 1421 * is zero. 1422 */ 1423 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1424 1425 /* 1426 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1427 * here must not modify the "iret" frame while we're writing to 1428 * it or it will end up containing garbage. 1429 */ 1430 addq $(10*8), %rsp 1431 .rept 5 1432 pushq -6*8(%rsp) 1433 .endr 1434 subq $(5*8), %rsp 1435end_repeat_nmi: 1436 1437 /* 1438 * Everything below this point can be preempted by a nested NMI. 1439 * If this happens, then the inner NMI will change the "iret" 1440 * frame to point back to repeat_nmi. 1441 */ 1442 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1443 ALLOC_PT_GPREGS_ON_STACK 1444 1445 /* 1446 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1447 * as we should not be calling schedule in NMI context. 1448 * Even with normal interrupts enabled. An NMI should not be 1449 * setting NEED_RESCHED or anything that normal interrupts and 1450 * exceptions might do. 1451 */ 1452 call paranoid_entry 1453 1454 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1455 movq %rsp, %rdi 1456 movq $-1, %rsi 1457 call do_nmi 1458 1459 testl %ebx, %ebx /* swapgs needed? */ 1460 jnz nmi_restore 1461nmi_swapgs: 1462 SWAPGS_UNSAFE_STACK 1463nmi_restore: 1464 RESTORE_EXTRA_REGS 1465 RESTORE_C_REGS 1466 1467 /* Point RSP at the "iret" frame. */ 1468 REMOVE_PT_GPREGS_FROM_STACK 6*8 1469 1470 /* 1471 * Clear "NMI executing". Set DF first so that we can easily 1472 * distinguish the remaining code between here and IRET from 1473 * the SYSCALL entry and exit paths. On a native kernel, we 1474 * could just inspect RIP, but, on paravirt kernels, 1475 * INTERRUPT_RETURN can translate into a jump into a 1476 * hypercall page. 1477 */ 1478 std 1479 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1480 1481 /* 1482 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI 1483 * stack in a single instruction. We are returning to kernel 1484 * mode, so this cannot result in a fault. 1485 */ 1486 INTERRUPT_RETURN 1487END(nmi) 1488 1489ENTRY(ignore_sysret) 1490 mov $-ENOSYS, %eax 1491 sysret 1492END(ignore_sysret) 1493