1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86_64/entry.S 4 * 5 * Copyright (C) 1991, 1992 Linus Torvalds 6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 8 * 9 * entry.S contains the system-call and fault low-level handling routines. 10 * 11 * Some of this is documented in Documentation/x86/entry_64.txt 12 * 13 * A note on terminology: 14 * - iret frame: Architecture defined interrupt frame from SS to RIP 15 * at the top of the kernel process stack. 16 * 17 * Some macro usage: 18 * - ENTRY/END: Define functions in the symbol table. 19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 20 * - idtentry: Define exception entry points. 21 */ 22#include <linux/linkage.h> 23#include <asm/segment.h> 24#include <asm/cache.h> 25#include <asm/errno.h> 26#include <asm/asm-offsets.h> 27#include <asm/msr.h> 28#include <asm/unistd.h> 29#include <asm/thread_info.h> 30#include <asm/hw_irq.h> 31#include <asm/page_types.h> 32#include <asm/irqflags.h> 33#include <asm/paravirt.h> 34#include <asm/percpu.h> 35#include <asm/asm.h> 36#include <asm/smap.h> 37#include <asm/pgtable_types.h> 38#include <asm/export.h> 39#include <asm/frame.h> 40#include <linux/err.h> 41 42#include "calling.h" 43 44.code64 45.section .entry.text, "ax" 46 47#ifdef CONFIG_PARAVIRT 48ENTRY(native_usergs_sysret64) 49 UNWIND_HINT_EMPTY 50 swapgs 51 sysretq 52END(native_usergs_sysret64) 53#endif /* CONFIG_PARAVIRT */ 54 55.macro TRACE_IRQS_FLAGS flags:req 56#ifdef CONFIG_TRACE_IRQFLAGS 57 bt $9, \flags /* interrupts off? */ 58 jnc 1f 59 TRACE_IRQS_ON 601: 61#endif 62.endm 63 64.macro TRACE_IRQS_IRETQ 65 TRACE_IRQS_FLAGS EFLAGS(%rsp) 66.endm 67 68/* 69 * When dynamic function tracer is enabled it will add a breakpoint 70 * to all locations that it is about to modify, sync CPUs, update 71 * all the code, sync CPUs, then remove the breakpoints. In this time 72 * if lockdep is enabled, it might jump back into the debug handler 73 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 74 * 75 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 76 * make sure the stack pointer does not get reset back to the top 77 * of the debug stack, and instead just reuses the current stack. 78 */ 79#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 80 81.macro TRACE_IRQS_OFF_DEBUG 82 call debug_stack_set_zero 83 TRACE_IRQS_OFF 84 call debug_stack_reset 85.endm 86 87.macro TRACE_IRQS_ON_DEBUG 88 call debug_stack_set_zero 89 TRACE_IRQS_ON 90 call debug_stack_reset 91.endm 92 93.macro TRACE_IRQS_IRETQ_DEBUG 94 bt $9, EFLAGS(%rsp) /* interrupts off? */ 95 jnc 1f 96 TRACE_IRQS_ON_DEBUG 971: 98.endm 99 100#else 101# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 102# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 103# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 104#endif 105 106/* 107 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 108 * 109 * This is the only entry point used for 64-bit system calls. The 110 * hardware interface is reasonably well designed and the register to 111 * argument mapping Linux uses fits well with the registers that are 112 * available when SYSCALL is used. 113 * 114 * SYSCALL instructions can be found inlined in libc implementations as 115 * well as some other programs and libraries. There are also a handful 116 * of SYSCALL instructions in the vDSO used, for example, as a 117 * clock_gettimeofday fallback. 118 * 119 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 120 * then loads new ss, cs, and rip from previously programmed MSRs. 121 * rflags gets masked by a value from another MSR (so CLD and CLAC 122 * are not needed). SYSCALL does not save anything on the stack 123 * and does not change rsp. 124 * 125 * Registers on entry: 126 * rax system call number 127 * rcx return address 128 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 129 * rdi arg0 130 * rsi arg1 131 * rdx arg2 132 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 133 * r8 arg4 134 * r9 arg5 135 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 136 * 137 * Only called from user space. 138 * 139 * When user can change pt_regs->foo always force IRET. That is because 140 * it deals with uncanonical addresses better. SYSRET has trouble 141 * with them due to bugs in both AMD and Intel CPUs. 142 */ 143 144 .pushsection .entry_trampoline, "ax" 145 146/* 147 * The code in here gets remapped into cpu_entry_area's trampoline. This means 148 * that the assembler and linker have the wrong idea as to where this code 149 * lives (and, in fact, it's mapped more than once, so it's not even at a 150 * fixed address). So we can't reference any symbols outside the entry 151 * trampoline and expect it to work. 152 * 153 * Instead, we carefully abuse %rip-relative addressing. 154 * _entry_trampoline(%rip) refers to the start of the remapped) entry 155 * trampoline. We can thus find cpu_entry_area with this macro: 156 */ 157 158#define CPU_ENTRY_AREA \ 159 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip) 160 161/* The top word of the SYSENTER stack is hot and is usable as scratch space. */ 162#define RSP_SCRATCH CPU_ENTRY_AREA_entry_stack + \ 163 SIZEOF_entry_stack - 8 + CPU_ENTRY_AREA 164 165ENTRY(entry_SYSCALL_64_trampoline) 166 UNWIND_HINT_EMPTY 167 swapgs 168 169 /* Stash the user RSP. */ 170 movq %rsp, RSP_SCRATCH 171 172 /* Note: using %rsp as a scratch reg. */ 173 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp 174 175 /* Load the top of the task stack into RSP */ 176 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp 177 178 /* Start building the simulated IRET frame. */ 179 pushq $__USER_DS /* pt_regs->ss */ 180 pushq RSP_SCRATCH /* pt_regs->sp */ 181 pushq %r11 /* pt_regs->flags */ 182 pushq $__USER_CS /* pt_regs->cs */ 183 pushq %rcx /* pt_regs->ip */ 184 185 /* 186 * x86 lacks a near absolute jump, and we can't jump to the real 187 * entry text with a relative jump. We could push the target 188 * address and then use retq, but this destroys the pipeline on 189 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead, 190 * spill RDI and restore it in a second-stage trampoline. 191 */ 192 pushq %rdi 193 movq $entry_SYSCALL_64_stage2, %rdi 194 jmp *%rdi 195END(entry_SYSCALL_64_trampoline) 196 197 .popsection 198 199ENTRY(entry_SYSCALL_64_stage2) 200 UNWIND_HINT_EMPTY 201 popq %rdi 202 jmp entry_SYSCALL_64_after_hwframe 203END(entry_SYSCALL_64_stage2) 204 205ENTRY(entry_SYSCALL_64) 206 UNWIND_HINT_EMPTY 207 /* 208 * Interrupts are off on entry. 209 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 210 * it is too small to ever cause noticeable irq latency. 211 */ 212 213 swapgs 214 /* 215 * This path is not taken when PAGE_TABLE_ISOLATION is disabled so it 216 * is not required to switch CR3. 217 */ 218 movq %rsp, PER_CPU_VAR(rsp_scratch) 219 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 220 221 /* Construct struct pt_regs on stack */ 222 pushq $__USER_DS /* pt_regs->ss */ 223 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 224 pushq %r11 /* pt_regs->flags */ 225 pushq $__USER_CS /* pt_regs->cs */ 226 pushq %rcx /* pt_regs->ip */ 227GLOBAL(entry_SYSCALL_64_after_hwframe) 228 pushq %rax /* pt_regs->orig_ax */ 229 pushq %rdi /* pt_regs->di */ 230 pushq %rsi /* pt_regs->si */ 231 pushq %rdx /* pt_regs->dx */ 232 pushq %rcx /* pt_regs->cx */ 233 pushq $-ENOSYS /* pt_regs->ax */ 234 pushq %r8 /* pt_regs->r8 */ 235 pushq %r9 /* pt_regs->r9 */ 236 pushq %r10 /* pt_regs->r10 */ 237 pushq %r11 /* pt_regs->r11 */ 238 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 239 UNWIND_HINT_REGS extra=0 240 241 TRACE_IRQS_OFF 242 243 /* 244 * If we need to do entry work or if we guess we'll need to do 245 * exit work, go straight to the slow path. 246 */ 247 movq PER_CPU_VAR(current_task), %r11 248 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 249 jnz entry_SYSCALL64_slow_path 250 251entry_SYSCALL_64_fastpath: 252 /* 253 * Easy case: enable interrupts and issue the syscall. If the syscall 254 * needs pt_regs, we'll call a stub that disables interrupts again 255 * and jumps to the slow path. 256 */ 257 TRACE_IRQS_ON 258 ENABLE_INTERRUPTS(CLBR_NONE) 259#if __SYSCALL_MASK == ~0 260 cmpq $__NR_syscall_max, %rax 261#else 262 andl $__SYSCALL_MASK, %eax 263 cmpl $__NR_syscall_max, %eax 264#endif 265 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 266 movq %r10, %rcx 267 268 /* 269 * This call instruction is handled specially in stub_ptregs_64. 270 * It might end up jumping to the slow path. If it jumps, RAX 271 * and all argument registers are clobbered. 272 */ 273 call *sys_call_table(, %rax, 8) 274.Lentry_SYSCALL_64_after_fastpath_call: 275 276 movq %rax, RAX(%rsp) 2771: 278 279 /* 280 * If we get here, then we know that pt_regs is clean for SYSRET64. 281 * If we see that no exit work is required (which we are required 282 * to check with IRQs off), then we can go straight to SYSRET64. 283 */ 284 DISABLE_INTERRUPTS(CLBR_ANY) 285 TRACE_IRQS_OFF 286 movq PER_CPU_VAR(current_task), %r11 287 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 288 jnz 1f 289 290 LOCKDEP_SYS_EXIT 291 TRACE_IRQS_ON /* user mode is traced as IRQs on */ 292 movq RIP(%rsp), %rcx 293 movq EFLAGS(%rsp), %r11 294 addq $6*8, %rsp /* skip extra regs -- they were preserved */ 295 UNWIND_HINT_EMPTY 296 jmp .Lpop_c_regs_except_rcx_r11_and_sysret 297 2981: 299 /* 300 * The fast path looked good when we started, but something changed 301 * along the way and we need to switch to the slow path. Calling 302 * raise(3) will trigger this, for example. IRQs are off. 303 */ 304 TRACE_IRQS_ON 305 ENABLE_INTERRUPTS(CLBR_ANY) 306 SAVE_EXTRA_REGS 307 movq %rsp, %rdi 308 call syscall_return_slowpath /* returns with IRQs disabled */ 309 jmp return_from_SYSCALL_64 310 311entry_SYSCALL64_slow_path: 312 /* IRQs are off. */ 313 SAVE_EXTRA_REGS 314 movq %rsp, %rdi 315 call do_syscall_64 /* returns with IRQs disabled */ 316 317return_from_SYSCALL_64: 318 TRACE_IRQS_IRETQ /* we're about to change IF */ 319 320 /* 321 * Try to use SYSRET instead of IRET if we're returning to 322 * a completely clean 64-bit userspace context. If we're not, 323 * go to the slow exit path. 324 */ 325 movq RCX(%rsp), %rcx 326 movq RIP(%rsp), %r11 327 328 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */ 329 jne swapgs_restore_regs_and_return_to_usermode 330 331 /* 332 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 333 * in kernel space. This essentially lets the user take over 334 * the kernel, since userspace controls RSP. 335 * 336 * If width of "canonical tail" ever becomes variable, this will need 337 * to be updated to remain correct on both old and new CPUs. 338 * 339 * Change top bits to match most significant bit (47th or 56th bit 340 * depending on paging mode) in the address. 341 */ 342 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 343 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 344 345 /* If this changed %rcx, it was not canonical */ 346 cmpq %rcx, %r11 347 jne swapgs_restore_regs_and_return_to_usermode 348 349 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 350 jne swapgs_restore_regs_and_return_to_usermode 351 352 movq R11(%rsp), %r11 353 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 354 jne swapgs_restore_regs_and_return_to_usermode 355 356 /* 357 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot 358 * restore RF properly. If the slowpath sets it for whatever reason, we 359 * need to restore it correctly. 360 * 361 * SYSRET can restore TF, but unlike IRET, restoring TF results in a 362 * trap from userspace immediately after SYSRET. This would cause an 363 * infinite loop whenever #DB happens with register state that satisfies 364 * the opportunistic SYSRET conditions. For example, single-stepping 365 * this user code: 366 * 367 * movq $stuck_here, %rcx 368 * pushfq 369 * popq %r11 370 * stuck_here: 371 * 372 * would never get past 'stuck_here'. 373 */ 374 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 375 jnz swapgs_restore_regs_and_return_to_usermode 376 377 /* nothing to check for RSP */ 378 379 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 380 jne swapgs_restore_regs_and_return_to_usermode 381 382 /* 383 * We win! This label is here just for ease of understanding 384 * perf profiles. Nothing jumps here. 385 */ 386syscall_return_via_sysret: 387 /* rcx and r11 are already restored (see code above) */ 388 UNWIND_HINT_EMPTY 389 POP_EXTRA_REGS 390.Lpop_c_regs_except_rcx_r11_and_sysret: 391 popq %rsi /* skip r11 */ 392 popq %r10 393 popq %r9 394 popq %r8 395 popq %rax 396 popq %rsi /* skip rcx */ 397 popq %rdx 398 popq %rsi 399 400 /* 401 * Now all regs are restored except RSP and RDI. 402 * Save old stack pointer and switch to trampoline stack. 403 */ 404 movq %rsp, %rdi 405 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp 406 407 pushq RSP-RDI(%rdi) /* RSP */ 408 pushq (%rdi) /* RDI */ 409 410 /* 411 * We are on the trampoline stack. All regs except RDI are live. 412 * We can do future final exit work right here. 413 */ 414 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi 415 416 popq %rdi 417 popq %rsp 418 USERGS_SYSRET64 419END(entry_SYSCALL_64) 420 421ENTRY(stub_ptregs_64) 422 /* 423 * Syscalls marked as needing ptregs land here. 424 * If we are on the fast path, we need to save the extra regs, 425 * which we achieve by trying again on the slow path. If we are on 426 * the slow path, the extra regs are already saved. 427 * 428 * RAX stores a pointer to the C function implementing the syscall. 429 * IRQs are on. 430 */ 431 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp) 432 jne 1f 433 434 /* 435 * Called from fast path -- disable IRQs again, pop return address 436 * and jump to slow path 437 */ 438 DISABLE_INTERRUPTS(CLBR_ANY) 439 TRACE_IRQS_OFF 440 popq %rax 441 UNWIND_HINT_REGS extra=0 442 jmp entry_SYSCALL64_slow_path 443 4441: 445 jmp *%rax /* Called from C */ 446END(stub_ptregs_64) 447 448.macro ptregs_stub func 449ENTRY(ptregs_\func) 450 UNWIND_HINT_FUNC 451 leaq \func(%rip), %rax 452 jmp stub_ptregs_64 453END(ptregs_\func) 454.endm 455 456/* Instantiate ptregs_stub for each ptregs-using syscall */ 457#define __SYSCALL_64_QUAL_(sym) 458#define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym 459#define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym) 460#include <asm/syscalls_64.h> 461 462/* 463 * %rdi: prev task 464 * %rsi: next task 465 */ 466ENTRY(__switch_to_asm) 467 UNWIND_HINT_FUNC 468 /* 469 * Save callee-saved registers 470 * This must match the order in inactive_task_frame 471 */ 472 pushq %rbp 473 pushq %rbx 474 pushq %r12 475 pushq %r13 476 pushq %r14 477 pushq %r15 478 479 /* switch stack */ 480 movq %rsp, TASK_threadsp(%rdi) 481 movq TASK_threadsp(%rsi), %rsp 482 483#ifdef CONFIG_CC_STACKPROTECTOR 484 movq TASK_stack_canary(%rsi), %rbx 485 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset 486#endif 487 488 /* restore callee-saved registers */ 489 popq %r15 490 popq %r14 491 popq %r13 492 popq %r12 493 popq %rbx 494 popq %rbp 495 496 jmp __switch_to 497END(__switch_to_asm) 498 499/* 500 * A newly forked process directly context switches into this address. 501 * 502 * rax: prev task we switched from 503 * rbx: kernel thread func (NULL for user thread) 504 * r12: kernel thread arg 505 */ 506ENTRY(ret_from_fork) 507 UNWIND_HINT_EMPTY 508 movq %rax, %rdi 509 call schedule_tail /* rdi: 'prev' task parameter */ 510 511 testq %rbx, %rbx /* from kernel_thread? */ 512 jnz 1f /* kernel threads are uncommon */ 513 5142: 515 UNWIND_HINT_REGS 516 movq %rsp, %rdi 517 call syscall_return_slowpath /* returns with IRQs disabled */ 518 TRACE_IRQS_ON /* user mode is traced as IRQS on */ 519 jmp swapgs_restore_regs_and_return_to_usermode 520 5211: 522 /* kernel thread */ 523 movq %r12, %rdi 524 call *%rbx 525 /* 526 * A kernel thread is allowed to return here after successfully 527 * calling do_execve(). Exit to userspace to complete the execve() 528 * syscall. 529 */ 530 movq $0, RAX(%rsp) 531 jmp 2b 532END(ret_from_fork) 533 534/* 535 * Build the entry stubs with some assembler magic. 536 * We pack 1 stub into every 8-byte block. 537 */ 538 .align 8 539ENTRY(irq_entries_start) 540 vector=FIRST_EXTERNAL_VECTOR 541 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 542 UNWIND_HINT_IRET_REGS 543 pushq $(~vector+0x80) /* Note: always in signed byte range */ 544 jmp common_interrupt 545 .align 8 546 vector=vector+1 547 .endr 548END(irq_entries_start) 549 550.macro DEBUG_ENTRY_ASSERT_IRQS_OFF 551#ifdef CONFIG_DEBUG_ENTRY 552 pushq %rax 553 SAVE_FLAGS(CLBR_RAX) 554 testl $X86_EFLAGS_IF, %eax 555 jz .Lokay_\@ 556 ud2 557.Lokay_\@: 558 popq %rax 559#endif 560.endm 561 562/* 563 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers 564 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone. 565 * Requires kernel GSBASE. 566 * 567 * The invariant is that, if irq_count != -1, then the IRQ stack is in use. 568 */ 569.macro ENTER_IRQ_STACK regs=1 old_rsp 570 DEBUG_ENTRY_ASSERT_IRQS_OFF 571 movq %rsp, \old_rsp 572 573 .if \regs 574 UNWIND_HINT_REGS base=\old_rsp 575 .endif 576 577 incl PER_CPU_VAR(irq_count) 578 jnz .Lirq_stack_push_old_rsp_\@ 579 580 /* 581 * Right now, if we just incremented irq_count to zero, we've 582 * claimed the IRQ stack but we haven't switched to it yet. 583 * 584 * If anything is added that can interrupt us here without using IST, 585 * it must be *extremely* careful to limit its stack usage. This 586 * could include kprobes and a hypothetical future IST-less #DB 587 * handler. 588 * 589 * The OOPS unwinder relies on the word at the top of the IRQ 590 * stack linking back to the previous RSP for the entire time we're 591 * on the IRQ stack. For this to work reliably, we need to write 592 * it before we actually move ourselves to the IRQ stack. 593 */ 594 595 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8) 596 movq PER_CPU_VAR(irq_stack_ptr), %rsp 597 598#ifdef CONFIG_DEBUG_ENTRY 599 /* 600 * If the first movq above becomes wrong due to IRQ stack layout 601 * changes, the only way we'll notice is if we try to unwind right 602 * here. Assert that we set up the stack right to catch this type 603 * of bug quickly. 604 */ 605 cmpq -8(%rsp), \old_rsp 606 je .Lirq_stack_okay\@ 607 ud2 608 .Lirq_stack_okay\@: 609#endif 610 611.Lirq_stack_push_old_rsp_\@: 612 pushq \old_rsp 613 614 .if \regs 615 UNWIND_HINT_REGS indirect=1 616 .endif 617.endm 618 619/* 620 * Undoes ENTER_IRQ_STACK. 621 */ 622.macro LEAVE_IRQ_STACK regs=1 623 DEBUG_ENTRY_ASSERT_IRQS_OFF 624 /* We need to be off the IRQ stack before decrementing irq_count. */ 625 popq %rsp 626 627 .if \regs 628 UNWIND_HINT_REGS 629 .endif 630 631 /* 632 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming 633 * the irq stack but we're not on it. 634 */ 635 636 decl PER_CPU_VAR(irq_count) 637.endm 638 639/* 640 * Interrupt entry/exit. 641 * 642 * Interrupt entry points save only callee clobbered registers in fast path. 643 * 644 * Entry runs with interrupts off. 645 */ 646 647/* 0(%rsp): ~(interrupt number) */ 648 .macro interrupt func 649 cld 650 651 testb $3, CS-ORIG_RAX(%rsp) 652 jz 1f 653 SWAPGS 654 call switch_to_thread_stack 6551: 656 657 ALLOC_PT_GPREGS_ON_STACK 658 SAVE_C_REGS 659 SAVE_EXTRA_REGS 660 ENCODE_FRAME_POINTER 661 662 testb $3, CS(%rsp) 663 jz 1f 664 665 /* 666 * IRQ from user mode. 667 * 668 * We need to tell lockdep that IRQs are off. We can't do this until 669 * we fix gsbase, and we should do it before enter_from_user_mode 670 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 671 * the simplest way to handle it is to just call it twice if 672 * we enter from user mode. There's no reason to optimize this since 673 * TRACE_IRQS_OFF is a no-op if lockdep is off. 674 */ 675 TRACE_IRQS_OFF 676 677 CALL_enter_from_user_mode 678 6791: 680 ENTER_IRQ_STACK old_rsp=%rdi 681 /* We entered an interrupt context - irqs are off: */ 682 TRACE_IRQS_OFF 683 684 call \func /* rdi points to pt_regs */ 685 .endm 686 687 /* 688 * The interrupt stubs push (~vector+0x80) onto the stack and 689 * then jump to common_interrupt. 690 */ 691 .p2align CONFIG_X86_L1_CACHE_SHIFT 692common_interrupt: 693 ASM_CLAC 694 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 695 interrupt do_IRQ 696 /* 0(%rsp): old RSP */ 697ret_from_intr: 698 DISABLE_INTERRUPTS(CLBR_ANY) 699 TRACE_IRQS_OFF 700 701 LEAVE_IRQ_STACK 702 703 testb $3, CS(%rsp) 704 jz retint_kernel 705 706 /* Interrupt came from user space */ 707GLOBAL(retint_user) 708 mov %rsp,%rdi 709 call prepare_exit_to_usermode 710 TRACE_IRQS_IRETQ 711 712GLOBAL(swapgs_restore_regs_and_return_to_usermode) 713#ifdef CONFIG_DEBUG_ENTRY 714 /* Assert that pt_regs indicates user mode. */ 715 testb $3, CS(%rsp) 716 jnz 1f 717 ud2 7181: 719#endif 720 POP_EXTRA_REGS 721 popq %r11 722 popq %r10 723 popq %r9 724 popq %r8 725 popq %rax 726 popq %rcx 727 popq %rdx 728 popq %rsi 729 730 /* 731 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS. 732 * Save old stack pointer and switch to trampoline stack. 733 */ 734 movq %rsp, %rdi 735 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp 736 737 /* Copy the IRET frame to the trampoline stack. */ 738 pushq 6*8(%rdi) /* SS */ 739 pushq 5*8(%rdi) /* RSP */ 740 pushq 4*8(%rdi) /* EFLAGS */ 741 pushq 3*8(%rdi) /* CS */ 742 pushq 2*8(%rdi) /* RIP */ 743 744 /* Push user RDI on the trampoline stack. */ 745 pushq (%rdi) 746 747 /* 748 * We are on the trampoline stack. All regs except RDI are live. 749 * We can do future final exit work right here. 750 */ 751 752 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi 753 754 /* Restore RDI. */ 755 popq %rdi 756 SWAPGS 757 INTERRUPT_RETURN 758 759 760/* Returning to kernel space */ 761retint_kernel: 762#ifdef CONFIG_PREEMPT 763 /* Interrupts are off */ 764 /* Check if we need preemption */ 765 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 766 jnc 1f 7670: cmpl $0, PER_CPU_VAR(__preempt_count) 768 jnz 1f 769 call preempt_schedule_irq 770 jmp 0b 7711: 772#endif 773 /* 774 * The iretq could re-enable interrupts: 775 */ 776 TRACE_IRQS_IRETQ 777 778GLOBAL(restore_regs_and_return_to_kernel) 779#ifdef CONFIG_DEBUG_ENTRY 780 /* Assert that pt_regs indicates kernel mode. */ 781 testb $3, CS(%rsp) 782 jz 1f 783 ud2 7841: 785#endif 786 POP_EXTRA_REGS 787 POP_C_REGS 788 addq $8, %rsp /* skip regs->orig_ax */ 789 INTERRUPT_RETURN 790 791ENTRY(native_iret) 792 UNWIND_HINT_IRET_REGS 793 /* 794 * Are we returning to a stack segment from the LDT? Note: in 795 * 64-bit mode SS:RSP on the exception stack is always valid. 796 */ 797#ifdef CONFIG_X86_ESPFIX64 798 testb $4, (SS-RIP)(%rsp) 799 jnz native_irq_return_ldt 800#endif 801 802.global native_irq_return_iret 803native_irq_return_iret: 804 /* 805 * This may fault. Non-paranoid faults on return to userspace are 806 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 807 * Double-faults due to espfix64 are handled in do_double_fault. 808 * Other faults here are fatal. 809 */ 810 iretq 811 812#ifdef CONFIG_X86_ESPFIX64 813native_irq_return_ldt: 814 /* 815 * We are running with user GSBASE. All GPRs contain their user 816 * values. We have a percpu ESPFIX stack that is eight slots 817 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom 818 * of the ESPFIX stack. 819 * 820 * We clobber RAX and RDI in this code. We stash RDI on the 821 * normal stack and RAX on the ESPFIX stack. 822 * 823 * The ESPFIX stack layout we set up looks like this: 824 * 825 * --- top of ESPFIX stack --- 826 * SS 827 * RSP 828 * RFLAGS 829 * CS 830 * RIP <-- RSP points here when we're done 831 * RAX <-- espfix_waddr points here 832 * --- bottom of ESPFIX stack --- 833 */ 834 835 pushq %rdi /* Stash user RDI */ 836 SWAPGS /* to kernel GS */ 837 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi /* to kernel CR3 */ 838 839 movq PER_CPU_VAR(espfix_waddr), %rdi 840 movq %rax, (0*8)(%rdi) /* user RAX */ 841 movq (1*8)(%rsp), %rax /* user RIP */ 842 movq %rax, (1*8)(%rdi) 843 movq (2*8)(%rsp), %rax /* user CS */ 844 movq %rax, (2*8)(%rdi) 845 movq (3*8)(%rsp), %rax /* user RFLAGS */ 846 movq %rax, (3*8)(%rdi) 847 movq (5*8)(%rsp), %rax /* user SS */ 848 movq %rax, (5*8)(%rdi) 849 movq (4*8)(%rsp), %rax /* user RSP */ 850 movq %rax, (4*8)(%rdi) 851 /* Now RAX == RSP. */ 852 853 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */ 854 855 /* 856 * espfix_stack[31:16] == 0. The page tables are set up such that 857 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of 858 * espfix_waddr for any X. That is, there are 65536 RO aliases of 859 * the same page. Set up RSP so that RSP[31:16] contains the 860 * respective 16 bits of the /userspace/ RSP and RSP nonetheless 861 * still points to an RO alias of the ESPFIX stack. 862 */ 863 orq PER_CPU_VAR(espfix_stack), %rax 864 865 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi 866 SWAPGS /* to user GS */ 867 popq %rdi /* Restore user RDI */ 868 869 movq %rax, %rsp 870 UNWIND_HINT_IRET_REGS offset=8 871 872 /* 873 * At this point, we cannot write to the stack any more, but we can 874 * still read. 875 */ 876 popq %rax /* Restore user RAX */ 877 878 /* 879 * RSP now points to an ordinary IRET frame, except that the page 880 * is read-only and RSP[31:16] are preloaded with the userspace 881 * values. We can now IRET back to userspace. 882 */ 883 jmp native_irq_return_iret 884#endif 885END(common_interrupt) 886 887/* 888 * APIC interrupts. 889 */ 890.macro apicinterrupt3 num sym do_sym 891ENTRY(\sym) 892 UNWIND_HINT_IRET_REGS 893 ASM_CLAC 894 pushq $~(\num) 895.Lcommon_\sym: 896 interrupt \do_sym 897 jmp ret_from_intr 898END(\sym) 899.endm 900 901/* Make sure APIC interrupt handlers end up in the irqentry section: */ 902#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax" 903#define POP_SECTION_IRQENTRY .popsection 904 905.macro apicinterrupt num sym do_sym 906PUSH_SECTION_IRQENTRY 907apicinterrupt3 \num \sym \do_sym 908POP_SECTION_IRQENTRY 909.endm 910 911#ifdef CONFIG_SMP 912apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 913apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 914#endif 915 916#ifdef CONFIG_X86_UV 917apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 918#endif 919 920apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 921apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 922 923#ifdef CONFIG_HAVE_KVM 924apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 925apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 926apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi 927#endif 928 929#ifdef CONFIG_X86_MCE_THRESHOLD 930apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 931#endif 932 933#ifdef CONFIG_X86_MCE_AMD 934apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 935#endif 936 937#ifdef CONFIG_X86_THERMAL_VECTOR 938apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 939#endif 940 941#ifdef CONFIG_SMP 942apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 943apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 944apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 945#endif 946 947apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 948apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 949 950#ifdef CONFIG_IRQ_WORK 951apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 952#endif 953 954/* 955 * Exception entry points. 956 */ 957#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8) 958 959/* 960 * Switch to the thread stack. This is called with the IRET frame and 961 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and 962 * space has not been allocated for them.) 963 */ 964ENTRY(switch_to_thread_stack) 965 UNWIND_HINT_FUNC 966 967 pushq %rdi 968 /* Need to switch before accessing the thread stack. */ 969 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi 970 movq %rsp, %rdi 971 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 972 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI 973 974 pushq 7*8(%rdi) /* regs->ss */ 975 pushq 6*8(%rdi) /* regs->rsp */ 976 pushq 5*8(%rdi) /* regs->eflags */ 977 pushq 4*8(%rdi) /* regs->cs */ 978 pushq 3*8(%rdi) /* regs->ip */ 979 pushq 2*8(%rdi) /* regs->orig_ax */ 980 pushq 8(%rdi) /* return address */ 981 UNWIND_HINT_FUNC 982 983 movq (%rdi), %rdi 984 ret 985END(switch_to_thread_stack) 986 987.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 988ENTRY(\sym) 989 UNWIND_HINT_IRET_REGS offset=\has_error_code*8 990 991 /* Sanity check */ 992 .if \shift_ist != -1 && \paranoid == 0 993 .error "using shift_ist requires paranoid=1" 994 .endif 995 996 ASM_CLAC 997 998 .if \has_error_code == 0 999 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1000 .endif 1001 1002 ALLOC_PT_GPREGS_ON_STACK 1003 1004 .if \paranoid < 2 1005 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 1006 jnz .Lfrom_usermode_switch_stack_\@ 1007 .endif 1008 1009 .if \paranoid 1010 call paranoid_entry 1011 .else 1012 call error_entry 1013 .endif 1014 UNWIND_HINT_REGS 1015 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 1016 1017 .if \paranoid 1018 .if \shift_ist != -1 1019 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 1020 .else 1021 TRACE_IRQS_OFF 1022 .endif 1023 .endif 1024 1025 movq %rsp, %rdi /* pt_regs pointer */ 1026 1027 .if \has_error_code 1028 movq ORIG_RAX(%rsp), %rsi /* get error code */ 1029 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 1030 .else 1031 xorl %esi, %esi /* no error code */ 1032 .endif 1033 1034 .if \shift_ist != -1 1035 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 1036 .endif 1037 1038 call \do_sym 1039 1040 .if \shift_ist != -1 1041 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 1042 .endif 1043 1044 /* these procedures expect "no swapgs" flag in ebx */ 1045 .if \paranoid 1046 jmp paranoid_exit 1047 .else 1048 jmp error_exit 1049 .endif 1050 1051 .if \paranoid < 2 1052 /* 1053 * Entry from userspace. Switch stacks and treat it 1054 * as a normal entry. This means that paranoid handlers 1055 * run in real process context if user_mode(regs). 1056 */ 1057.Lfrom_usermode_switch_stack_\@: 1058 call error_entry 1059 1060 movq %rsp, %rdi /* pt_regs pointer */ 1061 1062 .if \has_error_code 1063 movq ORIG_RAX(%rsp), %rsi /* get error code */ 1064 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 1065 .else 1066 xorl %esi, %esi /* no error code */ 1067 .endif 1068 1069 call \do_sym 1070 1071 jmp error_exit /* %ebx: no swapgs flag */ 1072 .endif 1073END(\sym) 1074.endm 1075 1076idtentry divide_error do_divide_error has_error_code=0 1077idtentry overflow do_overflow has_error_code=0 1078idtentry bounds do_bounds has_error_code=0 1079idtentry invalid_op do_invalid_op has_error_code=0 1080idtentry device_not_available do_device_not_available has_error_code=0 1081idtentry double_fault do_double_fault has_error_code=1 paranoid=2 1082idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 1083idtentry invalid_TSS do_invalid_TSS has_error_code=1 1084idtentry segment_not_present do_segment_not_present has_error_code=1 1085idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 1086idtentry coprocessor_error do_coprocessor_error has_error_code=0 1087idtentry alignment_check do_alignment_check has_error_code=1 1088idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 1089 1090 1091 /* 1092 * Reload gs selector with exception handling 1093 * edi: new selector 1094 */ 1095ENTRY(native_load_gs_index) 1096 FRAME_BEGIN 1097 pushfq 1098 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 1099 TRACE_IRQS_OFF 1100 SWAPGS 1101.Lgs_change: 1102 movl %edi, %gs 11032: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE 1104 SWAPGS 1105 TRACE_IRQS_FLAGS (%rsp) 1106 popfq 1107 FRAME_END 1108 ret 1109ENDPROC(native_load_gs_index) 1110EXPORT_SYMBOL(native_load_gs_index) 1111 1112 _ASM_EXTABLE(.Lgs_change, bad_gs) 1113 .section .fixup, "ax" 1114 /* running with kernelgs */ 1115bad_gs: 1116 SWAPGS /* switch back to user gs */ 1117.macro ZAP_GS 1118 /* This can't be a string because the preprocessor needs to see it. */ 1119 movl $__USER_DS, %eax 1120 movl %eax, %gs 1121.endm 1122 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG 1123 xorl %eax, %eax 1124 movl %eax, %gs 1125 jmp 2b 1126 .previous 1127 1128/* Call softirq on interrupt stack. Interrupts are off. */ 1129ENTRY(do_softirq_own_stack) 1130 pushq %rbp 1131 mov %rsp, %rbp 1132 ENTER_IRQ_STACK regs=0 old_rsp=%r11 1133 call __do_softirq 1134 LEAVE_IRQ_STACK regs=0 1135 leaveq 1136 ret 1137ENDPROC(do_softirq_own_stack) 1138 1139#ifdef CONFIG_XEN 1140idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0 1141 1142/* 1143 * A note on the "critical region" in our callback handler. 1144 * We want to avoid stacking callback handlers due to events occurring 1145 * during handling of the last event. To do this, we keep events disabled 1146 * until we've done all processing. HOWEVER, we must enable events before 1147 * popping the stack frame (can't be done atomically) and so it would still 1148 * be possible to get enough handler activations to overflow the stack. 1149 * Although unlikely, bugs of that kind are hard to track down, so we'd 1150 * like to avoid the possibility. 1151 * So, on entry to the handler we detect whether we interrupted an 1152 * existing activation in its critical region -- if so, we pop the current 1153 * activation and restart the handler using the previous one. 1154 */ 1155ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 1156 1157/* 1158 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 1159 * see the correct pointer to the pt_regs 1160 */ 1161 UNWIND_HINT_FUNC 1162 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 1163 UNWIND_HINT_REGS 1164 1165 ENTER_IRQ_STACK old_rsp=%r10 1166 call xen_evtchn_do_upcall 1167 LEAVE_IRQ_STACK 1168 1169#ifndef CONFIG_PREEMPT 1170 call xen_maybe_preempt_hcall 1171#endif 1172 jmp error_exit 1173END(xen_do_hypervisor_callback) 1174 1175/* 1176 * Hypervisor uses this for application faults while it executes. 1177 * We get here for two reasons: 1178 * 1. Fault while reloading DS, ES, FS or GS 1179 * 2. Fault while executing IRET 1180 * Category 1 we do not need to fix up as Xen has already reloaded all segment 1181 * registers that could be reloaded and zeroed the others. 1182 * Category 2 we fix up by killing the current process. We cannot use the 1183 * normal Linux return path in this case because if we use the IRET hypercall 1184 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 1185 * We distinguish between categories by comparing each saved segment register 1186 * with its current contents: any discrepancy means we in category 1. 1187 */ 1188ENTRY(xen_failsafe_callback) 1189 UNWIND_HINT_EMPTY 1190 movl %ds, %ecx 1191 cmpw %cx, 0x10(%rsp) 1192 jne 1f 1193 movl %es, %ecx 1194 cmpw %cx, 0x18(%rsp) 1195 jne 1f 1196 movl %fs, %ecx 1197 cmpw %cx, 0x20(%rsp) 1198 jne 1f 1199 movl %gs, %ecx 1200 cmpw %cx, 0x28(%rsp) 1201 jne 1f 1202 /* All segments match their saved values => Category 2 (Bad IRET). */ 1203 movq (%rsp), %rcx 1204 movq 8(%rsp), %r11 1205 addq $0x30, %rsp 1206 pushq $0 /* RIP */ 1207 UNWIND_HINT_IRET_REGS offset=8 1208 jmp general_protection 12091: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 1210 movq (%rsp), %rcx 1211 movq 8(%rsp), %r11 1212 addq $0x30, %rsp 1213 UNWIND_HINT_IRET_REGS 1214 pushq $-1 /* orig_ax = -1 => not a system call */ 1215 ALLOC_PT_GPREGS_ON_STACK 1216 SAVE_C_REGS 1217 SAVE_EXTRA_REGS 1218 ENCODE_FRAME_POINTER 1219 jmp error_exit 1220END(xen_failsafe_callback) 1221 1222apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1223 xen_hvm_callback_vector xen_evtchn_do_upcall 1224 1225#endif /* CONFIG_XEN */ 1226 1227#if IS_ENABLED(CONFIG_HYPERV) 1228apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1229 hyperv_callback_vector hyperv_vector_handler 1230#endif /* CONFIG_HYPERV */ 1231 1232idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1233idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1234idtentry stack_segment do_stack_segment has_error_code=1 1235 1236#ifdef CONFIG_XEN 1237idtentry xennmi do_nmi has_error_code=0 1238idtentry xendebug do_debug has_error_code=0 1239idtentry xenint3 do_int3 has_error_code=0 1240#endif 1241 1242idtentry general_protection do_general_protection has_error_code=1 1243idtentry page_fault do_page_fault has_error_code=1 1244 1245#ifdef CONFIG_KVM_GUEST 1246idtentry async_page_fault do_async_page_fault has_error_code=1 1247#endif 1248 1249#ifdef CONFIG_X86_MCE 1250idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 1251#endif 1252 1253/* 1254 * Save all registers in pt_regs, and switch gs if needed. 1255 * Use slow, but surefire "are we in kernel?" check. 1256 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 1257 */ 1258ENTRY(paranoid_entry) 1259 UNWIND_HINT_FUNC 1260 cld 1261 SAVE_C_REGS 8 1262 SAVE_EXTRA_REGS 8 1263 ENCODE_FRAME_POINTER 8 1264 movl $1, %ebx 1265 movl $MSR_GS_BASE, %ecx 1266 rdmsr 1267 testl %edx, %edx 1268 js 1f /* negative -> in kernel */ 1269 SWAPGS 1270 xorl %ebx, %ebx 1271 12721: 1273 SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14 1274 1275 ret 1276END(paranoid_entry) 1277 1278/* 1279 * "Paranoid" exit path from exception stack. This is invoked 1280 * only on return from non-NMI IST interrupts that came 1281 * from kernel space. 1282 * 1283 * We may be returning to very strange contexts (e.g. very early 1284 * in syscall entry), so checking for preemption here would 1285 * be complicated. Fortunately, we there's no good reason 1286 * to try to handle preemption here. 1287 * 1288 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1289 */ 1290ENTRY(paranoid_exit) 1291 UNWIND_HINT_REGS 1292 DISABLE_INTERRUPTS(CLBR_ANY) 1293 TRACE_IRQS_OFF_DEBUG 1294 testl %ebx, %ebx /* swapgs needed? */ 1295 jnz .Lparanoid_exit_no_swapgs 1296 TRACE_IRQS_IRETQ 1297 RESTORE_CR3 scratch_reg=%rbx save_reg=%r14 1298 SWAPGS_UNSAFE_STACK 1299 jmp .Lparanoid_exit_restore 1300.Lparanoid_exit_no_swapgs: 1301 TRACE_IRQS_IRETQ_DEBUG 1302.Lparanoid_exit_restore: 1303 jmp restore_regs_and_return_to_kernel 1304END(paranoid_exit) 1305 1306/* 1307 * Save all registers in pt_regs, and switch gs if needed. 1308 * Return: EBX=0: came from user mode; EBX=1: otherwise 1309 */ 1310ENTRY(error_entry) 1311 UNWIND_HINT_FUNC 1312 cld 1313 SAVE_C_REGS 8 1314 SAVE_EXTRA_REGS 8 1315 ENCODE_FRAME_POINTER 8 1316 xorl %ebx, %ebx 1317 testb $3, CS+8(%rsp) 1318 jz .Lerror_kernelspace 1319 1320 /* 1321 * We entered from user mode or we're pretending to have entered 1322 * from user mode due to an IRET fault. 1323 */ 1324 SWAPGS 1325 /* We have user CR3. Change to kernel CR3. */ 1326 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 1327 1328.Lerror_entry_from_usermode_after_swapgs: 1329 /* Put us onto the real thread stack. */ 1330 popq %r12 /* save return addr in %12 */ 1331 movq %rsp, %rdi /* arg0 = pt_regs pointer */ 1332 call sync_regs 1333 movq %rax, %rsp /* switch stack */ 1334 ENCODE_FRAME_POINTER 1335 pushq %r12 1336 1337 /* 1338 * We need to tell lockdep that IRQs are off. We can't do this until 1339 * we fix gsbase, and we should do it before enter_from_user_mode 1340 * (which can take locks). 1341 */ 1342 TRACE_IRQS_OFF 1343 CALL_enter_from_user_mode 1344 ret 1345 1346.Lerror_entry_done: 1347 TRACE_IRQS_OFF 1348 ret 1349 1350 /* 1351 * There are two places in the kernel that can potentially fault with 1352 * usergs. Handle them here. B stepping K8s sometimes report a 1353 * truncated RIP for IRET exceptions returning to compat mode. Check 1354 * for these here too. 1355 */ 1356.Lerror_kernelspace: 1357 incl %ebx 1358 leaq native_irq_return_iret(%rip), %rcx 1359 cmpq %rcx, RIP+8(%rsp) 1360 je .Lerror_bad_iret 1361 movl %ecx, %eax /* zero extend */ 1362 cmpq %rax, RIP+8(%rsp) 1363 je .Lbstep_iret 1364 cmpq $.Lgs_change, RIP+8(%rsp) 1365 jne .Lerror_entry_done 1366 1367 /* 1368 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up 1369 * gsbase and proceed. We'll fix up the exception and land in 1370 * .Lgs_change's error handler with kernel gsbase. 1371 */ 1372 SWAPGS 1373 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 1374 jmp .Lerror_entry_done 1375 1376.Lbstep_iret: 1377 /* Fix truncated RIP */ 1378 movq %rcx, RIP+8(%rsp) 1379 /* fall through */ 1380 1381.Lerror_bad_iret: 1382 /* 1383 * We came from an IRET to user mode, so we have user 1384 * gsbase and CR3. Switch to kernel gsbase and CR3: 1385 */ 1386 SWAPGS 1387 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax 1388 1389 /* 1390 * Pretend that the exception came from user mode: set up pt_regs 1391 * as if we faulted immediately after IRET and clear EBX so that 1392 * error_exit knows that we will be returning to user mode. 1393 */ 1394 mov %rsp, %rdi 1395 call fixup_bad_iret 1396 mov %rax, %rsp 1397 decl %ebx 1398 jmp .Lerror_entry_from_usermode_after_swapgs 1399END(error_entry) 1400 1401 1402/* 1403 * On entry, EBX is a "return to kernel mode" flag: 1404 * 1: already in kernel mode, don't need SWAPGS 1405 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1406 */ 1407ENTRY(error_exit) 1408 UNWIND_HINT_REGS 1409 DISABLE_INTERRUPTS(CLBR_ANY) 1410 TRACE_IRQS_OFF 1411 testl %ebx, %ebx 1412 jnz retint_kernel 1413 jmp retint_user 1414END(error_exit) 1415 1416/* 1417 * Runs on exception stack. Xen PV does not go through this path at all, 1418 * so we can use real assembly here. 1419 * 1420 * Registers: 1421 * %r14: Used to save/restore the CR3 of the interrupted context 1422 * when PAGE_TABLE_ISOLATION is in use. Do not clobber. 1423 */ 1424ENTRY(nmi) 1425 UNWIND_HINT_IRET_REGS 1426 1427 /* 1428 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1429 * the iretq it performs will take us out of NMI context. 1430 * This means that we can have nested NMIs where the next 1431 * NMI is using the top of the stack of the previous NMI. We 1432 * can't let it execute because the nested NMI will corrupt the 1433 * stack of the previous NMI. NMI handlers are not re-entrant 1434 * anyway. 1435 * 1436 * To handle this case we do the following: 1437 * Check the a special location on the stack that contains 1438 * a variable that is set when NMIs are executing. 1439 * The interrupted task's stack is also checked to see if it 1440 * is an NMI stack. 1441 * If the variable is not set and the stack is not the NMI 1442 * stack then: 1443 * o Set the special variable on the stack 1444 * o Copy the interrupt frame into an "outermost" location on the 1445 * stack 1446 * o Copy the interrupt frame into an "iret" location on the stack 1447 * o Continue processing the NMI 1448 * If the variable is set or the previous stack is the NMI stack: 1449 * o Modify the "iret" location to jump to the repeat_nmi 1450 * o return back to the first NMI 1451 * 1452 * Now on exit of the first NMI, we first clear the stack variable 1453 * The NMI stack will tell any nested NMIs at that point that it is 1454 * nested. Then we pop the stack normally with iret, and if there was 1455 * a nested NMI that updated the copy interrupt stack frame, a 1456 * jump will be made to the repeat_nmi code that will handle the second 1457 * NMI. 1458 * 1459 * However, espfix prevents us from directly returning to userspace 1460 * with a single IRET instruction. Similarly, IRET to user mode 1461 * can fault. We therefore handle NMIs from user space like 1462 * other IST entries. 1463 */ 1464 1465 ASM_CLAC 1466 1467 /* Use %rdx as our temp variable throughout */ 1468 pushq %rdx 1469 1470 testb $3, CS-RIP+8(%rsp) 1471 jz .Lnmi_from_kernel 1472 1473 /* 1474 * NMI from user mode. We need to run on the thread stack, but we 1475 * can't go through the normal entry paths: NMIs are masked, and 1476 * we don't want to enable interrupts, because then we'll end 1477 * up in an awkward situation in which IRQs are on but NMIs 1478 * are off. 1479 * 1480 * We also must not push anything to the stack before switching 1481 * stacks lest we corrupt the "NMI executing" variable. 1482 */ 1483 1484 swapgs 1485 cld 1486 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx 1487 movq %rsp, %rdx 1488 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1489 UNWIND_HINT_IRET_REGS base=%rdx offset=8 1490 pushq 5*8(%rdx) /* pt_regs->ss */ 1491 pushq 4*8(%rdx) /* pt_regs->rsp */ 1492 pushq 3*8(%rdx) /* pt_regs->flags */ 1493 pushq 2*8(%rdx) /* pt_regs->cs */ 1494 pushq 1*8(%rdx) /* pt_regs->rip */ 1495 UNWIND_HINT_IRET_REGS 1496 pushq $-1 /* pt_regs->orig_ax */ 1497 pushq %rdi /* pt_regs->di */ 1498 pushq %rsi /* pt_regs->si */ 1499 pushq (%rdx) /* pt_regs->dx */ 1500 pushq %rcx /* pt_regs->cx */ 1501 pushq %rax /* pt_regs->ax */ 1502 pushq %r8 /* pt_regs->r8 */ 1503 pushq %r9 /* pt_regs->r9 */ 1504 pushq %r10 /* pt_regs->r10 */ 1505 pushq %r11 /* pt_regs->r11 */ 1506 pushq %rbx /* pt_regs->rbx */ 1507 pushq %rbp /* pt_regs->rbp */ 1508 pushq %r12 /* pt_regs->r12 */ 1509 pushq %r13 /* pt_regs->r13 */ 1510 pushq %r14 /* pt_regs->r14 */ 1511 pushq %r15 /* pt_regs->r15 */ 1512 UNWIND_HINT_REGS 1513 ENCODE_FRAME_POINTER 1514 1515 /* 1516 * At this point we no longer need to worry about stack damage 1517 * due to nesting -- we're on the normal thread stack and we're 1518 * done with the NMI stack. 1519 */ 1520 1521 movq %rsp, %rdi 1522 movq $-1, %rsi 1523 call do_nmi 1524 1525 /* 1526 * Return back to user mode. We must *not* do the normal exit 1527 * work, because we don't want to enable interrupts. 1528 */ 1529 jmp swapgs_restore_regs_and_return_to_usermode 1530 1531.Lnmi_from_kernel: 1532 /* 1533 * Here's what our stack frame will look like: 1534 * +---------------------------------------------------------+ 1535 * | original SS | 1536 * | original Return RSP | 1537 * | original RFLAGS | 1538 * | original CS | 1539 * | original RIP | 1540 * +---------------------------------------------------------+ 1541 * | temp storage for rdx | 1542 * +---------------------------------------------------------+ 1543 * | "NMI executing" variable | 1544 * +---------------------------------------------------------+ 1545 * | iret SS } Copied from "outermost" frame | 1546 * | iret Return RSP } on each loop iteration; overwritten | 1547 * | iret RFLAGS } by a nested NMI to force another | 1548 * | iret CS } iteration if needed. | 1549 * | iret RIP } | 1550 * +---------------------------------------------------------+ 1551 * | outermost SS } initialized in first_nmi; | 1552 * | outermost Return RSP } will not be changed before | 1553 * | outermost RFLAGS } NMI processing is done. | 1554 * | outermost CS } Copied to "iret" frame on each | 1555 * | outermost RIP } iteration. | 1556 * +---------------------------------------------------------+ 1557 * | pt_regs | 1558 * +---------------------------------------------------------+ 1559 * 1560 * The "original" frame is used by hardware. Before re-enabling 1561 * NMIs, we need to be done with it, and we need to leave enough 1562 * space for the asm code here. 1563 * 1564 * We return by executing IRET while RSP points to the "iret" frame. 1565 * That will either return for real or it will loop back into NMI 1566 * processing. 1567 * 1568 * The "outermost" frame is copied to the "iret" frame on each 1569 * iteration of the loop, so each iteration starts with the "iret" 1570 * frame pointing to the final return target. 1571 */ 1572 1573 /* 1574 * Determine whether we're a nested NMI. 1575 * 1576 * If we interrupted kernel code between repeat_nmi and 1577 * end_repeat_nmi, then we are a nested NMI. We must not 1578 * modify the "iret" frame because it's being written by 1579 * the outer NMI. That's okay; the outer NMI handler is 1580 * about to about to call do_nmi anyway, so we can just 1581 * resume the outer NMI. 1582 */ 1583 1584 movq $repeat_nmi, %rdx 1585 cmpq 8(%rsp), %rdx 1586 ja 1f 1587 movq $end_repeat_nmi, %rdx 1588 cmpq 8(%rsp), %rdx 1589 ja nested_nmi_out 15901: 1591 1592 /* 1593 * Now check "NMI executing". If it's set, then we're nested. 1594 * This will not detect if we interrupted an outer NMI just 1595 * before IRET. 1596 */ 1597 cmpl $1, -8(%rsp) 1598 je nested_nmi 1599 1600 /* 1601 * Now test if the previous stack was an NMI stack. This covers 1602 * the case where we interrupt an outer NMI after it clears 1603 * "NMI executing" but before IRET. We need to be careful, though: 1604 * there is one case in which RSP could point to the NMI stack 1605 * despite there being no NMI active: naughty userspace controls 1606 * RSP at the very beginning of the SYSCALL targets. We can 1607 * pull a fast one on naughty userspace, though: we program 1608 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1609 * if it controls the kernel's RSP. We set DF before we clear 1610 * "NMI executing". 1611 */ 1612 lea 6*8(%rsp), %rdx 1613 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1614 cmpq %rdx, 4*8(%rsp) 1615 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1616 ja first_nmi 1617 1618 subq $EXCEPTION_STKSZ, %rdx 1619 cmpq %rdx, 4*8(%rsp) 1620 /* If it is below the NMI stack, it is a normal NMI */ 1621 jb first_nmi 1622 1623 /* Ah, it is within the NMI stack. */ 1624 1625 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1626 jz first_nmi /* RSP was user controlled. */ 1627 1628 /* This is a nested NMI. */ 1629 1630nested_nmi: 1631 /* 1632 * Modify the "iret" frame to point to repeat_nmi, forcing another 1633 * iteration of NMI handling. 1634 */ 1635 subq $8, %rsp 1636 leaq -10*8(%rsp), %rdx 1637 pushq $__KERNEL_DS 1638 pushq %rdx 1639 pushfq 1640 pushq $__KERNEL_CS 1641 pushq $repeat_nmi 1642 1643 /* Put stack back */ 1644 addq $(6*8), %rsp 1645 1646nested_nmi_out: 1647 popq %rdx 1648 1649 /* We are returning to kernel mode, so this cannot result in a fault. */ 1650 iretq 1651 1652first_nmi: 1653 /* Restore rdx. */ 1654 movq (%rsp), %rdx 1655 1656 /* Make room for "NMI executing". */ 1657 pushq $0 1658 1659 /* Leave room for the "iret" frame */ 1660 subq $(5*8), %rsp 1661 1662 /* Copy the "original" frame to the "outermost" frame */ 1663 .rept 5 1664 pushq 11*8(%rsp) 1665 .endr 1666 UNWIND_HINT_IRET_REGS 1667 1668 /* Everything up to here is safe from nested NMIs */ 1669 1670#ifdef CONFIG_DEBUG_ENTRY 1671 /* 1672 * For ease of testing, unmask NMIs right away. Disabled by 1673 * default because IRET is very expensive. 1674 */ 1675 pushq $0 /* SS */ 1676 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1677 addq $8, (%rsp) /* Fix up RSP */ 1678 pushfq /* RFLAGS */ 1679 pushq $__KERNEL_CS /* CS */ 1680 pushq $1f /* RIP */ 1681 iretq /* continues at repeat_nmi below */ 1682 UNWIND_HINT_IRET_REGS 16831: 1684#endif 1685 1686repeat_nmi: 1687 /* 1688 * If there was a nested NMI, the first NMI's iret will return 1689 * here. But NMIs are still enabled and we can take another 1690 * nested NMI. The nested NMI checks the interrupted RIP to see 1691 * if it is between repeat_nmi and end_repeat_nmi, and if so 1692 * it will just return, as we are about to repeat an NMI anyway. 1693 * This makes it safe to copy to the stack frame that a nested 1694 * NMI will update. 1695 * 1696 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1697 * we're repeating an NMI, gsbase has the same value that it had on 1698 * the first iteration. paranoid_entry will load the kernel 1699 * gsbase if needed before we call do_nmi. "NMI executing" 1700 * is zero. 1701 */ 1702 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1703 1704 /* 1705 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1706 * here must not modify the "iret" frame while we're writing to 1707 * it or it will end up containing garbage. 1708 */ 1709 addq $(10*8), %rsp 1710 .rept 5 1711 pushq -6*8(%rsp) 1712 .endr 1713 subq $(5*8), %rsp 1714end_repeat_nmi: 1715 1716 /* 1717 * Everything below this point can be preempted by a nested NMI. 1718 * If this happens, then the inner NMI will change the "iret" 1719 * frame to point back to repeat_nmi. 1720 */ 1721 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1722 ALLOC_PT_GPREGS_ON_STACK 1723 1724 /* 1725 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1726 * as we should not be calling schedule in NMI context. 1727 * Even with normal interrupts enabled. An NMI should not be 1728 * setting NEED_RESCHED or anything that normal interrupts and 1729 * exceptions might do. 1730 */ 1731 call paranoid_entry 1732 UNWIND_HINT_REGS 1733 1734 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1735 movq %rsp, %rdi 1736 movq $-1, %rsi 1737 call do_nmi 1738 1739 RESTORE_CR3 scratch_reg=%r15 save_reg=%r14 1740 1741 testl %ebx, %ebx /* swapgs needed? */ 1742 jnz nmi_restore 1743nmi_swapgs: 1744 SWAPGS_UNSAFE_STACK 1745nmi_restore: 1746 POP_EXTRA_REGS 1747 POP_C_REGS 1748 1749 /* 1750 * Skip orig_ax and the "outermost" frame to point RSP at the "iret" 1751 * at the "iret" frame. 1752 */ 1753 addq $6*8, %rsp 1754 1755 /* 1756 * Clear "NMI executing". Set DF first so that we can easily 1757 * distinguish the remaining code between here and IRET from 1758 * the SYSCALL entry and exit paths. 1759 * 1760 * We arguably should just inspect RIP instead, but I (Andy) wrote 1761 * this code when I had the misapprehension that Xen PV supported 1762 * NMIs, and Xen PV would break that approach. 1763 */ 1764 std 1765 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1766 1767 /* 1768 * iretq reads the "iret" frame and exits the NMI stack in a 1769 * single instruction. We are returning to kernel mode, so this 1770 * cannot result in a fault. Similarly, we don't need to worry 1771 * about espfix64 on the way back to kernel mode. 1772 */ 1773 iretq 1774END(nmi) 1775 1776ENTRY(ignore_sysret) 1777 UNWIND_HINT_EMPTY 1778 mov $-ENOSYS, %eax 1779 sysret 1780END(ignore_sysret) 1781 1782ENTRY(rewind_stack_do_exit) 1783 UNWIND_HINT_FUNC 1784 /* Prevent any naive code from trying to unwind to our caller. */ 1785 xorl %ebp, %ebp 1786 1787 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax 1788 leaq -PTREGS_SIZE(%rax), %rsp 1789 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE 1790 1791 call do_exit 1792END(rewind_stack_do_exit) 1793