1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/x86_64/entry.S 4 * 5 * Copyright (C) 1991, 1992 Linus Torvalds 6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs 7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> 8 * 9 * entry.S contains the system-call and fault low-level handling routines. 10 * 11 * Some of this is documented in Documentation/x86/entry_64.txt 12 * 13 * A note on terminology: 14 * - iret frame: Architecture defined interrupt frame from SS to RIP 15 * at the top of the kernel process stack. 16 * 17 * Some macro usage: 18 * - ENTRY/END: Define functions in the symbol table. 19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging. 20 * - idtentry: Define exception entry points. 21 */ 22#include <linux/linkage.h> 23#include <asm/segment.h> 24#include <asm/cache.h> 25#include <asm/errno.h> 26#include "calling.h" 27#include <asm/asm-offsets.h> 28#include <asm/msr.h> 29#include <asm/unistd.h> 30#include <asm/thread_info.h> 31#include <asm/hw_irq.h> 32#include <asm/page_types.h> 33#include <asm/irqflags.h> 34#include <asm/paravirt.h> 35#include <asm/percpu.h> 36#include <asm/asm.h> 37#include <asm/smap.h> 38#include <asm/pgtable_types.h> 39#include <asm/export.h> 40#include <asm/frame.h> 41#include <linux/err.h> 42 43.code64 44.section .entry.text, "ax" 45 46#ifdef CONFIG_PARAVIRT 47ENTRY(native_usergs_sysret64) 48 UNWIND_HINT_EMPTY 49 swapgs 50 sysretq 51END(native_usergs_sysret64) 52#endif /* CONFIG_PARAVIRT */ 53 54.macro TRACE_IRQS_FLAGS flags:req 55#ifdef CONFIG_TRACE_IRQFLAGS 56 bt $9, \flags /* interrupts off? */ 57 jnc 1f 58 TRACE_IRQS_ON 591: 60#endif 61.endm 62 63.macro TRACE_IRQS_IRETQ 64 TRACE_IRQS_FLAGS EFLAGS(%rsp) 65.endm 66 67/* 68 * When dynamic function tracer is enabled it will add a breakpoint 69 * to all locations that it is about to modify, sync CPUs, update 70 * all the code, sync CPUs, then remove the breakpoints. In this time 71 * if lockdep is enabled, it might jump back into the debug handler 72 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). 73 * 74 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to 75 * make sure the stack pointer does not get reset back to the top 76 * of the debug stack, and instead just reuses the current stack. 77 */ 78#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) 79 80.macro TRACE_IRQS_OFF_DEBUG 81 call debug_stack_set_zero 82 TRACE_IRQS_OFF 83 call debug_stack_reset 84.endm 85 86.macro TRACE_IRQS_ON_DEBUG 87 call debug_stack_set_zero 88 TRACE_IRQS_ON 89 call debug_stack_reset 90.endm 91 92.macro TRACE_IRQS_IRETQ_DEBUG 93 bt $9, EFLAGS(%rsp) /* interrupts off? */ 94 jnc 1f 95 TRACE_IRQS_ON_DEBUG 961: 97.endm 98 99#else 100# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF 101# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON 102# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ 103#endif 104 105/* 106 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers. 107 * 108 * This is the only entry point used for 64-bit system calls. The 109 * hardware interface is reasonably well designed and the register to 110 * argument mapping Linux uses fits well with the registers that are 111 * available when SYSCALL is used. 112 * 113 * SYSCALL instructions can be found inlined in libc implementations as 114 * well as some other programs and libraries. There are also a handful 115 * of SYSCALL instructions in the vDSO used, for example, as a 116 * clock_gettimeofday fallback. 117 * 118 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, 119 * then loads new ss, cs, and rip from previously programmed MSRs. 120 * rflags gets masked by a value from another MSR (so CLD and CLAC 121 * are not needed). SYSCALL does not save anything on the stack 122 * and does not change rsp. 123 * 124 * Registers on entry: 125 * rax system call number 126 * rcx return address 127 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) 128 * rdi arg0 129 * rsi arg1 130 * rdx arg2 131 * r10 arg3 (needs to be moved to rcx to conform to C ABI) 132 * r8 arg4 133 * r9 arg5 134 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI) 135 * 136 * Only called from user space. 137 * 138 * When user can change pt_regs->foo always force IRET. That is because 139 * it deals with uncanonical addresses better. SYSRET has trouble 140 * with them due to bugs in both AMD and Intel CPUs. 141 */ 142 143ENTRY(entry_SYSCALL_64) 144 UNWIND_HINT_EMPTY 145 /* 146 * Interrupts are off on entry. 147 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, 148 * it is too small to ever cause noticeable irq latency. 149 */ 150 151 swapgs 152 movq %rsp, PER_CPU_VAR(rsp_scratch) 153 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 154 155 /* Construct struct pt_regs on stack */ 156 pushq $__USER_DS /* pt_regs->ss */ 157 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */ 158 pushq %r11 /* pt_regs->flags */ 159 pushq $__USER_CS /* pt_regs->cs */ 160 pushq %rcx /* pt_regs->ip */ 161GLOBAL(entry_SYSCALL_64_after_hwframe) 162 pushq %rax /* pt_regs->orig_ax */ 163 pushq %rdi /* pt_regs->di */ 164 pushq %rsi /* pt_regs->si */ 165 pushq %rdx /* pt_regs->dx */ 166 pushq %rcx /* pt_regs->cx */ 167 pushq $-ENOSYS /* pt_regs->ax */ 168 pushq %r8 /* pt_regs->r8 */ 169 pushq %r9 /* pt_regs->r9 */ 170 pushq %r10 /* pt_regs->r10 */ 171 pushq %r11 /* pt_regs->r11 */ 172 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */ 173 UNWIND_HINT_REGS extra=0 174 175 TRACE_IRQS_OFF 176 177 /* 178 * If we need to do entry work or if we guess we'll need to do 179 * exit work, go straight to the slow path. 180 */ 181 movq PER_CPU_VAR(current_task), %r11 182 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 183 jnz entry_SYSCALL64_slow_path 184 185entry_SYSCALL_64_fastpath: 186 /* 187 * Easy case: enable interrupts and issue the syscall. If the syscall 188 * needs pt_regs, we'll call a stub that disables interrupts again 189 * and jumps to the slow path. 190 */ 191 TRACE_IRQS_ON 192 ENABLE_INTERRUPTS(CLBR_NONE) 193#if __SYSCALL_MASK == ~0 194 cmpq $__NR_syscall_max, %rax 195#else 196 andl $__SYSCALL_MASK, %eax 197 cmpl $__NR_syscall_max, %eax 198#endif 199 ja 1f /* return -ENOSYS (already in pt_regs->ax) */ 200 movq %r10, %rcx 201 202 /* 203 * This call instruction is handled specially in stub_ptregs_64. 204 * It might end up jumping to the slow path. If it jumps, RAX 205 * and all argument registers are clobbered. 206 */ 207 call *sys_call_table(, %rax, 8) 208.Lentry_SYSCALL_64_after_fastpath_call: 209 210 movq %rax, RAX(%rsp) 2111: 212 213 /* 214 * If we get here, then we know that pt_regs is clean for SYSRET64. 215 * If we see that no exit work is required (which we are required 216 * to check with IRQs off), then we can go straight to SYSRET64. 217 */ 218 DISABLE_INTERRUPTS(CLBR_ANY) 219 TRACE_IRQS_OFF 220 movq PER_CPU_VAR(current_task), %r11 221 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11) 222 jnz 1f 223 224 LOCKDEP_SYS_EXIT 225 TRACE_IRQS_ON /* user mode is traced as IRQs on */ 226 movq RIP(%rsp), %rcx 227 movq EFLAGS(%rsp), %r11 228 addq $6*8, %rsp /* skip extra regs -- they were preserved */ 229 UNWIND_HINT_EMPTY 230 jmp .Lpop_c_regs_except_rcx_r11_and_sysret 231 2321: 233 /* 234 * The fast path looked good when we started, but something changed 235 * along the way and we need to switch to the slow path. Calling 236 * raise(3) will trigger this, for example. IRQs are off. 237 */ 238 TRACE_IRQS_ON 239 ENABLE_INTERRUPTS(CLBR_ANY) 240 SAVE_EXTRA_REGS 241 movq %rsp, %rdi 242 call syscall_return_slowpath /* returns with IRQs disabled */ 243 jmp return_from_SYSCALL_64 244 245entry_SYSCALL64_slow_path: 246 /* IRQs are off. */ 247 SAVE_EXTRA_REGS 248 movq %rsp, %rdi 249 call do_syscall_64 /* returns with IRQs disabled */ 250 251return_from_SYSCALL_64: 252 TRACE_IRQS_IRETQ /* we're about to change IF */ 253 254 /* 255 * Try to use SYSRET instead of IRET if we're returning to 256 * a completely clean 64-bit userspace context. If we're not, 257 * go to the slow exit path. 258 */ 259 movq RCX(%rsp), %rcx 260 movq RIP(%rsp), %r11 261 262 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */ 263 jne swapgs_restore_regs_and_return_to_usermode 264 265 /* 266 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP 267 * in kernel space. This essentially lets the user take over 268 * the kernel, since userspace controls RSP. 269 * 270 * If width of "canonical tail" ever becomes variable, this will need 271 * to be updated to remain correct on both old and new CPUs. 272 * 273 * Change top bits to match most significant bit (47th or 56th bit 274 * depending on paging mode) in the address. 275 */ 276 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 277 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx 278 279 /* If this changed %rcx, it was not canonical */ 280 cmpq %rcx, %r11 281 jne swapgs_restore_regs_and_return_to_usermode 282 283 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */ 284 jne swapgs_restore_regs_and_return_to_usermode 285 286 movq R11(%rsp), %r11 287 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */ 288 jne swapgs_restore_regs_and_return_to_usermode 289 290 /* 291 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot 292 * restore RF properly. If the slowpath sets it for whatever reason, we 293 * need to restore it correctly. 294 * 295 * SYSRET can restore TF, but unlike IRET, restoring TF results in a 296 * trap from userspace immediately after SYSRET. This would cause an 297 * infinite loop whenever #DB happens with register state that satisfies 298 * the opportunistic SYSRET conditions. For example, single-stepping 299 * this user code: 300 * 301 * movq $stuck_here, %rcx 302 * pushfq 303 * popq %r11 304 * stuck_here: 305 * 306 * would never get past 'stuck_here'. 307 */ 308 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11 309 jnz swapgs_restore_regs_and_return_to_usermode 310 311 /* nothing to check for RSP */ 312 313 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */ 314 jne swapgs_restore_regs_and_return_to_usermode 315 316 /* 317 * We win! This label is here just for ease of understanding 318 * perf profiles. Nothing jumps here. 319 */ 320syscall_return_via_sysret: 321 /* rcx and r11 are already restored (see code above) */ 322 UNWIND_HINT_EMPTY 323 POP_EXTRA_REGS 324.Lpop_c_regs_except_rcx_r11_and_sysret: 325 popq %rsi /* skip r11 */ 326 popq %r10 327 popq %r9 328 popq %r8 329 popq %rax 330 popq %rsi /* skip rcx */ 331 popq %rdx 332 popq %rsi 333 popq %rdi 334 movq RSP-ORIG_RAX(%rsp), %rsp 335 USERGS_SYSRET64 336END(entry_SYSCALL_64) 337 338ENTRY(stub_ptregs_64) 339 /* 340 * Syscalls marked as needing ptregs land here. 341 * If we are on the fast path, we need to save the extra regs, 342 * which we achieve by trying again on the slow path. If we are on 343 * the slow path, the extra regs are already saved. 344 * 345 * RAX stores a pointer to the C function implementing the syscall. 346 * IRQs are on. 347 */ 348 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp) 349 jne 1f 350 351 /* 352 * Called from fast path -- disable IRQs again, pop return address 353 * and jump to slow path 354 */ 355 DISABLE_INTERRUPTS(CLBR_ANY) 356 TRACE_IRQS_OFF 357 popq %rax 358 UNWIND_HINT_REGS extra=0 359 jmp entry_SYSCALL64_slow_path 360 3611: 362 jmp *%rax /* Called from C */ 363END(stub_ptregs_64) 364 365.macro ptregs_stub func 366ENTRY(ptregs_\func) 367 UNWIND_HINT_FUNC 368 leaq \func(%rip), %rax 369 jmp stub_ptregs_64 370END(ptregs_\func) 371.endm 372 373/* Instantiate ptregs_stub for each ptregs-using syscall */ 374#define __SYSCALL_64_QUAL_(sym) 375#define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym 376#define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym) 377#include <asm/syscalls_64.h> 378 379/* 380 * %rdi: prev task 381 * %rsi: next task 382 */ 383ENTRY(__switch_to_asm) 384 UNWIND_HINT_FUNC 385 /* 386 * Save callee-saved registers 387 * This must match the order in inactive_task_frame 388 */ 389 pushq %rbp 390 pushq %rbx 391 pushq %r12 392 pushq %r13 393 pushq %r14 394 pushq %r15 395 396 /* switch stack */ 397 movq %rsp, TASK_threadsp(%rdi) 398 movq TASK_threadsp(%rsi), %rsp 399 400#ifdef CONFIG_CC_STACKPROTECTOR 401 movq TASK_stack_canary(%rsi), %rbx 402 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset 403#endif 404 405 /* restore callee-saved registers */ 406 popq %r15 407 popq %r14 408 popq %r13 409 popq %r12 410 popq %rbx 411 popq %rbp 412 413 jmp __switch_to 414END(__switch_to_asm) 415 416/* 417 * A newly forked process directly context switches into this address. 418 * 419 * rax: prev task we switched from 420 * rbx: kernel thread func (NULL for user thread) 421 * r12: kernel thread arg 422 */ 423ENTRY(ret_from_fork) 424 UNWIND_HINT_EMPTY 425 movq %rax, %rdi 426 call schedule_tail /* rdi: 'prev' task parameter */ 427 428 testq %rbx, %rbx /* from kernel_thread? */ 429 jnz 1f /* kernel threads are uncommon */ 430 4312: 432 UNWIND_HINT_REGS 433 movq %rsp, %rdi 434 call syscall_return_slowpath /* returns with IRQs disabled */ 435 TRACE_IRQS_ON /* user mode is traced as IRQS on */ 436 jmp swapgs_restore_regs_and_return_to_usermode 437 4381: 439 /* kernel thread */ 440 movq %r12, %rdi 441 call *%rbx 442 /* 443 * A kernel thread is allowed to return here after successfully 444 * calling do_execve(). Exit to userspace to complete the execve() 445 * syscall. 446 */ 447 movq $0, RAX(%rsp) 448 jmp 2b 449END(ret_from_fork) 450 451/* 452 * Build the entry stubs with some assembler magic. 453 * We pack 1 stub into every 8-byte block. 454 */ 455 .align 8 456ENTRY(irq_entries_start) 457 vector=FIRST_EXTERNAL_VECTOR 458 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 459 UNWIND_HINT_IRET_REGS 460 pushq $(~vector+0x80) /* Note: always in signed byte range */ 461 jmp common_interrupt 462 .align 8 463 vector=vector+1 464 .endr 465END(irq_entries_start) 466 467.macro DEBUG_ENTRY_ASSERT_IRQS_OFF 468#ifdef CONFIG_DEBUG_ENTRY 469 pushfq 470 testl $X86_EFLAGS_IF, (%rsp) 471 jz .Lokay_\@ 472 ud2 473.Lokay_\@: 474 addq $8, %rsp 475#endif 476.endm 477 478/* 479 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers 480 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone. 481 * Requires kernel GSBASE. 482 * 483 * The invariant is that, if irq_count != -1, then the IRQ stack is in use. 484 */ 485.macro ENTER_IRQ_STACK regs=1 old_rsp 486 DEBUG_ENTRY_ASSERT_IRQS_OFF 487 movq %rsp, \old_rsp 488 489 .if \regs 490 UNWIND_HINT_REGS base=\old_rsp 491 .endif 492 493 incl PER_CPU_VAR(irq_count) 494 jnz .Lirq_stack_push_old_rsp_\@ 495 496 /* 497 * Right now, if we just incremented irq_count to zero, we've 498 * claimed the IRQ stack but we haven't switched to it yet. 499 * 500 * If anything is added that can interrupt us here without using IST, 501 * it must be *extremely* careful to limit its stack usage. This 502 * could include kprobes and a hypothetical future IST-less #DB 503 * handler. 504 * 505 * The OOPS unwinder relies on the word at the top of the IRQ 506 * stack linking back to the previous RSP for the entire time we're 507 * on the IRQ stack. For this to work reliably, we need to write 508 * it before we actually move ourselves to the IRQ stack. 509 */ 510 511 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8) 512 movq PER_CPU_VAR(irq_stack_ptr), %rsp 513 514#ifdef CONFIG_DEBUG_ENTRY 515 /* 516 * If the first movq above becomes wrong due to IRQ stack layout 517 * changes, the only way we'll notice is if we try to unwind right 518 * here. Assert that we set up the stack right to catch this type 519 * of bug quickly. 520 */ 521 cmpq -8(%rsp), \old_rsp 522 je .Lirq_stack_okay\@ 523 ud2 524 .Lirq_stack_okay\@: 525#endif 526 527.Lirq_stack_push_old_rsp_\@: 528 pushq \old_rsp 529 530 .if \regs 531 UNWIND_HINT_REGS indirect=1 532 .endif 533.endm 534 535/* 536 * Undoes ENTER_IRQ_STACK. 537 */ 538.macro LEAVE_IRQ_STACK regs=1 539 DEBUG_ENTRY_ASSERT_IRQS_OFF 540 /* We need to be off the IRQ stack before decrementing irq_count. */ 541 popq %rsp 542 543 .if \regs 544 UNWIND_HINT_REGS 545 .endif 546 547 /* 548 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming 549 * the irq stack but we're not on it. 550 */ 551 552 decl PER_CPU_VAR(irq_count) 553.endm 554 555/* 556 * Interrupt entry/exit. 557 * 558 * Interrupt entry points save only callee clobbered registers in fast path. 559 * 560 * Entry runs with interrupts off. 561 */ 562 563/* 0(%rsp): ~(interrupt number) */ 564 .macro interrupt func 565 cld 566 ALLOC_PT_GPREGS_ON_STACK 567 SAVE_C_REGS 568 SAVE_EXTRA_REGS 569 ENCODE_FRAME_POINTER 570 571 testb $3, CS(%rsp) 572 jz 1f 573 574 /* 575 * IRQ from user mode. Switch to kernel gsbase and inform context 576 * tracking that we're in kernel mode. 577 */ 578 SWAPGS 579 580 /* 581 * We need to tell lockdep that IRQs are off. We can't do this until 582 * we fix gsbase, and we should do it before enter_from_user_mode 583 * (which can take locks). Since TRACE_IRQS_OFF idempotent, 584 * the simplest way to handle it is to just call it twice if 585 * we enter from user mode. There's no reason to optimize this since 586 * TRACE_IRQS_OFF is a no-op if lockdep is off. 587 */ 588 TRACE_IRQS_OFF 589 590 CALL_enter_from_user_mode 591 5921: 593 ENTER_IRQ_STACK old_rsp=%rdi 594 /* We entered an interrupt context - irqs are off: */ 595 TRACE_IRQS_OFF 596 597 call \func /* rdi points to pt_regs */ 598 .endm 599 600 /* 601 * The interrupt stubs push (~vector+0x80) onto the stack and 602 * then jump to common_interrupt. 603 */ 604 .p2align CONFIG_X86_L1_CACHE_SHIFT 605common_interrupt: 606 ASM_CLAC 607 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */ 608 interrupt do_IRQ 609 /* 0(%rsp): old RSP */ 610ret_from_intr: 611 DISABLE_INTERRUPTS(CLBR_ANY) 612 TRACE_IRQS_OFF 613 614 LEAVE_IRQ_STACK 615 616 testb $3, CS(%rsp) 617 jz retint_kernel 618 619 /* Interrupt came from user space */ 620GLOBAL(retint_user) 621 mov %rsp,%rdi 622 call prepare_exit_to_usermode 623 TRACE_IRQS_IRETQ 624 625GLOBAL(swapgs_restore_regs_and_return_to_usermode) 626#ifdef CONFIG_DEBUG_ENTRY 627 /* Assert that pt_regs indicates user mode. */ 628 testb $3, CS(%rsp) 629 jnz 1f 630 ud2 6311: 632#endif 633 SWAPGS 634 POP_EXTRA_REGS 635 POP_C_REGS 636 addq $8, %rsp /* skip regs->orig_ax */ 637 INTERRUPT_RETURN 638 639 640/* Returning to kernel space */ 641retint_kernel: 642#ifdef CONFIG_PREEMPT 643 /* Interrupts are off */ 644 /* Check if we need preemption */ 645 bt $9, EFLAGS(%rsp) /* were interrupts off? */ 646 jnc 1f 6470: cmpl $0, PER_CPU_VAR(__preempt_count) 648 jnz 1f 649 call preempt_schedule_irq 650 jmp 0b 6511: 652#endif 653 /* 654 * The iretq could re-enable interrupts: 655 */ 656 TRACE_IRQS_IRETQ 657 658GLOBAL(restore_regs_and_return_to_kernel) 659#ifdef CONFIG_DEBUG_ENTRY 660 /* Assert that pt_regs indicates kernel mode. */ 661 testb $3, CS(%rsp) 662 jz 1f 663 ud2 6641: 665#endif 666 POP_EXTRA_REGS 667 POP_C_REGS 668 addq $8, %rsp /* skip regs->orig_ax */ 669 INTERRUPT_RETURN 670 671ENTRY(native_iret) 672 UNWIND_HINT_IRET_REGS 673 /* 674 * Are we returning to a stack segment from the LDT? Note: in 675 * 64-bit mode SS:RSP on the exception stack is always valid. 676 */ 677#ifdef CONFIG_X86_ESPFIX64 678 testb $4, (SS-RIP)(%rsp) 679 jnz native_irq_return_ldt 680#endif 681 682.global native_irq_return_iret 683native_irq_return_iret: 684 /* 685 * This may fault. Non-paranoid faults on return to userspace are 686 * handled by fixup_bad_iret. These include #SS, #GP, and #NP. 687 * Double-faults due to espfix64 are handled in do_double_fault. 688 * Other faults here are fatal. 689 */ 690 iretq 691 692#ifdef CONFIG_X86_ESPFIX64 693native_irq_return_ldt: 694 /* 695 * We are running with user GSBASE. All GPRs contain their user 696 * values. We have a percpu ESPFIX stack that is eight slots 697 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom 698 * of the ESPFIX stack. 699 * 700 * We clobber RAX and RDI in this code. We stash RDI on the 701 * normal stack and RAX on the ESPFIX stack. 702 * 703 * The ESPFIX stack layout we set up looks like this: 704 * 705 * --- top of ESPFIX stack --- 706 * SS 707 * RSP 708 * RFLAGS 709 * CS 710 * RIP <-- RSP points here when we're done 711 * RAX <-- espfix_waddr points here 712 * --- bottom of ESPFIX stack --- 713 */ 714 715 pushq %rdi /* Stash user RDI */ 716 SWAPGS 717 movq PER_CPU_VAR(espfix_waddr), %rdi 718 movq %rax, (0*8)(%rdi) /* user RAX */ 719 movq (1*8)(%rsp), %rax /* user RIP */ 720 movq %rax, (1*8)(%rdi) 721 movq (2*8)(%rsp), %rax /* user CS */ 722 movq %rax, (2*8)(%rdi) 723 movq (3*8)(%rsp), %rax /* user RFLAGS */ 724 movq %rax, (3*8)(%rdi) 725 movq (5*8)(%rsp), %rax /* user SS */ 726 movq %rax, (5*8)(%rdi) 727 movq (4*8)(%rsp), %rax /* user RSP */ 728 movq %rax, (4*8)(%rdi) 729 /* Now RAX == RSP. */ 730 731 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */ 732 popq %rdi /* Restore user RDI */ 733 734 /* 735 * espfix_stack[31:16] == 0. The page tables are set up such that 736 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of 737 * espfix_waddr for any X. That is, there are 65536 RO aliases of 738 * the same page. Set up RSP so that RSP[31:16] contains the 739 * respective 16 bits of the /userspace/ RSP and RSP nonetheless 740 * still points to an RO alias of the ESPFIX stack. 741 */ 742 orq PER_CPU_VAR(espfix_stack), %rax 743 SWAPGS 744 movq %rax, %rsp 745 UNWIND_HINT_IRET_REGS offset=8 746 747 /* 748 * At this point, we cannot write to the stack any more, but we can 749 * still read. 750 */ 751 popq %rax /* Restore user RAX */ 752 753 /* 754 * RSP now points to an ordinary IRET frame, except that the page 755 * is read-only and RSP[31:16] are preloaded with the userspace 756 * values. We can now IRET back to userspace. 757 */ 758 jmp native_irq_return_iret 759#endif 760END(common_interrupt) 761 762/* 763 * APIC interrupts. 764 */ 765.macro apicinterrupt3 num sym do_sym 766ENTRY(\sym) 767 UNWIND_HINT_IRET_REGS 768 ASM_CLAC 769 pushq $~(\num) 770.Lcommon_\sym: 771 interrupt \do_sym 772 jmp ret_from_intr 773END(\sym) 774.endm 775 776/* Make sure APIC interrupt handlers end up in the irqentry section: */ 777#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax" 778#define POP_SECTION_IRQENTRY .popsection 779 780.macro apicinterrupt num sym do_sym 781PUSH_SECTION_IRQENTRY 782apicinterrupt3 \num \sym \do_sym 783POP_SECTION_IRQENTRY 784.endm 785 786#ifdef CONFIG_SMP 787apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 788apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt 789#endif 790 791#ifdef CONFIG_X86_UV 792apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt 793#endif 794 795apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt 796apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi 797 798#ifdef CONFIG_HAVE_KVM 799apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi 800apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi 801apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi 802#endif 803 804#ifdef CONFIG_X86_MCE_THRESHOLD 805apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt 806#endif 807 808#ifdef CONFIG_X86_MCE_AMD 809apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt 810#endif 811 812#ifdef CONFIG_X86_THERMAL_VECTOR 813apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt 814#endif 815 816#ifdef CONFIG_SMP 817apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt 818apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt 819apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt 820#endif 821 822apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt 823apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt 824 825#ifdef CONFIG_IRQ_WORK 826apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt 827#endif 828 829/* 830 * Exception entry points. 831 */ 832#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) 833 834.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 835ENTRY(\sym) 836 UNWIND_HINT_IRET_REGS offset=\has_error_code*8 837 838 /* Sanity check */ 839 .if \shift_ist != -1 && \paranoid == 0 840 .error "using shift_ist requires paranoid=1" 841 .endif 842 843 ASM_CLAC 844 845 .if \has_error_code == 0 846 pushq $-1 /* ORIG_RAX: no syscall to restart */ 847 .endif 848 849 ALLOC_PT_GPREGS_ON_STACK 850 851 .if \paranoid 852 .if \paranoid == 1 853 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */ 854 jnz 1f 855 .endif 856 call paranoid_entry 857 .else 858 call error_entry 859 .endif 860 UNWIND_HINT_REGS 861 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ 862 863 .if \paranoid 864 .if \shift_ist != -1 865 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ 866 .else 867 TRACE_IRQS_OFF 868 .endif 869 .endif 870 871 movq %rsp, %rdi /* pt_regs pointer */ 872 873 .if \has_error_code 874 movq ORIG_RAX(%rsp), %rsi /* get error code */ 875 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 876 .else 877 xorl %esi, %esi /* no error code */ 878 .endif 879 880 .if \shift_ist != -1 881 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 882 .endif 883 884 call \do_sym 885 886 .if \shift_ist != -1 887 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) 888 .endif 889 890 /* these procedures expect "no swapgs" flag in ebx */ 891 .if \paranoid 892 jmp paranoid_exit 893 .else 894 jmp error_exit 895 .endif 896 897 .if \paranoid == 1 898 /* 899 * Paranoid entry from userspace. Switch stacks and treat it 900 * as a normal entry. This means that paranoid handlers 901 * run in real process context if user_mode(regs). 902 */ 9031: 904 call error_entry 905 906 907 movq %rsp, %rdi /* pt_regs pointer */ 908 call sync_regs 909 movq %rax, %rsp /* switch stack */ 910 911 movq %rsp, %rdi /* pt_regs pointer */ 912 913 .if \has_error_code 914 movq ORIG_RAX(%rsp), %rsi /* get error code */ 915 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */ 916 .else 917 xorl %esi, %esi /* no error code */ 918 .endif 919 920 call \do_sym 921 922 jmp error_exit /* %ebx: no swapgs flag */ 923 .endif 924END(\sym) 925.endm 926 927idtentry divide_error do_divide_error has_error_code=0 928idtentry overflow do_overflow has_error_code=0 929idtentry bounds do_bounds has_error_code=0 930idtentry invalid_op do_invalid_op has_error_code=0 931idtentry device_not_available do_device_not_available has_error_code=0 932idtentry double_fault do_double_fault has_error_code=1 paranoid=2 933idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 934idtentry invalid_TSS do_invalid_TSS has_error_code=1 935idtentry segment_not_present do_segment_not_present has_error_code=1 936idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 937idtentry coprocessor_error do_coprocessor_error has_error_code=0 938idtentry alignment_check do_alignment_check has_error_code=1 939idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 940 941 942 /* 943 * Reload gs selector with exception handling 944 * edi: new selector 945 */ 946ENTRY(native_load_gs_index) 947 FRAME_BEGIN 948 pushfq 949 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) 950 TRACE_IRQS_OFF 951 SWAPGS 952.Lgs_change: 953 movl %edi, %gs 9542: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE 955 SWAPGS 956 TRACE_IRQS_FLAGS (%rsp) 957 popfq 958 FRAME_END 959 ret 960ENDPROC(native_load_gs_index) 961EXPORT_SYMBOL(native_load_gs_index) 962 963 _ASM_EXTABLE(.Lgs_change, bad_gs) 964 .section .fixup, "ax" 965 /* running with kernelgs */ 966bad_gs: 967 SWAPGS /* switch back to user gs */ 968.macro ZAP_GS 969 /* This can't be a string because the preprocessor needs to see it. */ 970 movl $__USER_DS, %eax 971 movl %eax, %gs 972.endm 973 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG 974 xorl %eax, %eax 975 movl %eax, %gs 976 jmp 2b 977 .previous 978 979/* Call softirq on interrupt stack. Interrupts are off. */ 980ENTRY(do_softirq_own_stack) 981 pushq %rbp 982 mov %rsp, %rbp 983 ENTER_IRQ_STACK regs=0 old_rsp=%r11 984 call __do_softirq 985 LEAVE_IRQ_STACK regs=0 986 leaveq 987 ret 988ENDPROC(do_softirq_own_stack) 989 990#ifdef CONFIG_XEN 991idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0 992 993/* 994 * A note on the "critical region" in our callback handler. 995 * We want to avoid stacking callback handlers due to events occurring 996 * during handling of the last event. To do this, we keep events disabled 997 * until we've done all processing. HOWEVER, we must enable events before 998 * popping the stack frame (can't be done atomically) and so it would still 999 * be possible to get enough handler activations to overflow the stack. 1000 * Although unlikely, bugs of that kind are hard to track down, so we'd 1001 * like to avoid the possibility. 1002 * So, on entry to the handler we detect whether we interrupted an 1003 * existing activation in its critical region -- if so, we pop the current 1004 * activation and restart the handler using the previous one. 1005 */ 1006ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */ 1007 1008/* 1009 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will 1010 * see the correct pointer to the pt_regs 1011 */ 1012 UNWIND_HINT_FUNC 1013 movq %rdi, %rsp /* we don't return, adjust the stack frame */ 1014 UNWIND_HINT_REGS 1015 1016 ENTER_IRQ_STACK old_rsp=%r10 1017 call xen_evtchn_do_upcall 1018 LEAVE_IRQ_STACK 1019 1020#ifndef CONFIG_PREEMPT 1021 call xen_maybe_preempt_hcall 1022#endif 1023 jmp error_exit 1024END(xen_do_hypervisor_callback) 1025 1026/* 1027 * Hypervisor uses this for application faults while it executes. 1028 * We get here for two reasons: 1029 * 1. Fault while reloading DS, ES, FS or GS 1030 * 2. Fault while executing IRET 1031 * Category 1 we do not need to fix up as Xen has already reloaded all segment 1032 * registers that could be reloaded and zeroed the others. 1033 * Category 2 we fix up by killing the current process. We cannot use the 1034 * normal Linux return path in this case because if we use the IRET hypercall 1035 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 1036 * We distinguish between categories by comparing each saved segment register 1037 * with its current contents: any discrepancy means we in category 1. 1038 */ 1039ENTRY(xen_failsafe_callback) 1040 UNWIND_HINT_EMPTY 1041 movl %ds, %ecx 1042 cmpw %cx, 0x10(%rsp) 1043 jne 1f 1044 movl %es, %ecx 1045 cmpw %cx, 0x18(%rsp) 1046 jne 1f 1047 movl %fs, %ecx 1048 cmpw %cx, 0x20(%rsp) 1049 jne 1f 1050 movl %gs, %ecx 1051 cmpw %cx, 0x28(%rsp) 1052 jne 1f 1053 /* All segments match their saved values => Category 2 (Bad IRET). */ 1054 movq (%rsp), %rcx 1055 movq 8(%rsp), %r11 1056 addq $0x30, %rsp 1057 pushq $0 /* RIP */ 1058 UNWIND_HINT_IRET_REGS offset=8 1059 jmp general_protection 10601: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ 1061 movq (%rsp), %rcx 1062 movq 8(%rsp), %r11 1063 addq $0x30, %rsp 1064 UNWIND_HINT_IRET_REGS 1065 pushq $-1 /* orig_ax = -1 => not a system call */ 1066 ALLOC_PT_GPREGS_ON_STACK 1067 SAVE_C_REGS 1068 SAVE_EXTRA_REGS 1069 ENCODE_FRAME_POINTER 1070 jmp error_exit 1071END(xen_failsafe_callback) 1072 1073apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1074 xen_hvm_callback_vector xen_evtchn_do_upcall 1075 1076#endif /* CONFIG_XEN */ 1077 1078#if IS_ENABLED(CONFIG_HYPERV) 1079apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ 1080 hyperv_callback_vector hyperv_vector_handler 1081#endif /* CONFIG_HYPERV */ 1082 1083idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1084idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 1085idtentry stack_segment do_stack_segment has_error_code=1 1086 1087#ifdef CONFIG_XEN 1088idtentry xennmi do_nmi has_error_code=0 1089idtentry xendebug do_debug has_error_code=0 1090idtentry xenint3 do_int3 has_error_code=0 1091#endif 1092 1093idtentry general_protection do_general_protection has_error_code=1 1094idtentry page_fault do_page_fault has_error_code=1 1095 1096#ifdef CONFIG_KVM_GUEST 1097idtentry async_page_fault do_async_page_fault has_error_code=1 1098#endif 1099 1100#ifdef CONFIG_X86_MCE 1101idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) 1102#endif 1103 1104/* 1105 * Save all registers in pt_regs, and switch gs if needed. 1106 * Use slow, but surefire "are we in kernel?" check. 1107 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise 1108 */ 1109ENTRY(paranoid_entry) 1110 UNWIND_HINT_FUNC 1111 cld 1112 SAVE_C_REGS 8 1113 SAVE_EXTRA_REGS 8 1114 ENCODE_FRAME_POINTER 8 1115 movl $1, %ebx 1116 movl $MSR_GS_BASE, %ecx 1117 rdmsr 1118 testl %edx, %edx 1119 js 1f /* negative -> in kernel */ 1120 SWAPGS 1121 xorl %ebx, %ebx 11221: ret 1123END(paranoid_entry) 1124 1125/* 1126 * "Paranoid" exit path from exception stack. This is invoked 1127 * only on return from non-NMI IST interrupts that came 1128 * from kernel space. 1129 * 1130 * We may be returning to very strange contexts (e.g. very early 1131 * in syscall entry), so checking for preemption here would 1132 * be complicated. Fortunately, we there's no good reason 1133 * to try to handle preemption here. 1134 * 1135 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) 1136 */ 1137ENTRY(paranoid_exit) 1138 UNWIND_HINT_REGS 1139 DISABLE_INTERRUPTS(CLBR_ANY) 1140 TRACE_IRQS_OFF_DEBUG 1141 testl %ebx, %ebx /* swapgs needed? */ 1142 jnz .Lparanoid_exit_no_swapgs 1143 TRACE_IRQS_IRETQ 1144 SWAPGS_UNSAFE_STACK 1145 jmp .Lparanoid_exit_restore 1146.Lparanoid_exit_no_swapgs: 1147 TRACE_IRQS_IRETQ_DEBUG 1148.Lparanoid_exit_restore: 1149 jmp restore_regs_and_return_to_kernel 1150END(paranoid_exit) 1151 1152/* 1153 * Save all registers in pt_regs, and switch gs if needed. 1154 * Return: EBX=0: came from user mode; EBX=1: otherwise 1155 */ 1156ENTRY(error_entry) 1157 UNWIND_HINT_FUNC 1158 cld 1159 SAVE_C_REGS 8 1160 SAVE_EXTRA_REGS 8 1161 ENCODE_FRAME_POINTER 8 1162 xorl %ebx, %ebx 1163 testb $3, CS+8(%rsp) 1164 jz .Lerror_kernelspace 1165 1166 /* 1167 * We entered from user mode or we're pretending to have entered 1168 * from user mode due to an IRET fault. 1169 */ 1170 SWAPGS 1171 1172.Lerror_entry_from_usermode_after_swapgs: 1173 /* 1174 * We need to tell lockdep that IRQs are off. We can't do this until 1175 * we fix gsbase, and we should do it before enter_from_user_mode 1176 * (which can take locks). 1177 */ 1178 TRACE_IRQS_OFF 1179 CALL_enter_from_user_mode 1180 ret 1181 1182.Lerror_entry_done: 1183 TRACE_IRQS_OFF 1184 ret 1185 1186 /* 1187 * There are two places in the kernel that can potentially fault with 1188 * usergs. Handle them here. B stepping K8s sometimes report a 1189 * truncated RIP for IRET exceptions returning to compat mode. Check 1190 * for these here too. 1191 */ 1192.Lerror_kernelspace: 1193 incl %ebx 1194 leaq native_irq_return_iret(%rip), %rcx 1195 cmpq %rcx, RIP+8(%rsp) 1196 je .Lerror_bad_iret 1197 movl %ecx, %eax /* zero extend */ 1198 cmpq %rax, RIP+8(%rsp) 1199 je .Lbstep_iret 1200 cmpq $.Lgs_change, RIP+8(%rsp) 1201 jne .Lerror_entry_done 1202 1203 /* 1204 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up 1205 * gsbase and proceed. We'll fix up the exception and land in 1206 * .Lgs_change's error handler with kernel gsbase. 1207 */ 1208 SWAPGS 1209 jmp .Lerror_entry_done 1210 1211.Lbstep_iret: 1212 /* Fix truncated RIP */ 1213 movq %rcx, RIP+8(%rsp) 1214 /* fall through */ 1215 1216.Lerror_bad_iret: 1217 /* 1218 * We came from an IRET to user mode, so we have user gsbase. 1219 * Switch to kernel gsbase: 1220 */ 1221 SWAPGS 1222 1223 /* 1224 * Pretend that the exception came from user mode: set up pt_regs 1225 * as if we faulted immediately after IRET and clear EBX so that 1226 * error_exit knows that we will be returning to user mode. 1227 */ 1228 mov %rsp, %rdi 1229 call fixup_bad_iret 1230 mov %rax, %rsp 1231 decl %ebx 1232 jmp .Lerror_entry_from_usermode_after_swapgs 1233END(error_entry) 1234 1235 1236/* 1237 * On entry, EBX is a "return to kernel mode" flag: 1238 * 1: already in kernel mode, don't need SWAPGS 1239 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode 1240 */ 1241ENTRY(error_exit) 1242 UNWIND_HINT_REGS 1243 DISABLE_INTERRUPTS(CLBR_ANY) 1244 TRACE_IRQS_OFF 1245 testl %ebx, %ebx 1246 jnz retint_kernel 1247 jmp retint_user 1248END(error_exit) 1249 1250/* 1251 * Runs on exception stack. Xen PV does not go through this path at all, 1252 * so we can use real assembly here. 1253 */ 1254ENTRY(nmi) 1255 UNWIND_HINT_IRET_REGS 1256 1257 /* 1258 * We allow breakpoints in NMIs. If a breakpoint occurs, then 1259 * the iretq it performs will take us out of NMI context. 1260 * This means that we can have nested NMIs where the next 1261 * NMI is using the top of the stack of the previous NMI. We 1262 * can't let it execute because the nested NMI will corrupt the 1263 * stack of the previous NMI. NMI handlers are not re-entrant 1264 * anyway. 1265 * 1266 * To handle this case we do the following: 1267 * Check the a special location on the stack that contains 1268 * a variable that is set when NMIs are executing. 1269 * The interrupted task's stack is also checked to see if it 1270 * is an NMI stack. 1271 * If the variable is not set and the stack is not the NMI 1272 * stack then: 1273 * o Set the special variable on the stack 1274 * o Copy the interrupt frame into an "outermost" location on the 1275 * stack 1276 * o Copy the interrupt frame into an "iret" location on the stack 1277 * o Continue processing the NMI 1278 * If the variable is set or the previous stack is the NMI stack: 1279 * o Modify the "iret" location to jump to the repeat_nmi 1280 * o return back to the first NMI 1281 * 1282 * Now on exit of the first NMI, we first clear the stack variable 1283 * The NMI stack will tell any nested NMIs at that point that it is 1284 * nested. Then we pop the stack normally with iret, and if there was 1285 * a nested NMI that updated the copy interrupt stack frame, a 1286 * jump will be made to the repeat_nmi code that will handle the second 1287 * NMI. 1288 * 1289 * However, espfix prevents us from directly returning to userspace 1290 * with a single IRET instruction. Similarly, IRET to user mode 1291 * can fault. We therefore handle NMIs from user space like 1292 * other IST entries. 1293 */ 1294 1295 ASM_CLAC 1296 1297 /* Use %rdx as our temp variable throughout */ 1298 pushq %rdx 1299 1300 testb $3, CS-RIP+8(%rsp) 1301 jz .Lnmi_from_kernel 1302 1303 /* 1304 * NMI from user mode. We need to run on the thread stack, but we 1305 * can't go through the normal entry paths: NMIs are masked, and 1306 * we don't want to enable interrupts, because then we'll end 1307 * up in an awkward situation in which IRQs are on but NMIs 1308 * are off. 1309 * 1310 * We also must not push anything to the stack before switching 1311 * stacks lest we corrupt the "NMI executing" variable. 1312 */ 1313 1314 swapgs 1315 cld 1316 movq %rsp, %rdx 1317 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp 1318 UNWIND_HINT_IRET_REGS base=%rdx offset=8 1319 pushq 5*8(%rdx) /* pt_regs->ss */ 1320 pushq 4*8(%rdx) /* pt_regs->rsp */ 1321 pushq 3*8(%rdx) /* pt_regs->flags */ 1322 pushq 2*8(%rdx) /* pt_regs->cs */ 1323 pushq 1*8(%rdx) /* pt_regs->rip */ 1324 UNWIND_HINT_IRET_REGS 1325 pushq $-1 /* pt_regs->orig_ax */ 1326 pushq %rdi /* pt_regs->di */ 1327 pushq %rsi /* pt_regs->si */ 1328 pushq (%rdx) /* pt_regs->dx */ 1329 pushq %rcx /* pt_regs->cx */ 1330 pushq %rax /* pt_regs->ax */ 1331 pushq %r8 /* pt_regs->r8 */ 1332 pushq %r9 /* pt_regs->r9 */ 1333 pushq %r10 /* pt_regs->r10 */ 1334 pushq %r11 /* pt_regs->r11 */ 1335 pushq %rbx /* pt_regs->rbx */ 1336 pushq %rbp /* pt_regs->rbp */ 1337 pushq %r12 /* pt_regs->r12 */ 1338 pushq %r13 /* pt_regs->r13 */ 1339 pushq %r14 /* pt_regs->r14 */ 1340 pushq %r15 /* pt_regs->r15 */ 1341 UNWIND_HINT_REGS 1342 ENCODE_FRAME_POINTER 1343 1344 /* 1345 * At this point we no longer need to worry about stack damage 1346 * due to nesting -- we're on the normal thread stack and we're 1347 * done with the NMI stack. 1348 */ 1349 1350 movq %rsp, %rdi 1351 movq $-1, %rsi 1352 call do_nmi 1353 1354 /* 1355 * Return back to user mode. We must *not* do the normal exit 1356 * work, because we don't want to enable interrupts. 1357 */ 1358 jmp swapgs_restore_regs_and_return_to_usermode 1359 1360.Lnmi_from_kernel: 1361 /* 1362 * Here's what our stack frame will look like: 1363 * +---------------------------------------------------------+ 1364 * | original SS | 1365 * | original Return RSP | 1366 * | original RFLAGS | 1367 * | original CS | 1368 * | original RIP | 1369 * +---------------------------------------------------------+ 1370 * | temp storage for rdx | 1371 * +---------------------------------------------------------+ 1372 * | "NMI executing" variable | 1373 * +---------------------------------------------------------+ 1374 * | iret SS } Copied from "outermost" frame | 1375 * | iret Return RSP } on each loop iteration; overwritten | 1376 * | iret RFLAGS } by a nested NMI to force another | 1377 * | iret CS } iteration if needed. | 1378 * | iret RIP } | 1379 * +---------------------------------------------------------+ 1380 * | outermost SS } initialized in first_nmi; | 1381 * | outermost Return RSP } will not be changed before | 1382 * | outermost RFLAGS } NMI processing is done. | 1383 * | outermost CS } Copied to "iret" frame on each | 1384 * | outermost RIP } iteration. | 1385 * +---------------------------------------------------------+ 1386 * | pt_regs | 1387 * +---------------------------------------------------------+ 1388 * 1389 * The "original" frame is used by hardware. Before re-enabling 1390 * NMIs, we need to be done with it, and we need to leave enough 1391 * space for the asm code here. 1392 * 1393 * We return by executing IRET while RSP points to the "iret" frame. 1394 * That will either return for real or it will loop back into NMI 1395 * processing. 1396 * 1397 * The "outermost" frame is copied to the "iret" frame on each 1398 * iteration of the loop, so each iteration starts with the "iret" 1399 * frame pointing to the final return target. 1400 */ 1401 1402 /* 1403 * Determine whether we're a nested NMI. 1404 * 1405 * If we interrupted kernel code between repeat_nmi and 1406 * end_repeat_nmi, then we are a nested NMI. We must not 1407 * modify the "iret" frame because it's being written by 1408 * the outer NMI. That's okay; the outer NMI handler is 1409 * about to about to call do_nmi anyway, so we can just 1410 * resume the outer NMI. 1411 */ 1412 1413 movq $repeat_nmi, %rdx 1414 cmpq 8(%rsp), %rdx 1415 ja 1f 1416 movq $end_repeat_nmi, %rdx 1417 cmpq 8(%rsp), %rdx 1418 ja nested_nmi_out 14191: 1420 1421 /* 1422 * Now check "NMI executing". If it's set, then we're nested. 1423 * This will not detect if we interrupted an outer NMI just 1424 * before IRET. 1425 */ 1426 cmpl $1, -8(%rsp) 1427 je nested_nmi 1428 1429 /* 1430 * Now test if the previous stack was an NMI stack. This covers 1431 * the case where we interrupt an outer NMI after it clears 1432 * "NMI executing" but before IRET. We need to be careful, though: 1433 * there is one case in which RSP could point to the NMI stack 1434 * despite there being no NMI active: naughty userspace controls 1435 * RSP at the very beginning of the SYSCALL targets. We can 1436 * pull a fast one on naughty userspace, though: we program 1437 * SYSCALL to mask DF, so userspace cannot cause DF to be set 1438 * if it controls the kernel's RSP. We set DF before we clear 1439 * "NMI executing". 1440 */ 1441 lea 6*8(%rsp), %rdx 1442 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */ 1443 cmpq %rdx, 4*8(%rsp) 1444 /* If the stack pointer is above the NMI stack, this is a normal NMI */ 1445 ja first_nmi 1446 1447 subq $EXCEPTION_STKSZ, %rdx 1448 cmpq %rdx, 4*8(%rsp) 1449 /* If it is below the NMI stack, it is a normal NMI */ 1450 jb first_nmi 1451 1452 /* Ah, it is within the NMI stack. */ 1453 1454 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp) 1455 jz first_nmi /* RSP was user controlled. */ 1456 1457 /* This is a nested NMI. */ 1458 1459nested_nmi: 1460 /* 1461 * Modify the "iret" frame to point to repeat_nmi, forcing another 1462 * iteration of NMI handling. 1463 */ 1464 subq $8, %rsp 1465 leaq -10*8(%rsp), %rdx 1466 pushq $__KERNEL_DS 1467 pushq %rdx 1468 pushfq 1469 pushq $__KERNEL_CS 1470 pushq $repeat_nmi 1471 1472 /* Put stack back */ 1473 addq $(6*8), %rsp 1474 1475nested_nmi_out: 1476 popq %rdx 1477 1478 /* We are returning to kernel mode, so this cannot result in a fault. */ 1479 iretq 1480 1481first_nmi: 1482 /* Restore rdx. */ 1483 movq (%rsp), %rdx 1484 1485 /* Make room for "NMI executing". */ 1486 pushq $0 1487 1488 /* Leave room for the "iret" frame */ 1489 subq $(5*8), %rsp 1490 1491 /* Copy the "original" frame to the "outermost" frame */ 1492 .rept 5 1493 pushq 11*8(%rsp) 1494 .endr 1495 UNWIND_HINT_IRET_REGS 1496 1497 /* Everything up to here is safe from nested NMIs */ 1498 1499#ifdef CONFIG_DEBUG_ENTRY 1500 /* 1501 * For ease of testing, unmask NMIs right away. Disabled by 1502 * default because IRET is very expensive. 1503 */ 1504 pushq $0 /* SS */ 1505 pushq %rsp /* RSP (minus 8 because of the previous push) */ 1506 addq $8, (%rsp) /* Fix up RSP */ 1507 pushfq /* RFLAGS */ 1508 pushq $__KERNEL_CS /* CS */ 1509 pushq $1f /* RIP */ 1510 iretq /* continues at repeat_nmi below */ 1511 UNWIND_HINT_IRET_REGS 15121: 1513#endif 1514 1515repeat_nmi: 1516 /* 1517 * If there was a nested NMI, the first NMI's iret will return 1518 * here. But NMIs are still enabled and we can take another 1519 * nested NMI. The nested NMI checks the interrupted RIP to see 1520 * if it is between repeat_nmi and end_repeat_nmi, and if so 1521 * it will just return, as we are about to repeat an NMI anyway. 1522 * This makes it safe to copy to the stack frame that a nested 1523 * NMI will update. 1524 * 1525 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if 1526 * we're repeating an NMI, gsbase has the same value that it had on 1527 * the first iteration. paranoid_entry will load the kernel 1528 * gsbase if needed before we call do_nmi. "NMI executing" 1529 * is zero. 1530 */ 1531 movq $1, 10*8(%rsp) /* Set "NMI executing". */ 1532 1533 /* 1534 * Copy the "outermost" frame to the "iret" frame. NMIs that nest 1535 * here must not modify the "iret" frame while we're writing to 1536 * it or it will end up containing garbage. 1537 */ 1538 addq $(10*8), %rsp 1539 .rept 5 1540 pushq -6*8(%rsp) 1541 .endr 1542 subq $(5*8), %rsp 1543end_repeat_nmi: 1544 1545 /* 1546 * Everything below this point can be preempted by a nested NMI. 1547 * If this happens, then the inner NMI will change the "iret" 1548 * frame to point back to repeat_nmi. 1549 */ 1550 pushq $-1 /* ORIG_RAX: no syscall to restart */ 1551 ALLOC_PT_GPREGS_ON_STACK 1552 1553 /* 1554 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit 1555 * as we should not be calling schedule in NMI context. 1556 * Even with normal interrupts enabled. An NMI should not be 1557 * setting NEED_RESCHED or anything that normal interrupts and 1558 * exceptions might do. 1559 */ 1560 call paranoid_entry 1561 UNWIND_HINT_REGS 1562 1563 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ 1564 movq %rsp, %rdi 1565 movq $-1, %rsi 1566 call do_nmi 1567 1568 testl %ebx, %ebx /* swapgs needed? */ 1569 jnz nmi_restore 1570nmi_swapgs: 1571 SWAPGS_UNSAFE_STACK 1572nmi_restore: 1573 POP_EXTRA_REGS 1574 POP_C_REGS 1575 1576 /* 1577 * Skip orig_ax and the "outermost" frame to point RSP at the "iret" 1578 * at the "iret" frame. 1579 */ 1580 addq $6*8, %rsp 1581 1582 /* 1583 * Clear "NMI executing". Set DF first so that we can easily 1584 * distinguish the remaining code between here and IRET from 1585 * the SYSCALL entry and exit paths. 1586 * 1587 * We arguably should just inspect RIP instead, but I (Andy) wrote 1588 * this code when I had the misapprehension that Xen PV supported 1589 * NMIs, and Xen PV would break that approach. 1590 */ 1591 std 1592 movq $0, 5*8(%rsp) /* clear "NMI executing" */ 1593 1594 /* 1595 * iretq reads the "iret" frame and exits the NMI stack in a 1596 * single instruction. We are returning to kernel mode, so this 1597 * cannot result in a fault. Similarly, we don't need to worry 1598 * about espfix64 on the way back to kernel mode. 1599 */ 1600 iretq 1601END(nmi) 1602 1603ENTRY(ignore_sysret) 1604 UNWIND_HINT_EMPTY 1605 mov $-ENOSYS, %eax 1606 sysret 1607END(ignore_sysret) 1608 1609ENTRY(rewind_stack_do_exit) 1610 UNWIND_HINT_FUNC 1611 /* Prevent any naive code from trying to unwind to our caller. */ 1612 xorl %ebp, %ebp 1613 1614 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax 1615 leaq -PTREGS_SIZE(%rax), %rsp 1616 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE 1617 1618 call do_exit 1619END(rewind_stack_do_exit) 1620