1/* 2 * Copyright (C) 1991,1992 Linus Torvalds 3 * 4 * entry_32.S contains the system-call and low-level fault and trap handling routines. 5 * 6 * Stack layout while running C code: 7 * ptrace needs to have all registers on the stack. 8 * If the order here is changed, it needs to be 9 * updated in fork.c:copy_process(), signal.c:do_signal(), 10 * ptrace.c and ptrace.h 11 * 12 * 0(%esp) - %ebx 13 * 4(%esp) - %ecx 14 * 8(%esp) - %edx 15 * C(%esp) - %esi 16 * 10(%esp) - %edi 17 * 14(%esp) - %ebp 18 * 18(%esp) - %eax 19 * 1C(%esp) - %ds 20 * 20(%esp) - %es 21 * 24(%esp) - %fs 22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS 23 * 2C(%esp) - orig_eax 24 * 30(%esp) - %eip 25 * 34(%esp) - %cs 26 * 38(%esp) - %eflags 27 * 3C(%esp) - %oldesp 28 * 40(%esp) - %oldss 29 */ 30 31#include <linux/linkage.h> 32#include <linux/err.h> 33#include <asm/thread_info.h> 34#include <asm/irqflags.h> 35#include <asm/errno.h> 36#include <asm/segment.h> 37#include <asm/smp.h> 38#include <asm/percpu.h> 39#include <asm/processor-flags.h> 40#include <asm/irq_vectors.h> 41#include <asm/cpufeatures.h> 42#include <asm/alternative-asm.h> 43#include <asm/asm.h> 44#include <asm/smap.h> 45#include <asm/frame.h> 46 47 .section .entry.text, "ax" 48 49/* 50 * We use macros for low-level operations which need to be overridden 51 * for paravirtualization. The following will never clobber any registers: 52 * INTERRUPT_RETURN (aka. "iret") 53 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") 54 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). 55 * 56 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must 57 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). 58 * Allowing a register to be clobbered can shrink the paravirt replacement 59 * enough to patch inline, increasing performance. 60 */ 61 62#ifdef CONFIG_PREEMPT 63# define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF 64#else 65# define preempt_stop(clobbers) 66# define resume_kernel restore_all 67#endif 68 69.macro TRACE_IRQS_IRET 70#ifdef CONFIG_TRACE_IRQFLAGS 71 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off? 72 jz 1f 73 TRACE_IRQS_ON 741: 75#endif 76.endm 77 78/* 79 * User gs save/restore 80 * 81 * %gs is used for userland TLS and kernel only uses it for stack 82 * canary which is required to be at %gs:20 by gcc. Read the comment 83 * at the top of stackprotector.h for more info. 84 * 85 * Local labels 98 and 99 are used. 86 */ 87#ifdef CONFIG_X86_32_LAZY_GS 88 89 /* unfortunately push/pop can't be no-op */ 90.macro PUSH_GS 91 pushl $0 92.endm 93.macro POP_GS pop=0 94 addl $(4 + \pop), %esp 95.endm 96.macro POP_GS_EX 97.endm 98 99 /* all the rest are no-op */ 100.macro PTGS_TO_GS 101.endm 102.macro PTGS_TO_GS_EX 103.endm 104.macro GS_TO_REG reg 105.endm 106.macro REG_TO_PTGS reg 107.endm 108.macro SET_KERNEL_GS reg 109.endm 110 111#else /* CONFIG_X86_32_LAZY_GS */ 112 113.macro PUSH_GS 114 pushl %gs 115.endm 116 117.macro POP_GS pop=0 11898: popl %gs 119 .if \pop <> 0 120 add $\pop, %esp 121 .endif 122.endm 123.macro POP_GS_EX 124.pushsection .fixup, "ax" 12599: movl $0, (%esp) 126 jmp 98b 127.popsection 128 _ASM_EXTABLE(98b, 99b) 129.endm 130 131.macro PTGS_TO_GS 13298: mov PT_GS(%esp), %gs 133.endm 134.macro PTGS_TO_GS_EX 135.pushsection .fixup, "ax" 13699: movl $0, PT_GS(%esp) 137 jmp 98b 138.popsection 139 _ASM_EXTABLE(98b, 99b) 140.endm 141 142.macro GS_TO_REG reg 143 movl %gs, \reg 144.endm 145.macro REG_TO_PTGS reg 146 movl \reg, PT_GS(%esp) 147.endm 148.macro SET_KERNEL_GS reg 149 movl $(__KERNEL_STACK_CANARY), \reg 150 movl \reg, %gs 151.endm 152 153#endif /* CONFIG_X86_32_LAZY_GS */ 154 155.macro SAVE_ALL pt_regs_ax=%eax 156 cld 157 PUSH_GS 158 pushl %fs 159 pushl %es 160 pushl %ds 161 pushl \pt_regs_ax 162 pushl %ebp 163 pushl %edi 164 pushl %esi 165 pushl %edx 166 pushl %ecx 167 pushl %ebx 168 movl $(__USER_DS), %edx 169 movl %edx, %ds 170 movl %edx, %es 171 movl $(__KERNEL_PERCPU), %edx 172 movl %edx, %fs 173 SET_KERNEL_GS %edx 174.endm 175 176/* 177 * This is a sneaky trick to help the unwinder find pt_regs on the stack. The 178 * frame pointer is replaced with an encoded pointer to pt_regs. The encoding 179 * is just setting the LSB, which makes it an invalid stack address and is also 180 * a signal to the unwinder that it's a pt_regs pointer in disguise. 181 * 182 * NOTE: This macro must be used *after* SAVE_ALL because it corrupts the 183 * original rbp. 184 */ 185.macro ENCODE_FRAME_POINTER 186#ifdef CONFIG_FRAME_POINTER 187 mov %esp, %ebp 188 orl $0x1, %ebp 189#endif 190.endm 191 192.macro RESTORE_INT_REGS 193 popl %ebx 194 popl %ecx 195 popl %edx 196 popl %esi 197 popl %edi 198 popl %ebp 199 popl %eax 200.endm 201 202.macro RESTORE_REGS pop=0 203 RESTORE_INT_REGS 2041: popl %ds 2052: popl %es 2063: popl %fs 207 POP_GS \pop 208.pushsection .fixup, "ax" 2094: movl $0, (%esp) 210 jmp 1b 2115: movl $0, (%esp) 212 jmp 2b 2136: movl $0, (%esp) 214 jmp 3b 215.popsection 216 _ASM_EXTABLE(1b, 4b) 217 _ASM_EXTABLE(2b, 5b) 218 _ASM_EXTABLE(3b, 6b) 219 POP_GS_EX 220.endm 221 222/* 223 * %eax: prev task 224 * %edx: next task 225 */ 226ENTRY(__switch_to_asm) 227 /* 228 * Save callee-saved registers 229 * This must match the order in struct inactive_task_frame 230 */ 231 pushl %ebp 232 pushl %ebx 233 pushl %edi 234 pushl %esi 235 236 /* switch stack */ 237 movl %esp, TASK_threadsp(%eax) 238 movl TASK_threadsp(%edx), %esp 239 240#ifdef CONFIG_CC_STACKPROTECTOR 241 movl TASK_stack_canary(%edx), %ebx 242 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset 243#endif 244 245 /* restore callee-saved registers */ 246 popl %esi 247 popl %edi 248 popl %ebx 249 popl %ebp 250 251 jmp __switch_to 252END(__switch_to_asm) 253 254/* 255 * The unwinder expects the last frame on the stack to always be at the same 256 * offset from the end of the page, which allows it to validate the stack. 257 * Calling schedule_tail() directly would break that convention because its an 258 * asmlinkage function so its argument has to be pushed on the stack. This 259 * wrapper creates a proper "end of stack" frame header before the call. 260 */ 261ENTRY(schedule_tail_wrapper) 262 FRAME_BEGIN 263 264 pushl %eax 265 call schedule_tail 266 popl %eax 267 268 FRAME_END 269 ret 270ENDPROC(schedule_tail_wrapper) 271/* 272 * A newly forked process directly context switches into this address. 273 * 274 * eax: prev task we switched from 275 * ebx: kernel thread func (NULL for user thread) 276 * edi: kernel thread arg 277 */ 278ENTRY(ret_from_fork) 279 call schedule_tail_wrapper 280 281 testl %ebx, %ebx 282 jnz 1f /* kernel threads are uncommon */ 283 2842: 285 /* When we fork, we trace the syscall return in the child, too. */ 286 movl %esp, %eax 287 call syscall_return_slowpath 288 jmp restore_all 289 290 /* kernel thread */ 2911: movl %edi, %eax 292 call *%ebx 293 /* 294 * A kernel thread is allowed to return here after successfully 295 * calling do_execve(). Exit to userspace to complete the execve() 296 * syscall. 297 */ 298 movl $0, PT_EAX(%esp) 299 jmp 2b 300END(ret_from_fork) 301 302/* 303 * Return to user mode is not as complex as all this looks, 304 * but we want the default path for a system call return to 305 * go as quickly as possible which is why some of this is 306 * less clear than it otherwise should be. 307 */ 308 309 # userspace resumption stub bypassing syscall exit tracing 310 ALIGN 311ret_from_exception: 312 preempt_stop(CLBR_ANY) 313ret_from_intr: 314#ifdef CONFIG_VM86 315 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS 316 movb PT_CS(%esp), %al 317 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax 318#else 319 /* 320 * We can be coming here from child spawned by kernel_thread(). 321 */ 322 movl PT_CS(%esp), %eax 323 andl $SEGMENT_RPL_MASK, %eax 324#endif 325 cmpl $USER_RPL, %eax 326 jb resume_kernel # not returning to v8086 or userspace 327 328ENTRY(resume_userspace) 329 DISABLE_INTERRUPTS(CLBR_ANY) 330 TRACE_IRQS_OFF 331 movl %esp, %eax 332 call prepare_exit_to_usermode 333 jmp restore_all 334END(ret_from_exception) 335 336#ifdef CONFIG_PREEMPT 337ENTRY(resume_kernel) 338 DISABLE_INTERRUPTS(CLBR_ANY) 339.Lneed_resched: 340 cmpl $0, PER_CPU_VAR(__preempt_count) 341 jnz restore_all 342 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? 343 jz restore_all 344 call preempt_schedule_irq 345 jmp .Lneed_resched 346END(resume_kernel) 347#endif 348 349GLOBAL(__begin_SYSENTER_singlestep_region) 350/* 351 * All code from here through __end_SYSENTER_singlestep_region is subject 352 * to being single-stepped if a user program sets TF and executes SYSENTER. 353 * There is absolutely nothing that we can do to prevent this from happening 354 * (thanks Intel!). To keep our handling of this situation as simple as 355 * possible, we handle TF just like AC and NT, except that our #DB handler 356 * will ignore all of the single-step traps generated in this range. 357 */ 358 359#ifdef CONFIG_XEN 360/* 361 * Xen doesn't set %esp to be precisely what the normal SYSENTER 362 * entry point expects, so fix it up before using the normal path. 363 */ 364ENTRY(xen_sysenter_target) 365 addl $5*4, %esp /* remove xen-provided frame */ 366 jmp .Lsysenter_past_esp 367#endif 368 369/* 370 * 32-bit SYSENTER entry. 371 * 372 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 373 * if X86_FEATURE_SEP is available. This is the preferred system call 374 * entry on 32-bit systems. 375 * 376 * The SYSENTER instruction, in principle, should *only* occur in the 377 * vDSO. In practice, a small number of Android devices were shipped 378 * with a copy of Bionic that inlined a SYSENTER instruction. This 379 * never happened in any of Google's Bionic versions -- it only happened 380 * in a narrow range of Intel-provided versions. 381 * 382 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs. 383 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 384 * SYSENTER does not save anything on the stack, 385 * and does not save old EIP (!!!), ESP, or EFLAGS. 386 * 387 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting 388 * user and/or vm86 state), we explicitly disable the SYSENTER 389 * instruction in vm86 mode by reprogramming the MSRs. 390 * 391 * Arguments: 392 * eax system call number 393 * ebx arg1 394 * ecx arg2 395 * edx arg3 396 * esi arg4 397 * edi arg5 398 * ebp user stack 399 * 0(%ebp) arg6 400 */ 401ENTRY(entry_SYSENTER_32) 402 movl TSS_sysenter_sp0(%esp), %esp 403.Lsysenter_past_esp: 404 pushl $__USER_DS /* pt_regs->ss */ 405 pushl %ebp /* pt_regs->sp (stashed in bp) */ 406 pushfl /* pt_regs->flags (except IF = 0) */ 407 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ 408 pushl $__USER_CS /* pt_regs->cs */ 409 pushl $0 /* pt_regs->ip = 0 (placeholder) */ 410 pushl %eax /* pt_regs->orig_ax */ 411 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ 412 413 /* 414 * SYSENTER doesn't filter flags, so we need to clear NT, AC 415 * and TF ourselves. To save a few cycles, we can check whether 416 * either was set instead of doing an unconditional popfq. 417 * This needs to happen before enabling interrupts so that 418 * we don't get preempted with NT set. 419 * 420 * If TF is set, we will single-step all the way to here -- do_debug 421 * will ignore all the traps. (Yes, this is slow, but so is 422 * single-stepping in general. This allows us to avoid having 423 * a more complicated code to handle the case where a user program 424 * forces us to single-step through the SYSENTER entry code.) 425 * 426 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 427 * out-of-line as an optimization: NT is unlikely to be set in the 428 * majority of the cases and instead of polluting the I$ unnecessarily, 429 * we're keeping that code behind a branch which will predict as 430 * not-taken and therefore its instructions won't be fetched. 431 */ 432 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp) 433 jnz .Lsysenter_fix_flags 434.Lsysenter_flags_fixed: 435 436 /* 437 * User mode is traced as though IRQs are on, and SYSENTER 438 * turned them off. 439 */ 440 TRACE_IRQS_OFF 441 442 movl %esp, %eax 443 call do_fast_syscall_32 444 /* XEN PV guests always use IRET path */ 445 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 446 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 447 448/* Opportunistic SYSEXIT */ 449 TRACE_IRQS_ON /* User mode traces as IRQs on. */ 450 movl PT_EIP(%esp), %edx /* pt_regs->ip */ 451 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */ 4521: mov PT_FS(%esp), %fs 453 PTGS_TO_GS 454 popl %ebx /* pt_regs->bx */ 455 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */ 456 popl %esi /* pt_regs->si */ 457 popl %edi /* pt_regs->di */ 458 popl %ebp /* pt_regs->bp */ 459 popl %eax /* pt_regs->ax */ 460 461 /* 462 * Restore all flags except IF. (We restore IF separately because 463 * STI gives a one-instruction window in which we won't be interrupted, 464 * whereas POPF does not.) 465 */ 466 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */ 467 btr $X86_EFLAGS_IF_BIT, (%esp) 468 popfl 469 470 /* 471 * Return back to the vDSO, which will pop ecx and edx. 472 * Don't bother with DS and ES (they already contain __USER_DS). 473 */ 474 sti 475 sysexit 476 477.pushsection .fixup, "ax" 4782: movl $0, PT_FS(%esp) 479 jmp 1b 480.popsection 481 _ASM_EXTABLE(1b, 2b) 482 PTGS_TO_GS_EX 483 484.Lsysenter_fix_flags: 485 pushl $X86_EFLAGS_FIXED 486 popfl 487 jmp .Lsysenter_flags_fixed 488GLOBAL(__end_SYSENTER_singlestep_region) 489ENDPROC(entry_SYSENTER_32) 490 491/* 492 * 32-bit legacy system call entry. 493 * 494 * 32-bit x86 Linux system calls traditionally used the INT $0x80 495 * instruction. INT $0x80 lands here. 496 * 497 * This entry point can be used by any 32-bit perform system calls. 498 * Instances of INT $0x80 can be found inline in various programs and 499 * libraries. It is also used by the vDSO's __kernel_vsyscall 500 * fallback for hardware that doesn't support a faster entry method. 501 * Restarted 32-bit system calls also fall back to INT $0x80 502 * regardless of what instruction was originally used to do the system 503 * call. (64-bit programs can use INT $0x80 as well, but they can 504 * only run on 64-bit kernels and therefore land in 505 * entry_INT80_compat.) 506 * 507 * This is considered a slow path. It is not used by most libc 508 * implementations on modern hardware except during process startup. 509 * 510 * Arguments: 511 * eax system call number 512 * ebx arg1 513 * ecx arg2 514 * edx arg3 515 * esi arg4 516 * edi arg5 517 * ebp arg6 518 */ 519ENTRY(entry_INT80_32) 520 ASM_CLAC 521 pushl %eax /* pt_regs->orig_ax */ 522 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ 523 524 /* 525 * User mode is traced as though IRQs are on, and the interrupt gate 526 * turned them off. 527 */ 528 TRACE_IRQS_OFF 529 530 movl %esp, %eax 531 call do_int80_syscall_32 532.Lsyscall_32_done: 533 534restore_all: 535 TRACE_IRQS_IRET 536.Lrestore_all_notrace: 537#ifdef CONFIG_X86_ESPFIX32 538 ALTERNATIVE "jmp .Lrestore_nocheck", "", X86_BUG_ESPFIX 539 540 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS 541 /* 542 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we 543 * are returning to the kernel. 544 * See comments in process.c:copy_thread() for details. 545 */ 546 movb PT_OLDSS(%esp), %ah 547 movb PT_CS(%esp), %al 548 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax 549 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax 550 je .Lldt_ss # returning to user-space with LDT SS 551#endif 552.Lrestore_nocheck: 553 RESTORE_REGS 4 # skip orig_eax/error_code 554.Lirq_return: 555 INTERRUPT_RETURN 556 557.section .fixup, "ax" 558ENTRY(iret_exc ) 559 pushl $0 # no error code 560 pushl $do_iret_error 561 jmp common_exception 562.previous 563 _ASM_EXTABLE(.Lirq_return, iret_exc) 564 565#ifdef CONFIG_X86_ESPFIX32 566.Lldt_ss: 567/* 568 * Setup and switch to ESPFIX stack 569 * 570 * We're returning to userspace with a 16 bit stack. The CPU will not 571 * restore the high word of ESP for us on executing iret... This is an 572 * "official" bug of all the x86-compatible CPUs, which we can work 573 * around to make dosemu and wine happy. We do this by preloading the 574 * high word of ESP with the high word of the userspace ESP while 575 * compensating for the offset by changing to the ESPFIX segment with 576 * a base address that matches for the difference. 577 */ 578#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8) 579 mov %esp, %edx /* load kernel esp */ 580 mov PT_OLDESP(%esp), %eax /* load userspace esp */ 581 mov %dx, %ax /* eax: new kernel esp */ 582 sub %eax, %edx /* offset (low word is 0) */ 583 shr $16, %edx 584 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */ 585 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */ 586 pushl $__ESPFIX_SS 587 pushl %eax /* new kernel esp */ 588 /* 589 * Disable interrupts, but do not irqtrace this section: we 590 * will soon execute iret and the tracer was already set to 591 * the irqstate after the IRET: 592 */ 593 DISABLE_INTERRUPTS(CLBR_ANY) 594 lss (%esp), %esp /* switch to espfix segment */ 595 jmp .Lrestore_nocheck 596#endif 597ENDPROC(entry_INT80_32) 598 599.macro FIXUP_ESPFIX_STACK 600/* 601 * Switch back for ESPFIX stack to the normal zerobased stack 602 * 603 * We can't call C functions using the ESPFIX stack. This code reads 604 * the high word of the segment base from the GDT and swiches to the 605 * normal stack and adjusts ESP with the matching offset. 606 */ 607#ifdef CONFIG_X86_ESPFIX32 608 /* fixup the stack */ 609 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */ 610 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */ 611 shl $16, %eax 612 addl %esp, %eax /* the adjusted stack pointer */ 613 pushl $__KERNEL_DS 614 pushl %eax 615 lss (%esp), %esp /* switch to the normal stack segment */ 616#endif 617.endm 618.macro UNWIND_ESPFIX_STACK 619#ifdef CONFIG_X86_ESPFIX32 620 movl %ss, %eax 621 /* see if on espfix stack */ 622 cmpw $__ESPFIX_SS, %ax 623 jne 27f 624 movl $__KERNEL_DS, %eax 625 movl %eax, %ds 626 movl %eax, %es 627 /* switch to normal stack */ 628 FIXUP_ESPFIX_STACK 62927: 630#endif 631.endm 632 633/* 634 * Build the entry stubs with some assembler magic. 635 * We pack 1 stub into every 8-byte block. 636 */ 637 .align 8 638ENTRY(irq_entries_start) 639 vector=FIRST_EXTERNAL_VECTOR 640 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 641 pushl $(~vector+0x80) /* Note: always in signed byte range */ 642 vector=vector+1 643 jmp common_interrupt 644 .align 8 645 .endr 646END(irq_entries_start) 647 648/* 649 * the CPU automatically disables interrupts when executing an IRQ vector, 650 * so IRQ-flags tracing has to follow that: 651 */ 652 .p2align CONFIG_X86_L1_CACHE_SHIFT 653common_interrupt: 654 ASM_CLAC 655 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ 656 SAVE_ALL 657 ENCODE_FRAME_POINTER 658 TRACE_IRQS_OFF 659 movl %esp, %eax 660 call do_IRQ 661 jmp ret_from_intr 662ENDPROC(common_interrupt) 663 664#define BUILD_INTERRUPT3(name, nr, fn) \ 665ENTRY(name) \ 666 ASM_CLAC; \ 667 pushl $~(nr); \ 668 SAVE_ALL; \ 669 ENCODE_FRAME_POINTER; \ 670 TRACE_IRQS_OFF \ 671 movl %esp, %eax; \ 672 call fn; \ 673 jmp ret_from_intr; \ 674ENDPROC(name) 675 676#define BUILD_INTERRUPT(name, nr) \ 677 BUILD_INTERRUPT3(name, nr, smp_##name); \ 678 679/* The include is where all of the SMP etc. interrupts come from */ 680#include <asm/entry_arch.h> 681 682ENTRY(coprocessor_error) 683 ASM_CLAC 684 pushl $0 685 pushl $do_coprocessor_error 686 jmp common_exception 687END(coprocessor_error) 688 689ENTRY(simd_coprocessor_error) 690 ASM_CLAC 691 pushl $0 692#ifdef CONFIG_X86_INVD_BUG 693 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ 694 ALTERNATIVE "pushl $do_general_protection", \ 695 "pushl $do_simd_coprocessor_error", \ 696 X86_FEATURE_XMM 697#else 698 pushl $do_simd_coprocessor_error 699#endif 700 jmp common_exception 701END(simd_coprocessor_error) 702 703ENTRY(device_not_available) 704 ASM_CLAC 705 pushl $-1 # mark this as an int 706 pushl $do_device_not_available 707 jmp common_exception 708END(device_not_available) 709 710#ifdef CONFIG_PARAVIRT 711ENTRY(native_iret) 712 iret 713 _ASM_EXTABLE(native_iret, iret_exc) 714END(native_iret) 715#endif 716 717ENTRY(overflow) 718 ASM_CLAC 719 pushl $0 720 pushl $do_overflow 721 jmp common_exception 722END(overflow) 723 724ENTRY(bounds) 725 ASM_CLAC 726 pushl $0 727 pushl $do_bounds 728 jmp common_exception 729END(bounds) 730 731ENTRY(invalid_op) 732 ASM_CLAC 733 pushl $0 734 pushl $do_invalid_op 735 jmp common_exception 736END(invalid_op) 737 738ENTRY(coprocessor_segment_overrun) 739 ASM_CLAC 740 pushl $0 741 pushl $do_coprocessor_segment_overrun 742 jmp common_exception 743END(coprocessor_segment_overrun) 744 745ENTRY(invalid_TSS) 746 ASM_CLAC 747 pushl $do_invalid_TSS 748 jmp common_exception 749END(invalid_TSS) 750 751ENTRY(segment_not_present) 752 ASM_CLAC 753 pushl $do_segment_not_present 754 jmp common_exception 755END(segment_not_present) 756 757ENTRY(stack_segment) 758 ASM_CLAC 759 pushl $do_stack_segment 760 jmp common_exception 761END(stack_segment) 762 763ENTRY(alignment_check) 764 ASM_CLAC 765 pushl $do_alignment_check 766 jmp common_exception 767END(alignment_check) 768 769ENTRY(divide_error) 770 ASM_CLAC 771 pushl $0 # no error code 772 pushl $do_divide_error 773 jmp common_exception 774END(divide_error) 775 776#ifdef CONFIG_X86_MCE 777ENTRY(machine_check) 778 ASM_CLAC 779 pushl $0 780 pushl machine_check_vector 781 jmp common_exception 782END(machine_check) 783#endif 784 785ENTRY(spurious_interrupt_bug) 786 ASM_CLAC 787 pushl $0 788 pushl $do_spurious_interrupt_bug 789 jmp common_exception 790END(spurious_interrupt_bug) 791 792#ifdef CONFIG_XEN 793ENTRY(xen_hypervisor_callback) 794 pushl $-1 /* orig_ax = -1 => not a system call */ 795 SAVE_ALL 796 ENCODE_FRAME_POINTER 797 TRACE_IRQS_OFF 798 799 /* 800 * Check to see if we got the event in the critical 801 * region in xen_iret_direct, after we've reenabled 802 * events and checked for pending events. This simulates 803 * iret instruction's behaviour where it delivers a 804 * pending interrupt when enabling interrupts: 805 */ 806 movl PT_EIP(%esp), %eax 807 cmpl $xen_iret_start_crit, %eax 808 jb 1f 809 cmpl $xen_iret_end_crit, %eax 810 jae 1f 811 812 jmp xen_iret_crit_fixup 813 814ENTRY(xen_do_upcall) 8151: mov %esp, %eax 816 call xen_evtchn_do_upcall 817#ifndef CONFIG_PREEMPT 818 call xen_maybe_preempt_hcall 819#endif 820 jmp ret_from_intr 821ENDPROC(xen_hypervisor_callback) 822 823/* 824 * Hypervisor uses this for application faults while it executes. 825 * We get here for two reasons: 826 * 1. Fault while reloading DS, ES, FS or GS 827 * 2. Fault while executing IRET 828 * Category 1 we fix up by reattempting the load, and zeroing the segment 829 * register if the load fails. 830 * Category 2 we fix up by jumping to do_iret_error. We cannot use the 831 * normal Linux return path in this case because if we use the IRET hypercall 832 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 833 * We distinguish between categories by maintaining a status value in EAX. 834 */ 835ENTRY(xen_failsafe_callback) 836 pushl %eax 837 movl $1, %eax 8381: mov 4(%esp), %ds 8392: mov 8(%esp), %es 8403: mov 12(%esp), %fs 8414: mov 16(%esp), %gs 842 /* EAX == 0 => Category 1 (Bad segment) 843 EAX != 0 => Category 2 (Bad IRET) */ 844 testl %eax, %eax 845 popl %eax 846 lea 16(%esp), %esp 847 jz 5f 848 jmp iret_exc 8495: pushl $-1 /* orig_ax = -1 => not a system call */ 850 SAVE_ALL 851 ENCODE_FRAME_POINTER 852 jmp ret_from_exception 853 854.section .fixup, "ax" 8556: xorl %eax, %eax 856 movl %eax, 4(%esp) 857 jmp 1b 8587: xorl %eax, %eax 859 movl %eax, 8(%esp) 860 jmp 2b 8618: xorl %eax, %eax 862 movl %eax, 12(%esp) 863 jmp 3b 8649: xorl %eax, %eax 865 movl %eax, 16(%esp) 866 jmp 4b 867.previous 868 _ASM_EXTABLE(1b, 6b) 869 _ASM_EXTABLE(2b, 7b) 870 _ASM_EXTABLE(3b, 8b) 871 _ASM_EXTABLE(4b, 9b) 872ENDPROC(xen_failsafe_callback) 873 874BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR, 875 xen_evtchn_do_upcall) 876 877#endif /* CONFIG_XEN */ 878 879#if IS_ENABLED(CONFIG_HYPERV) 880 881BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, 882 hyperv_vector_handler) 883 884#endif /* CONFIG_HYPERV */ 885 886ENTRY(page_fault) 887 ASM_CLAC 888 pushl $do_page_fault 889 ALIGN 890 jmp common_exception 891END(page_fault) 892 893common_exception: 894 /* the function address is in %gs's slot on the stack */ 895 pushl %fs 896 pushl %es 897 pushl %ds 898 pushl %eax 899 pushl %ebp 900 pushl %edi 901 pushl %esi 902 pushl %edx 903 pushl %ecx 904 pushl %ebx 905 ENCODE_FRAME_POINTER 906 cld 907 movl $(__KERNEL_PERCPU), %ecx 908 movl %ecx, %fs 909 UNWIND_ESPFIX_STACK 910 GS_TO_REG %ecx 911 movl PT_GS(%esp), %edi # get the function address 912 movl PT_ORIG_EAX(%esp), %edx # get the error code 913 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart 914 REG_TO_PTGS %ecx 915 SET_KERNEL_GS %ecx 916 movl $(__USER_DS), %ecx 917 movl %ecx, %ds 918 movl %ecx, %es 919 TRACE_IRQS_OFF 920 movl %esp, %eax # pt_regs pointer 921 call *%edi 922 jmp ret_from_exception 923END(common_exception) 924 925ENTRY(debug) 926 /* 927 * #DB can happen at the first instruction of 928 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this 929 * happens, then we will be running on a very small stack. We 930 * need to detect this condition and switch to the thread 931 * stack before calling any C code at all. 932 * 933 * If you edit this code, keep in mind that NMIs can happen in here. 934 */ 935 ASM_CLAC 936 pushl $-1 # mark this as an int 937 SAVE_ALL 938 ENCODE_FRAME_POINTER 939 xorl %edx, %edx # error code 0 940 movl %esp, %eax # pt_regs pointer 941 942 /* Are we currently on the SYSENTER stack? */ 943 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx) 944 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */ 945 cmpl $SIZEOF_SYSENTER_stack, %ecx 946 jb .Ldebug_from_sysenter_stack 947 948 TRACE_IRQS_OFF 949 call do_debug 950 jmp ret_from_exception 951 952.Ldebug_from_sysenter_stack: 953 /* We're on the SYSENTER stack. Switch off. */ 954 movl %esp, %ebx 955 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp 956 TRACE_IRQS_OFF 957 call do_debug 958 movl %ebx, %esp 959 jmp ret_from_exception 960END(debug) 961 962/* 963 * NMI is doubly nasty. It can happen on the first instruction of 964 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning 965 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32 966 * switched stacks. We handle both conditions by simply checking whether we 967 * interrupted kernel code running on the SYSENTER stack. 968 */ 969ENTRY(nmi) 970 ASM_CLAC 971#ifdef CONFIG_X86_ESPFIX32 972 pushl %eax 973 movl %ss, %eax 974 cmpw $__ESPFIX_SS, %ax 975 popl %eax 976 je .Lnmi_espfix_stack 977#endif 978 979 pushl %eax # pt_regs->orig_ax 980 SAVE_ALL 981 ENCODE_FRAME_POINTER 982 xorl %edx, %edx # zero error code 983 movl %esp, %eax # pt_regs pointer 984 985 /* Are we currently on the SYSENTER stack? */ 986 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx) 987 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */ 988 cmpl $SIZEOF_SYSENTER_stack, %ecx 989 jb .Lnmi_from_sysenter_stack 990 991 /* Not on SYSENTER stack. */ 992 call do_nmi 993 jmp .Lrestore_all_notrace 994 995.Lnmi_from_sysenter_stack: 996 /* 997 * We're on the SYSENTER stack. Switch off. No one (not even debug) 998 * is using the thread stack right now, so it's safe for us to use it. 999 */ 1000 movl %esp, %ebx 1001 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp 1002 call do_nmi 1003 movl %ebx, %esp 1004 jmp .Lrestore_all_notrace 1005 1006#ifdef CONFIG_X86_ESPFIX32 1007.Lnmi_espfix_stack: 1008 /* 1009 * create the pointer to lss back 1010 */ 1011 pushl %ss 1012 pushl %esp 1013 addl $4, (%esp) 1014 /* copy the iret frame of 12 bytes */ 1015 .rept 3 1016 pushl 16(%esp) 1017 .endr 1018 pushl %eax 1019 SAVE_ALL 1020 ENCODE_FRAME_POINTER 1021 FIXUP_ESPFIX_STACK # %eax == %esp 1022 xorl %edx, %edx # zero error code 1023 call do_nmi 1024 RESTORE_REGS 1025 lss 12+4(%esp), %esp # back to espfix stack 1026 jmp .Lirq_return 1027#endif 1028END(nmi) 1029 1030ENTRY(int3) 1031 ASM_CLAC 1032 pushl $-1 # mark this as an int 1033 SAVE_ALL 1034 ENCODE_FRAME_POINTER 1035 TRACE_IRQS_OFF 1036 xorl %edx, %edx # zero error code 1037 movl %esp, %eax # pt_regs pointer 1038 call do_int3 1039 jmp ret_from_exception 1040END(int3) 1041 1042ENTRY(general_protection) 1043 pushl $do_general_protection 1044 jmp common_exception 1045END(general_protection) 1046 1047#ifdef CONFIG_KVM_GUEST 1048ENTRY(async_page_fault) 1049 ASM_CLAC 1050 pushl $do_async_page_fault 1051 jmp common_exception 1052END(async_page_fault) 1053#endif 1054 1055ENTRY(rewind_stack_do_exit) 1056 /* Prevent any naive code from trying to unwind to our caller. */ 1057 xorl %ebp, %ebp 1058 1059 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi 1060 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp 1061 1062 call do_exit 10631: jmp 1b 1064END(rewind_stack_do_exit) 1065