1/* 2 * Copyright (C) 1991,1992 Linus Torvalds 3 * 4 * entry_32.S contains the system-call and low-level fault and trap handling routines. 5 * 6 * Stack layout while running C code: 7 * ptrace needs to have all registers on the stack. 8 * If the order here is changed, it needs to be 9 * updated in fork.c:copy_process(), signal.c:do_signal(), 10 * ptrace.c and ptrace.h 11 * 12 * 0(%esp) - %ebx 13 * 4(%esp) - %ecx 14 * 8(%esp) - %edx 15 * C(%esp) - %esi 16 * 10(%esp) - %edi 17 * 14(%esp) - %ebp 18 * 18(%esp) - %eax 19 * 1C(%esp) - %ds 20 * 20(%esp) - %es 21 * 24(%esp) - %fs 22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS 23 * 2C(%esp) - orig_eax 24 * 30(%esp) - %eip 25 * 34(%esp) - %cs 26 * 38(%esp) - %eflags 27 * 3C(%esp) - %oldesp 28 * 40(%esp) - %oldss 29 */ 30 31#include <linux/linkage.h> 32#include <linux/err.h> 33#include <asm/thread_info.h> 34#include <asm/irqflags.h> 35#include <asm/errno.h> 36#include <asm/segment.h> 37#include <asm/smp.h> 38#include <asm/percpu.h> 39#include <asm/processor-flags.h> 40#include <asm/irq_vectors.h> 41#include <asm/cpufeatures.h> 42#include <asm/alternative-asm.h> 43#include <asm/asm.h> 44#include <asm/smap.h> 45#include <asm/frame.h> 46 47 .section .entry.text, "ax" 48 49/* 50 * We use macros for low-level operations which need to be overridden 51 * for paravirtualization. The following will never clobber any registers: 52 * INTERRUPT_RETURN (aka. "iret") 53 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") 54 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). 55 * 56 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must 57 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). 58 * Allowing a register to be clobbered can shrink the paravirt replacement 59 * enough to patch inline, increasing performance. 60 */ 61 62#ifdef CONFIG_PREEMPT 63# define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF 64#else 65# define preempt_stop(clobbers) 66# define resume_kernel restore_all 67#endif 68 69.macro TRACE_IRQS_IRET 70#ifdef CONFIG_TRACE_IRQFLAGS 71 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off? 72 jz 1f 73 TRACE_IRQS_ON 741: 75#endif 76.endm 77 78/* 79 * User gs save/restore 80 * 81 * %gs is used for userland TLS and kernel only uses it for stack 82 * canary which is required to be at %gs:20 by gcc. Read the comment 83 * at the top of stackprotector.h for more info. 84 * 85 * Local labels 98 and 99 are used. 86 */ 87#ifdef CONFIG_X86_32_LAZY_GS 88 89 /* unfortunately push/pop can't be no-op */ 90.macro PUSH_GS 91 pushl $0 92.endm 93.macro POP_GS pop=0 94 addl $(4 + \pop), %esp 95.endm 96.macro POP_GS_EX 97.endm 98 99 /* all the rest are no-op */ 100.macro PTGS_TO_GS 101.endm 102.macro PTGS_TO_GS_EX 103.endm 104.macro GS_TO_REG reg 105.endm 106.macro REG_TO_PTGS reg 107.endm 108.macro SET_KERNEL_GS reg 109.endm 110 111#else /* CONFIG_X86_32_LAZY_GS */ 112 113.macro PUSH_GS 114 pushl %gs 115.endm 116 117.macro POP_GS pop=0 11898: popl %gs 119 .if \pop <> 0 120 add $\pop, %esp 121 .endif 122.endm 123.macro POP_GS_EX 124.pushsection .fixup, "ax" 12599: movl $0, (%esp) 126 jmp 98b 127.popsection 128 _ASM_EXTABLE(98b, 99b) 129.endm 130 131.macro PTGS_TO_GS 13298: mov PT_GS(%esp), %gs 133.endm 134.macro PTGS_TO_GS_EX 135.pushsection .fixup, "ax" 13699: movl $0, PT_GS(%esp) 137 jmp 98b 138.popsection 139 _ASM_EXTABLE(98b, 99b) 140.endm 141 142.macro GS_TO_REG reg 143 movl %gs, \reg 144.endm 145.macro REG_TO_PTGS reg 146 movl \reg, PT_GS(%esp) 147.endm 148.macro SET_KERNEL_GS reg 149 movl $(__KERNEL_STACK_CANARY), \reg 150 movl \reg, %gs 151.endm 152 153#endif /* CONFIG_X86_32_LAZY_GS */ 154 155.macro SAVE_ALL pt_regs_ax=%eax 156 cld 157 PUSH_GS 158 pushl %fs 159 pushl %es 160 pushl %ds 161 pushl \pt_regs_ax 162 pushl %ebp 163 pushl %edi 164 pushl %esi 165 pushl %edx 166 pushl %ecx 167 pushl %ebx 168 movl $(__USER_DS), %edx 169 movl %edx, %ds 170 movl %edx, %es 171 movl $(__KERNEL_PERCPU), %edx 172 movl %edx, %fs 173 SET_KERNEL_GS %edx 174.endm 175 176/* 177 * This is a sneaky trick to help the unwinder find pt_regs on the stack. The 178 * frame pointer is replaced with an encoded pointer to pt_regs. The encoding 179 * is just setting the LSB, which makes it an invalid stack address and is also 180 * a signal to the unwinder that it's a pt_regs pointer in disguise. 181 * 182 * NOTE: This macro must be used *after* SAVE_ALL because it corrupts the 183 * original rbp. 184 */ 185.macro ENCODE_FRAME_POINTER 186#ifdef CONFIG_FRAME_POINTER 187 mov %esp, %ebp 188 orl $0x1, %ebp 189#endif 190.endm 191 192.macro RESTORE_INT_REGS 193 popl %ebx 194 popl %ecx 195 popl %edx 196 popl %esi 197 popl %edi 198 popl %ebp 199 popl %eax 200.endm 201 202.macro RESTORE_REGS pop=0 203 RESTORE_INT_REGS 2041: popl %ds 2052: popl %es 2063: popl %fs 207 POP_GS \pop 208.pushsection .fixup, "ax" 2094: movl $0, (%esp) 210 jmp 1b 2115: movl $0, (%esp) 212 jmp 2b 2136: movl $0, (%esp) 214 jmp 3b 215.popsection 216 _ASM_EXTABLE(1b, 4b) 217 _ASM_EXTABLE(2b, 5b) 218 _ASM_EXTABLE(3b, 6b) 219 POP_GS_EX 220.endm 221 222/* 223 * %eax: prev task 224 * %edx: next task 225 */ 226ENTRY(__switch_to_asm) 227 /* 228 * Save callee-saved registers 229 * This must match the order in struct inactive_task_frame 230 */ 231 pushl %ebp 232 pushl %ebx 233 pushl %edi 234 pushl %esi 235 236 /* switch stack */ 237 movl %esp, TASK_threadsp(%eax) 238 movl TASK_threadsp(%edx), %esp 239 240#ifdef CONFIG_CC_STACKPROTECTOR 241 movl TASK_stack_canary(%edx), %ebx 242 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset 243#endif 244 245 /* restore callee-saved registers */ 246 popl %esi 247 popl %edi 248 popl %ebx 249 popl %ebp 250 251 jmp __switch_to 252END(__switch_to_asm) 253 254/* 255 * A newly forked process directly context switches into this address. 256 * 257 * eax: prev task we switched from 258 * ebx: kernel thread func (NULL for user thread) 259 * edi: kernel thread arg 260 */ 261ENTRY(ret_from_fork) 262 FRAME_BEGIN /* help unwinder find end of stack */ 263 264 /* 265 * schedule_tail() is asmlinkage so we have to put its 'prev' argument 266 * on the stack. 267 */ 268 pushl %eax 269 call schedule_tail 270 popl %eax 271 272 testl %ebx, %ebx 273 jnz 1f /* kernel threads are uncommon */ 274 2752: 276 /* When we fork, we trace the syscall return in the child, too. */ 277 leal FRAME_OFFSET(%esp), %eax 278 call syscall_return_slowpath 279 FRAME_END 280 jmp restore_all 281 282 /* kernel thread */ 2831: movl %edi, %eax 284 call *%ebx 285 /* 286 * A kernel thread is allowed to return here after successfully 287 * calling do_execve(). Exit to userspace to complete the execve() 288 * syscall. 289 */ 290 movl $0, PT_EAX(%esp) 291 jmp 2b 292END(ret_from_fork) 293 294/* 295 * Return to user mode is not as complex as all this looks, 296 * but we want the default path for a system call return to 297 * go as quickly as possible which is why some of this is 298 * less clear than it otherwise should be. 299 */ 300 301 # userspace resumption stub bypassing syscall exit tracing 302 ALIGN 303ret_from_exception: 304 preempt_stop(CLBR_ANY) 305ret_from_intr: 306#ifdef CONFIG_VM86 307 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS 308 movb PT_CS(%esp), %al 309 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax 310#else 311 /* 312 * We can be coming here from child spawned by kernel_thread(). 313 */ 314 movl PT_CS(%esp), %eax 315 andl $SEGMENT_RPL_MASK, %eax 316#endif 317 cmpl $USER_RPL, %eax 318 jb resume_kernel # not returning to v8086 or userspace 319 320ENTRY(resume_userspace) 321 DISABLE_INTERRUPTS(CLBR_ANY) 322 TRACE_IRQS_OFF 323 movl %esp, %eax 324 call prepare_exit_to_usermode 325 jmp restore_all 326END(ret_from_exception) 327 328#ifdef CONFIG_PREEMPT 329ENTRY(resume_kernel) 330 DISABLE_INTERRUPTS(CLBR_ANY) 331.Lneed_resched: 332 cmpl $0, PER_CPU_VAR(__preempt_count) 333 jnz restore_all 334 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? 335 jz restore_all 336 call preempt_schedule_irq 337 jmp .Lneed_resched 338END(resume_kernel) 339#endif 340 341GLOBAL(__begin_SYSENTER_singlestep_region) 342/* 343 * All code from here through __end_SYSENTER_singlestep_region is subject 344 * to being single-stepped if a user program sets TF and executes SYSENTER. 345 * There is absolutely nothing that we can do to prevent this from happening 346 * (thanks Intel!). To keep our handling of this situation as simple as 347 * possible, we handle TF just like AC and NT, except that our #DB handler 348 * will ignore all of the single-step traps generated in this range. 349 */ 350 351#ifdef CONFIG_XEN 352/* 353 * Xen doesn't set %esp to be precisely what the normal SYSENTER 354 * entry point expects, so fix it up before using the normal path. 355 */ 356ENTRY(xen_sysenter_target) 357 addl $5*4, %esp /* remove xen-provided frame */ 358 jmp .Lsysenter_past_esp 359#endif 360 361/* 362 * 32-bit SYSENTER entry. 363 * 364 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here 365 * if X86_FEATURE_SEP is available. This is the preferred system call 366 * entry on 32-bit systems. 367 * 368 * The SYSENTER instruction, in principle, should *only* occur in the 369 * vDSO. In practice, a small number of Android devices were shipped 370 * with a copy of Bionic that inlined a SYSENTER instruction. This 371 * never happened in any of Google's Bionic versions -- it only happened 372 * in a narrow range of Intel-provided versions. 373 * 374 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs. 375 * IF and VM in RFLAGS are cleared (IOW: interrupts are off). 376 * SYSENTER does not save anything on the stack, 377 * and does not save old EIP (!!!), ESP, or EFLAGS. 378 * 379 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting 380 * user and/or vm86 state), we explicitly disable the SYSENTER 381 * instruction in vm86 mode by reprogramming the MSRs. 382 * 383 * Arguments: 384 * eax system call number 385 * ebx arg1 386 * ecx arg2 387 * edx arg3 388 * esi arg4 389 * edi arg5 390 * ebp user stack 391 * 0(%ebp) arg6 392 */ 393ENTRY(entry_SYSENTER_32) 394 movl TSS_sysenter_sp0(%esp), %esp 395.Lsysenter_past_esp: 396 pushl $__USER_DS /* pt_regs->ss */ 397 pushl %ebp /* pt_regs->sp (stashed in bp) */ 398 pushfl /* pt_regs->flags (except IF = 0) */ 399 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ 400 pushl $__USER_CS /* pt_regs->cs */ 401 pushl $0 /* pt_regs->ip = 0 (placeholder) */ 402 pushl %eax /* pt_regs->orig_ax */ 403 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ 404 405 /* 406 * SYSENTER doesn't filter flags, so we need to clear NT, AC 407 * and TF ourselves. To save a few cycles, we can check whether 408 * either was set instead of doing an unconditional popfq. 409 * This needs to happen before enabling interrupts so that 410 * we don't get preempted with NT set. 411 * 412 * If TF is set, we will single-step all the way to here -- do_debug 413 * will ignore all the traps. (Yes, this is slow, but so is 414 * single-stepping in general. This allows us to avoid having 415 * a more complicated code to handle the case where a user program 416 * forces us to single-step through the SYSENTER entry code.) 417 * 418 * NB.: .Lsysenter_fix_flags is a label with the code under it moved 419 * out-of-line as an optimization: NT is unlikely to be set in the 420 * majority of the cases and instead of polluting the I$ unnecessarily, 421 * we're keeping that code behind a branch which will predict as 422 * not-taken and therefore its instructions won't be fetched. 423 */ 424 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp) 425 jnz .Lsysenter_fix_flags 426.Lsysenter_flags_fixed: 427 428 /* 429 * User mode is traced as though IRQs are on, and SYSENTER 430 * turned them off. 431 */ 432 TRACE_IRQS_OFF 433 434 movl %esp, %eax 435 call do_fast_syscall_32 436 /* XEN PV guests always use IRET path */ 437 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ 438 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV 439 440/* Opportunistic SYSEXIT */ 441 TRACE_IRQS_ON /* User mode traces as IRQs on. */ 442 movl PT_EIP(%esp), %edx /* pt_regs->ip */ 443 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */ 4441: mov PT_FS(%esp), %fs 445 PTGS_TO_GS 446 popl %ebx /* pt_regs->bx */ 447 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */ 448 popl %esi /* pt_regs->si */ 449 popl %edi /* pt_regs->di */ 450 popl %ebp /* pt_regs->bp */ 451 popl %eax /* pt_regs->ax */ 452 453 /* 454 * Restore all flags except IF. (We restore IF separately because 455 * STI gives a one-instruction window in which we won't be interrupted, 456 * whereas POPF does not.) 457 */ 458 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */ 459 btr $X86_EFLAGS_IF_BIT, (%esp) 460 popfl 461 462 /* 463 * Return back to the vDSO, which will pop ecx and edx. 464 * Don't bother with DS and ES (they already contain __USER_DS). 465 */ 466 sti 467 sysexit 468 469.pushsection .fixup, "ax" 4702: movl $0, PT_FS(%esp) 471 jmp 1b 472.popsection 473 _ASM_EXTABLE(1b, 2b) 474 PTGS_TO_GS_EX 475 476.Lsysenter_fix_flags: 477 pushl $X86_EFLAGS_FIXED 478 popfl 479 jmp .Lsysenter_flags_fixed 480GLOBAL(__end_SYSENTER_singlestep_region) 481ENDPROC(entry_SYSENTER_32) 482 483/* 484 * 32-bit legacy system call entry. 485 * 486 * 32-bit x86 Linux system calls traditionally used the INT $0x80 487 * instruction. INT $0x80 lands here. 488 * 489 * This entry point can be used by any 32-bit perform system calls. 490 * Instances of INT $0x80 can be found inline in various programs and 491 * libraries. It is also used by the vDSO's __kernel_vsyscall 492 * fallback for hardware that doesn't support a faster entry method. 493 * Restarted 32-bit system calls also fall back to INT $0x80 494 * regardless of what instruction was originally used to do the system 495 * call. (64-bit programs can use INT $0x80 as well, but they can 496 * only run on 64-bit kernels and therefore land in 497 * entry_INT80_compat.) 498 * 499 * This is considered a slow path. It is not used by most libc 500 * implementations on modern hardware except during process startup. 501 * 502 * Arguments: 503 * eax system call number 504 * ebx arg1 505 * ecx arg2 506 * edx arg3 507 * esi arg4 508 * edi arg5 509 * ebp arg6 510 */ 511ENTRY(entry_INT80_32) 512 ASM_CLAC 513 pushl %eax /* pt_regs->orig_ax */ 514 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ 515 516 /* 517 * User mode is traced as though IRQs are on, and the interrupt gate 518 * turned them off. 519 */ 520 TRACE_IRQS_OFF 521 522 movl %esp, %eax 523 call do_int80_syscall_32 524.Lsyscall_32_done: 525 526restore_all: 527 TRACE_IRQS_IRET 528.Lrestore_all_notrace: 529#ifdef CONFIG_X86_ESPFIX32 530 ALTERNATIVE "jmp .Lrestore_nocheck", "", X86_BUG_ESPFIX 531 532 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS 533 /* 534 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we 535 * are returning to the kernel. 536 * See comments in process.c:copy_thread() for details. 537 */ 538 movb PT_OLDSS(%esp), %ah 539 movb PT_CS(%esp), %al 540 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax 541 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax 542 je .Lldt_ss # returning to user-space with LDT SS 543#endif 544.Lrestore_nocheck: 545 RESTORE_REGS 4 # skip orig_eax/error_code 546.Lirq_return: 547 INTERRUPT_RETURN 548 549.section .fixup, "ax" 550ENTRY(iret_exc ) 551 pushl $0 # no error code 552 pushl $do_iret_error 553 jmp common_exception 554.previous 555 _ASM_EXTABLE(.Lirq_return, iret_exc) 556 557#ifdef CONFIG_X86_ESPFIX32 558.Lldt_ss: 559/* 560 * Setup and switch to ESPFIX stack 561 * 562 * We're returning to userspace with a 16 bit stack. The CPU will not 563 * restore the high word of ESP for us on executing iret... This is an 564 * "official" bug of all the x86-compatible CPUs, which we can work 565 * around to make dosemu and wine happy. We do this by preloading the 566 * high word of ESP with the high word of the userspace ESP while 567 * compensating for the offset by changing to the ESPFIX segment with 568 * a base address that matches for the difference. 569 */ 570#define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8) 571 mov %esp, %edx /* load kernel esp */ 572 mov PT_OLDESP(%esp), %eax /* load userspace esp */ 573 mov %dx, %ax /* eax: new kernel esp */ 574 sub %eax, %edx /* offset (low word is 0) */ 575 shr $16, %edx 576 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */ 577 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */ 578 pushl $__ESPFIX_SS 579 pushl %eax /* new kernel esp */ 580 /* 581 * Disable interrupts, but do not irqtrace this section: we 582 * will soon execute iret and the tracer was already set to 583 * the irqstate after the IRET: 584 */ 585 DISABLE_INTERRUPTS(CLBR_ANY) 586 lss (%esp), %esp /* switch to espfix segment */ 587 jmp .Lrestore_nocheck 588#endif 589ENDPROC(entry_INT80_32) 590 591.macro FIXUP_ESPFIX_STACK 592/* 593 * Switch back for ESPFIX stack to the normal zerobased stack 594 * 595 * We can't call C functions using the ESPFIX stack. This code reads 596 * the high word of the segment base from the GDT and swiches to the 597 * normal stack and adjusts ESP with the matching offset. 598 */ 599#ifdef CONFIG_X86_ESPFIX32 600 /* fixup the stack */ 601 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */ 602 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */ 603 shl $16, %eax 604 addl %esp, %eax /* the adjusted stack pointer */ 605 pushl $__KERNEL_DS 606 pushl %eax 607 lss (%esp), %esp /* switch to the normal stack segment */ 608#endif 609.endm 610.macro UNWIND_ESPFIX_STACK 611#ifdef CONFIG_X86_ESPFIX32 612 movl %ss, %eax 613 /* see if on espfix stack */ 614 cmpw $__ESPFIX_SS, %ax 615 jne 27f 616 movl $__KERNEL_DS, %eax 617 movl %eax, %ds 618 movl %eax, %es 619 /* switch to normal stack */ 620 FIXUP_ESPFIX_STACK 62127: 622#endif 623.endm 624 625/* 626 * Build the entry stubs with some assembler magic. 627 * We pack 1 stub into every 8-byte block. 628 */ 629 .align 8 630ENTRY(irq_entries_start) 631 vector=FIRST_EXTERNAL_VECTOR 632 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) 633 pushl $(~vector+0x80) /* Note: always in signed byte range */ 634 vector=vector+1 635 jmp common_interrupt 636 .align 8 637 .endr 638END(irq_entries_start) 639 640/* 641 * the CPU automatically disables interrupts when executing an IRQ vector, 642 * so IRQ-flags tracing has to follow that: 643 */ 644 .p2align CONFIG_X86_L1_CACHE_SHIFT 645common_interrupt: 646 ASM_CLAC 647 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ 648 SAVE_ALL 649 ENCODE_FRAME_POINTER 650 TRACE_IRQS_OFF 651 movl %esp, %eax 652 call do_IRQ 653 jmp ret_from_intr 654ENDPROC(common_interrupt) 655 656#define BUILD_INTERRUPT3(name, nr, fn) \ 657ENTRY(name) \ 658 ASM_CLAC; \ 659 pushl $~(nr); \ 660 SAVE_ALL; \ 661 ENCODE_FRAME_POINTER; \ 662 TRACE_IRQS_OFF \ 663 movl %esp, %eax; \ 664 call fn; \ 665 jmp ret_from_intr; \ 666ENDPROC(name) 667 668 669#ifdef CONFIG_TRACING 670# define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name) 671#else 672# define TRACE_BUILD_INTERRUPT(name, nr) 673#endif 674 675#define BUILD_INTERRUPT(name, nr) \ 676 BUILD_INTERRUPT3(name, nr, smp_##name); \ 677 TRACE_BUILD_INTERRUPT(name, nr) 678 679/* The include is where all of the SMP etc. interrupts come from */ 680#include <asm/entry_arch.h> 681 682ENTRY(coprocessor_error) 683 ASM_CLAC 684 pushl $0 685 pushl $do_coprocessor_error 686 jmp common_exception 687END(coprocessor_error) 688 689ENTRY(simd_coprocessor_error) 690 ASM_CLAC 691 pushl $0 692#ifdef CONFIG_X86_INVD_BUG 693 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ 694 ALTERNATIVE "pushl $do_general_protection", \ 695 "pushl $do_simd_coprocessor_error", \ 696 X86_FEATURE_XMM 697#else 698 pushl $do_simd_coprocessor_error 699#endif 700 jmp common_exception 701END(simd_coprocessor_error) 702 703ENTRY(device_not_available) 704 ASM_CLAC 705 pushl $-1 # mark this as an int 706 pushl $do_device_not_available 707 jmp common_exception 708END(device_not_available) 709 710#ifdef CONFIG_PARAVIRT 711ENTRY(native_iret) 712 iret 713 _ASM_EXTABLE(native_iret, iret_exc) 714END(native_iret) 715#endif 716 717ENTRY(overflow) 718 ASM_CLAC 719 pushl $0 720 pushl $do_overflow 721 jmp common_exception 722END(overflow) 723 724ENTRY(bounds) 725 ASM_CLAC 726 pushl $0 727 pushl $do_bounds 728 jmp common_exception 729END(bounds) 730 731ENTRY(invalid_op) 732 ASM_CLAC 733 pushl $0 734 pushl $do_invalid_op 735 jmp common_exception 736END(invalid_op) 737 738ENTRY(coprocessor_segment_overrun) 739 ASM_CLAC 740 pushl $0 741 pushl $do_coprocessor_segment_overrun 742 jmp common_exception 743END(coprocessor_segment_overrun) 744 745ENTRY(invalid_TSS) 746 ASM_CLAC 747 pushl $do_invalid_TSS 748 jmp common_exception 749END(invalid_TSS) 750 751ENTRY(segment_not_present) 752 ASM_CLAC 753 pushl $do_segment_not_present 754 jmp common_exception 755END(segment_not_present) 756 757ENTRY(stack_segment) 758 ASM_CLAC 759 pushl $do_stack_segment 760 jmp common_exception 761END(stack_segment) 762 763ENTRY(alignment_check) 764 ASM_CLAC 765 pushl $do_alignment_check 766 jmp common_exception 767END(alignment_check) 768 769ENTRY(divide_error) 770 ASM_CLAC 771 pushl $0 # no error code 772 pushl $do_divide_error 773 jmp common_exception 774END(divide_error) 775 776#ifdef CONFIG_X86_MCE 777ENTRY(machine_check) 778 ASM_CLAC 779 pushl $0 780 pushl machine_check_vector 781 jmp common_exception 782END(machine_check) 783#endif 784 785ENTRY(spurious_interrupt_bug) 786 ASM_CLAC 787 pushl $0 788 pushl $do_spurious_interrupt_bug 789 jmp common_exception 790END(spurious_interrupt_bug) 791 792#ifdef CONFIG_XEN 793ENTRY(xen_hypervisor_callback) 794 pushl $-1 /* orig_ax = -1 => not a system call */ 795 SAVE_ALL 796 ENCODE_FRAME_POINTER 797 TRACE_IRQS_OFF 798 799 /* 800 * Check to see if we got the event in the critical 801 * region in xen_iret_direct, after we've reenabled 802 * events and checked for pending events. This simulates 803 * iret instruction's behaviour where it delivers a 804 * pending interrupt when enabling interrupts: 805 */ 806 movl PT_EIP(%esp), %eax 807 cmpl $xen_iret_start_crit, %eax 808 jb 1f 809 cmpl $xen_iret_end_crit, %eax 810 jae 1f 811 812 jmp xen_iret_crit_fixup 813 814ENTRY(xen_do_upcall) 8151: mov %esp, %eax 816 call xen_evtchn_do_upcall 817#ifndef CONFIG_PREEMPT 818 call xen_maybe_preempt_hcall 819#endif 820 jmp ret_from_intr 821ENDPROC(xen_hypervisor_callback) 822 823/* 824 * Hypervisor uses this for application faults while it executes. 825 * We get here for two reasons: 826 * 1. Fault while reloading DS, ES, FS or GS 827 * 2. Fault while executing IRET 828 * Category 1 we fix up by reattempting the load, and zeroing the segment 829 * register if the load fails. 830 * Category 2 we fix up by jumping to do_iret_error. We cannot use the 831 * normal Linux return path in this case because if we use the IRET hypercall 832 * to pop the stack frame we end up in an infinite loop of failsafe callbacks. 833 * We distinguish between categories by maintaining a status value in EAX. 834 */ 835ENTRY(xen_failsafe_callback) 836 pushl %eax 837 movl $1, %eax 8381: mov 4(%esp), %ds 8392: mov 8(%esp), %es 8403: mov 12(%esp), %fs 8414: mov 16(%esp), %gs 842 /* EAX == 0 => Category 1 (Bad segment) 843 EAX != 0 => Category 2 (Bad IRET) */ 844 testl %eax, %eax 845 popl %eax 846 lea 16(%esp), %esp 847 jz 5f 848 jmp iret_exc 8495: pushl $-1 /* orig_ax = -1 => not a system call */ 850 SAVE_ALL 851 ENCODE_FRAME_POINTER 852 jmp ret_from_exception 853 854.section .fixup, "ax" 8556: xorl %eax, %eax 856 movl %eax, 4(%esp) 857 jmp 1b 8587: xorl %eax, %eax 859 movl %eax, 8(%esp) 860 jmp 2b 8618: xorl %eax, %eax 862 movl %eax, 12(%esp) 863 jmp 3b 8649: xorl %eax, %eax 865 movl %eax, 16(%esp) 866 jmp 4b 867.previous 868 _ASM_EXTABLE(1b, 6b) 869 _ASM_EXTABLE(2b, 7b) 870 _ASM_EXTABLE(3b, 8b) 871 _ASM_EXTABLE(4b, 9b) 872ENDPROC(xen_failsafe_callback) 873 874BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR, 875 xen_evtchn_do_upcall) 876 877#endif /* CONFIG_XEN */ 878 879#if IS_ENABLED(CONFIG_HYPERV) 880 881BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, 882 hyperv_vector_handler) 883 884#endif /* CONFIG_HYPERV */ 885 886#ifdef CONFIG_TRACING 887ENTRY(trace_page_fault) 888 ASM_CLAC 889 pushl $trace_do_page_fault 890 jmp common_exception 891END(trace_page_fault) 892#endif 893 894ENTRY(page_fault) 895 ASM_CLAC 896 pushl $do_page_fault 897 ALIGN 898 jmp common_exception 899END(page_fault) 900 901common_exception: 902 /* the function address is in %gs's slot on the stack */ 903 pushl %fs 904 pushl %es 905 pushl %ds 906 pushl %eax 907 pushl %ebp 908 pushl %edi 909 pushl %esi 910 pushl %edx 911 pushl %ecx 912 pushl %ebx 913 ENCODE_FRAME_POINTER 914 cld 915 movl $(__KERNEL_PERCPU), %ecx 916 movl %ecx, %fs 917 UNWIND_ESPFIX_STACK 918 GS_TO_REG %ecx 919 movl PT_GS(%esp), %edi # get the function address 920 movl PT_ORIG_EAX(%esp), %edx # get the error code 921 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart 922 REG_TO_PTGS %ecx 923 SET_KERNEL_GS %ecx 924 movl $(__USER_DS), %ecx 925 movl %ecx, %ds 926 movl %ecx, %es 927 TRACE_IRQS_OFF 928 movl %esp, %eax # pt_regs pointer 929 call *%edi 930 jmp ret_from_exception 931END(common_exception) 932 933ENTRY(debug) 934 /* 935 * #DB can happen at the first instruction of 936 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this 937 * happens, then we will be running on a very small stack. We 938 * need to detect this condition and switch to the thread 939 * stack before calling any C code at all. 940 * 941 * If you edit this code, keep in mind that NMIs can happen in here. 942 */ 943 ASM_CLAC 944 pushl $-1 # mark this as an int 945 SAVE_ALL 946 ENCODE_FRAME_POINTER 947 xorl %edx, %edx # error code 0 948 movl %esp, %eax # pt_regs pointer 949 950 /* Are we currently on the SYSENTER stack? */ 951 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx) 952 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */ 953 cmpl $SIZEOF_SYSENTER_stack, %ecx 954 jb .Ldebug_from_sysenter_stack 955 956 TRACE_IRQS_OFF 957 call do_debug 958 jmp ret_from_exception 959 960.Ldebug_from_sysenter_stack: 961 /* We're on the SYSENTER stack. Switch off. */ 962 movl %esp, %ebx 963 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp 964 TRACE_IRQS_OFF 965 call do_debug 966 movl %ebx, %esp 967 jmp ret_from_exception 968END(debug) 969 970/* 971 * NMI is doubly nasty. It can happen on the first instruction of 972 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning 973 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32 974 * switched stacks. We handle both conditions by simply checking whether we 975 * interrupted kernel code running on the SYSENTER stack. 976 */ 977ENTRY(nmi) 978 ASM_CLAC 979#ifdef CONFIG_X86_ESPFIX32 980 pushl %eax 981 movl %ss, %eax 982 cmpw $__ESPFIX_SS, %ax 983 popl %eax 984 je .Lnmi_espfix_stack 985#endif 986 987 pushl %eax # pt_regs->orig_ax 988 SAVE_ALL 989 ENCODE_FRAME_POINTER 990 xorl %edx, %edx # zero error code 991 movl %esp, %eax # pt_regs pointer 992 993 /* Are we currently on the SYSENTER stack? */ 994 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx) 995 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */ 996 cmpl $SIZEOF_SYSENTER_stack, %ecx 997 jb .Lnmi_from_sysenter_stack 998 999 /* Not on SYSENTER stack. */ 1000 call do_nmi 1001 jmp .Lrestore_all_notrace 1002 1003.Lnmi_from_sysenter_stack: 1004 /* 1005 * We're on the SYSENTER stack. Switch off. No one (not even debug) 1006 * is using the thread stack right now, so it's safe for us to use it. 1007 */ 1008 movl %esp, %ebx 1009 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp 1010 call do_nmi 1011 movl %ebx, %esp 1012 jmp .Lrestore_all_notrace 1013 1014#ifdef CONFIG_X86_ESPFIX32 1015.Lnmi_espfix_stack: 1016 /* 1017 * create the pointer to lss back 1018 */ 1019 pushl %ss 1020 pushl %esp 1021 addl $4, (%esp) 1022 /* copy the iret frame of 12 bytes */ 1023 .rept 3 1024 pushl 16(%esp) 1025 .endr 1026 pushl %eax 1027 SAVE_ALL 1028 ENCODE_FRAME_POINTER 1029 FIXUP_ESPFIX_STACK # %eax == %esp 1030 xorl %edx, %edx # zero error code 1031 call do_nmi 1032 RESTORE_REGS 1033 lss 12+4(%esp), %esp # back to espfix stack 1034 jmp .Lirq_return 1035#endif 1036END(nmi) 1037 1038ENTRY(int3) 1039 ASM_CLAC 1040 pushl $-1 # mark this as an int 1041 SAVE_ALL 1042 ENCODE_FRAME_POINTER 1043 TRACE_IRQS_OFF 1044 xorl %edx, %edx # zero error code 1045 movl %esp, %eax # pt_regs pointer 1046 call do_int3 1047 jmp ret_from_exception 1048END(int3) 1049 1050ENTRY(general_protection) 1051 pushl $do_general_protection 1052 jmp common_exception 1053END(general_protection) 1054 1055#ifdef CONFIG_KVM_GUEST 1056ENTRY(async_page_fault) 1057 ASM_CLAC 1058 pushl $do_async_page_fault 1059 jmp common_exception 1060END(async_page_fault) 1061#endif 1062 1063ENTRY(rewind_stack_do_exit) 1064 /* Prevent any naive code from trying to unwind to our caller. */ 1065 xorl %ebp, %ebp 1066 1067 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi 1068 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp 1069 1070 call do_exit 10711: jmp 1b 1072END(rewind_stack_do_exit) 1073