1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2478dc89cSAndy Lutomirski #include <linux/jump_label.h> 38c1f7558SJosh Poimboeuf #include <asm/unwind_hints.h> 48a09317bSDave Hansen #include <asm/cpufeatures.h> 58a09317bSDave Hansen #include <asm/page_types.h> 66fd166aaSPeter Zijlstra #include <asm/percpu.h> 76fd166aaSPeter Zijlstra #include <asm/asm-offsets.h> 86fd166aaSPeter Zijlstra #include <asm/processor-flags.h> 9478dc89cSAndy Lutomirski 10d36f9479SIngo Molnar /* 11d36f9479SIngo Molnar 12d36f9479SIngo Molnar x86 function call convention, 64-bit: 13d36f9479SIngo Molnar ------------------------------------- 14d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 15d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 16d36f9479SIngo Molnar --------------------------------------------------------------------------- 17d36f9479SIngo Molnar rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**] 18d36f9479SIngo Molnar 19d36f9479SIngo Molnar ( rsp is obviously invariant across normal function calls. (gcc can 'merge' 20d36f9479SIngo Molnar functions when it sees tail-call optimization possibilities) rflags is 21d36f9479SIngo Molnar clobbered. Leftover arguments are passed over the stack frame.) 22d36f9479SIngo Molnar 23d36f9479SIngo Molnar [*] In the frame-pointers case rbp is fixed to the stack frame. 24d36f9479SIngo Molnar 25d36f9479SIngo Molnar [**] for struct return values wider than 64 bits the return convention is a 26d36f9479SIngo Molnar bit more complex: up to 128 bits width we return small structures 27d36f9479SIngo Molnar straight in rax, rdx. For structures larger than that (3 words or 28d36f9479SIngo Molnar larger) the caller puts a pointer to an on-stack return struct 29d36f9479SIngo Molnar [allocated in the caller's stack frame] into the first argument - i.e. 30d36f9479SIngo Molnar into rdi. All other arguments shift up by one in this case. 31d36f9479SIngo Molnar Fortunately this case is rare in the kernel. 32d36f9479SIngo Molnar 33d36f9479SIngo Molnar For 32-bit we have the following conventions - kernel is built with 34d36f9479SIngo Molnar -mregparm=3 and -freg-struct-return: 35d36f9479SIngo Molnar 36d36f9479SIngo Molnar x86 function calling convention, 32-bit: 37d36f9479SIngo Molnar ---------------------------------------- 38d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 39d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 40d36f9479SIngo Molnar ------------------------------------------------------------------------- 41d36f9479SIngo Molnar eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**] 42d36f9479SIngo Molnar 43d36f9479SIngo Molnar ( here too esp is obviously invariant across normal function calls. eflags 44d36f9479SIngo Molnar is clobbered. Leftover arguments are passed over the stack frame. ) 45d36f9479SIngo Molnar 46d36f9479SIngo Molnar [*] In the frame-pointers case ebp is fixed to the stack frame. 47d36f9479SIngo Molnar 48d36f9479SIngo Molnar [**] We build with -freg-struct-return, which on 32-bit means similar 49d36f9479SIngo Molnar semantics as on 64-bit: edx can be used for a second return value 50d36f9479SIngo Molnar (i.e. covering integer and structure sizes up to 64 bits) - after that 51d36f9479SIngo Molnar it gets more complex and more expensive: 3-word or larger struct returns 52d36f9479SIngo Molnar get done in the caller's frame and the pointer to the return struct goes 53d36f9479SIngo Molnar into regparm0, i.e. eax - the other arguments shift up and the 54d36f9479SIngo Molnar function's register parameters degenerate to regparm=2 in essence. 55d36f9479SIngo Molnar 56d36f9479SIngo Molnar */ 57d36f9479SIngo Molnar 58d36f9479SIngo Molnar #ifdef CONFIG_X86_64 59d36f9479SIngo Molnar 60d36f9479SIngo Molnar /* 61d36f9479SIngo Molnar * 64-bit system call stack frame layout defines and helpers, 62d36f9479SIngo Molnar * for assembly code: 63d36f9479SIngo Molnar */ 64d36f9479SIngo Molnar 65d36f9479SIngo Molnar /* The layout forms the "struct pt_regs" on the stack: */ 66d36f9479SIngo Molnar /* 67d36f9479SIngo Molnar * C ABI says these regs are callee-preserved. They aren't saved on kernel entry 68d36f9479SIngo Molnar * unless syscall needs a complete, fully filled "struct pt_regs". 69d36f9479SIngo Molnar */ 70d36f9479SIngo Molnar #define R15 0*8 71d36f9479SIngo Molnar #define R14 1*8 72d36f9479SIngo Molnar #define R13 2*8 73d36f9479SIngo Molnar #define R12 3*8 74d36f9479SIngo Molnar #define RBP 4*8 75d36f9479SIngo Molnar #define RBX 5*8 76d36f9479SIngo Molnar /* These regs are callee-clobbered. Always saved on kernel entry. */ 77d36f9479SIngo Molnar #define R11 6*8 78d36f9479SIngo Molnar #define R10 7*8 79d36f9479SIngo Molnar #define R9 8*8 80d36f9479SIngo Molnar #define R8 9*8 81d36f9479SIngo Molnar #define RAX 10*8 82d36f9479SIngo Molnar #define RCX 11*8 83d36f9479SIngo Molnar #define RDX 12*8 84d36f9479SIngo Molnar #define RSI 13*8 85d36f9479SIngo Molnar #define RDI 14*8 86d36f9479SIngo Molnar /* 87d36f9479SIngo Molnar * On syscall entry, this is syscall#. On CPU exception, this is error code. 88d36f9479SIngo Molnar * On hw interrupt, it's IRQ number: 89d36f9479SIngo Molnar */ 90d36f9479SIngo Molnar #define ORIG_RAX 15*8 91d36f9479SIngo Molnar /* Return frame for iretq */ 92d36f9479SIngo Molnar #define RIP 16*8 93d36f9479SIngo Molnar #define CS 17*8 94d36f9479SIngo Molnar #define EFLAGS 18*8 95d36f9479SIngo Molnar #define RSP 19*8 96d36f9479SIngo Molnar #define SS 20*8 97d36f9479SIngo Molnar 98d36f9479SIngo Molnar #define SIZEOF_PTREGS 21*8 99d36f9479SIngo Molnar 1009e809d15SDominik Brodowski .macro PUSH_AND_CLEAR_REGS rdx=%rdx rax=%rax save_ret=0 1013f01daecSDominik Brodowski /* 1023f01daecSDominik Brodowski * Push registers and sanitize registers of values that a 1033f01daecSDominik Brodowski * speculation attack might otherwise want to exploit. The 1043f01daecSDominik Brodowski * lower registers are likely clobbered well before they 1053f01daecSDominik Brodowski * could be put to use in a speculative execution gadget. 1063f01daecSDominik Brodowski * Interleave XOR with PUSH for better uop scheduling: 1073f01daecSDominik Brodowski */ 1089e809d15SDominik Brodowski .if \save_ret 1099e809d15SDominik Brodowski pushq %rsi /* pt_regs->si */ 1109e809d15SDominik Brodowski movq 8(%rsp), %rsi /* temporarily store the return address in %rsi */ 1119e809d15SDominik Brodowski movq %rdi, 8(%rsp) /* pt_regs->di (overwriting original return address) */ 1129e809d15SDominik Brodowski .else 1133f01daecSDominik Brodowski pushq %rdi /* pt_regs->di */ 1143f01daecSDominik Brodowski pushq %rsi /* pt_regs->si */ 1159e809d15SDominik Brodowski .endif 11630907fd1SDominik Brodowski pushq \rdx /* pt_regs->dx */ 1176dc936f1SDominik Brodowski xorl %edx, %edx /* nospec dx */ 1183f01daecSDominik Brodowski pushq %rcx /* pt_regs->cx */ 1196dc936f1SDominik Brodowski xorl %ecx, %ecx /* nospec cx */ 12030907fd1SDominik Brodowski pushq \rax /* pt_regs->ax */ 1213f01daecSDominik Brodowski pushq %r8 /* pt_regs->r8 */ 122ced5d0bfSDominik Brodowski xorl %r8d, %r8d /* nospec r8 */ 1233f01daecSDominik Brodowski pushq %r9 /* pt_regs->r9 */ 124ced5d0bfSDominik Brodowski xorl %r9d, %r9d /* nospec r9 */ 1253f01daecSDominik Brodowski pushq %r10 /* pt_regs->r10 */ 126ced5d0bfSDominik Brodowski xorl %r10d, %r10d /* nospec r10 */ 1273f01daecSDominik Brodowski pushq %r11 /* pt_regs->r11 */ 128ced5d0bfSDominik Brodowski xorl %r11d, %r11d /* nospec r11*/ 1293f01daecSDominik Brodowski pushq %rbx /* pt_regs->rbx */ 1303f01daecSDominik Brodowski xorl %ebx, %ebx /* nospec rbx*/ 1313f01daecSDominik Brodowski pushq %rbp /* pt_regs->rbp */ 1323f01daecSDominik Brodowski xorl %ebp, %ebp /* nospec rbp*/ 1333f01daecSDominik Brodowski pushq %r12 /* pt_regs->r12 */ 134ced5d0bfSDominik Brodowski xorl %r12d, %r12d /* nospec r12*/ 1353f01daecSDominik Brodowski pushq %r13 /* pt_regs->r13 */ 136ced5d0bfSDominik Brodowski xorl %r13d, %r13d /* nospec r13*/ 1373f01daecSDominik Brodowski pushq %r14 /* pt_regs->r14 */ 138ced5d0bfSDominik Brodowski xorl %r14d, %r14d /* nospec r14*/ 1393f01daecSDominik Brodowski pushq %r15 /* pt_regs->r15 */ 140ced5d0bfSDominik Brodowski xorl %r15d, %r15d /* nospec r15*/ 1413f01daecSDominik Brodowski UNWIND_HINT_REGS 1429e809d15SDominik Brodowski .if \save_ret 1439e809d15SDominik Brodowski pushq %rsi /* return address on top of stack */ 1449e809d15SDominik Brodowski .endif 1453f01daecSDominik Brodowski .endm 1463f01daecSDominik Brodowski 147502af0d7SDominik Brodowski .macro POP_REGS pop_rdi=1 skip_r11rcx=0 148e872045bSAndy Lutomirski popq %r15 149e872045bSAndy Lutomirski popq %r14 150e872045bSAndy Lutomirski popq %r13 151e872045bSAndy Lutomirski popq %r12 152e872045bSAndy Lutomirski popq %rbp 153e872045bSAndy Lutomirski popq %rbx 154502af0d7SDominik Brodowski .if \skip_r11rcx 155502af0d7SDominik Brodowski popq %rsi 156502af0d7SDominik Brodowski .else 157e872045bSAndy Lutomirski popq %r11 158502af0d7SDominik Brodowski .endif 159e872045bSAndy Lutomirski popq %r10 160e872045bSAndy Lutomirski popq %r9 161e872045bSAndy Lutomirski popq %r8 162e872045bSAndy Lutomirski popq %rax 163502af0d7SDominik Brodowski .if \skip_r11rcx 164502af0d7SDominik Brodowski popq %rsi 165502af0d7SDominik Brodowski .else 166e872045bSAndy Lutomirski popq %rcx 167502af0d7SDominik Brodowski .endif 168e872045bSAndy Lutomirski popq %rdx 169e872045bSAndy Lutomirski popq %rsi 170502af0d7SDominik Brodowski .if \pop_rdi 171e872045bSAndy Lutomirski popq %rdi 172502af0d7SDominik Brodowski .endif 173d36f9479SIngo Molnar .endm 174d36f9479SIngo Molnar 175946c1911SJosh Poimboeuf /* 176946c1911SJosh Poimboeuf * This is a sneaky trick to help the unwinder find pt_regs on the stack. The 177946c1911SJosh Poimboeuf * frame pointer is replaced with an encoded pointer to pt_regs. The encoding 178946c1911SJosh Poimboeuf * is just setting the LSB, which makes it an invalid stack address and is also 179946c1911SJosh Poimboeuf * a signal to the unwinder that it's a pt_regs pointer in disguise. 180946c1911SJosh Poimboeuf * 181dde3036dSDominik Brodowski * NOTE: This macro must be used *after* PUSH_AND_CLEAR_REGS because it corrupts 182946c1911SJosh Poimboeuf * the original rbp. 183946c1911SJosh Poimboeuf */ 184946c1911SJosh Poimboeuf .macro ENCODE_FRAME_POINTER ptregs_offset=0 185946c1911SJosh Poimboeuf #ifdef CONFIG_FRAME_POINTER 1860ca7d5baSJosh Poimboeuf leaq 1+\ptregs_offset(%rsp), %rbp 187946c1911SJosh Poimboeuf #endif 188946c1911SJosh Poimboeuf .endm 189946c1911SJosh Poimboeuf 1908a09317bSDave Hansen #ifdef CONFIG_PAGE_TABLE_ISOLATION 1918a09317bSDave Hansen 1926fd166aaSPeter Zijlstra /* 1936fd166aaSPeter Zijlstra * PAGE_TABLE_ISOLATION PGDs are 8k. Flip bit 12 to switch between the two 1946fd166aaSPeter Zijlstra * halves: 1956fd166aaSPeter Zijlstra */ 196f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_BIT PAGE_SHIFT 197f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_MASK (1 << PTI_USER_PGTABLE_BIT) 198f10ee3dcSThomas Gleixner #define PTI_USER_PCID_BIT X86_CR3_PTI_PCID_USER_BIT 199f10ee3dcSThomas Gleixner #define PTI_USER_PCID_MASK (1 << PTI_USER_PCID_BIT) 200f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_AND_PCID_MASK (PTI_USER_PCID_MASK | PTI_USER_PGTABLE_MASK) 2018a09317bSDave Hansen 2026fd166aaSPeter Zijlstra .macro SET_NOFLUSH_BIT reg:req 2036fd166aaSPeter Zijlstra bts $X86_CR3_PCID_NOFLUSH_BIT, \reg 2048a09317bSDave Hansen .endm 2058a09317bSDave Hansen 2066fd166aaSPeter Zijlstra .macro ADJUST_KERNEL_CR3 reg:req 2076fd166aaSPeter Zijlstra ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID 2086fd166aaSPeter Zijlstra /* Clear PCID and "PAGE_TABLE_ISOLATION bit", point CR3 at kernel pagetables: */ 209f10ee3dcSThomas Gleixner andq $(~PTI_USER_PGTABLE_AND_PCID_MASK), \reg 2108a09317bSDave Hansen .endm 2118a09317bSDave Hansen 2128a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 213aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2148a09317bSDave Hansen mov %cr3, \scratch_reg 2158a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2168a09317bSDave Hansen mov \scratch_reg, %cr3 217aa8c6248SThomas Gleixner .Lend_\@: 2188a09317bSDave Hansen .endm 2198a09317bSDave Hansen 2206fd166aaSPeter Zijlstra #define THIS_CPU_user_pcid_flush_mask \ 2216fd166aaSPeter Zijlstra PER_CPU_VAR(cpu_tlbstate) + TLB_STATE_user_pcid_flush_mask 2226fd166aaSPeter Zijlstra 2236fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 224aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2258a09317bSDave Hansen mov %cr3, \scratch_reg 2266fd166aaSPeter Zijlstra 2276fd166aaSPeter Zijlstra ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID 2286fd166aaSPeter Zijlstra 2296fd166aaSPeter Zijlstra /* 2306fd166aaSPeter Zijlstra * Test if the ASID needs a flush. 2316fd166aaSPeter Zijlstra */ 2326fd166aaSPeter Zijlstra movq \scratch_reg, \scratch_reg2 2336fd166aaSPeter Zijlstra andq $(0x7FF), \scratch_reg /* mask ASID */ 2346fd166aaSPeter Zijlstra bt \scratch_reg, THIS_CPU_user_pcid_flush_mask 2356fd166aaSPeter Zijlstra jnc .Lnoflush_\@ 2366fd166aaSPeter Zijlstra 2376fd166aaSPeter Zijlstra /* Flush needed, clear the bit */ 2386fd166aaSPeter Zijlstra btr \scratch_reg, THIS_CPU_user_pcid_flush_mask 2396fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 240f10ee3dcSThomas Gleixner jmp .Lwrcr3_pcid_\@ 2416fd166aaSPeter Zijlstra 2426fd166aaSPeter Zijlstra .Lnoflush_\@: 2436fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 2446fd166aaSPeter Zijlstra SET_NOFLUSH_BIT \scratch_reg 2456fd166aaSPeter Zijlstra 246f10ee3dcSThomas Gleixner .Lwrcr3_pcid_\@: 247f10ee3dcSThomas Gleixner /* Flip the ASID to the user version */ 248f10ee3dcSThomas Gleixner orq $(PTI_USER_PCID_MASK), \scratch_reg 249f10ee3dcSThomas Gleixner 2506fd166aaSPeter Zijlstra .Lwrcr3_\@: 251f10ee3dcSThomas Gleixner /* Flip the PGD to the user version */ 252f10ee3dcSThomas Gleixner orq $(PTI_USER_PGTABLE_MASK), \scratch_reg 2538a09317bSDave Hansen mov \scratch_reg, %cr3 254aa8c6248SThomas Gleixner .Lend_\@: 2558a09317bSDave Hansen .endm 2568a09317bSDave Hansen 2576fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 2586fd166aaSPeter Zijlstra pushq %rax 2596fd166aaSPeter Zijlstra SWITCH_TO_USER_CR3_NOSTACK scratch_reg=\scratch_reg scratch_reg2=%rax 2606fd166aaSPeter Zijlstra popq %rax 2616fd166aaSPeter Zijlstra .endm 2626fd166aaSPeter Zijlstra 2638a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 264aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI 2658a09317bSDave Hansen movq %cr3, \scratch_reg 2668a09317bSDave Hansen movq \scratch_reg, \save_reg 2678a09317bSDave Hansen /* 268f10ee3dcSThomas Gleixner * Test the user pagetable bit. If set, then the user page tables 269f10ee3dcSThomas Gleixner * are active. If clear CR3 already has the kernel page table 270f10ee3dcSThomas Gleixner * active. 2718a09317bSDave Hansen */ 272f10ee3dcSThomas Gleixner bt $PTI_USER_PGTABLE_BIT, \scratch_reg 273f10ee3dcSThomas Gleixner jnc .Ldone_\@ 2748a09317bSDave Hansen 2758a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2768a09317bSDave Hansen movq \scratch_reg, %cr3 2778a09317bSDave Hansen 2788a09317bSDave Hansen .Ldone_\@: 2798a09317bSDave Hansen .endm 2808a09317bSDave Hansen 28121e94459SPeter Zijlstra .macro RESTORE_CR3 scratch_reg:req save_reg:req 282aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 28321e94459SPeter Zijlstra 28421e94459SPeter Zijlstra ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID 28521e94459SPeter Zijlstra 28621e94459SPeter Zijlstra /* 28721e94459SPeter Zijlstra * KERNEL pages can always resume with NOFLUSH as we do 28821e94459SPeter Zijlstra * explicit flushes. 28921e94459SPeter Zijlstra */ 290f10ee3dcSThomas Gleixner bt $PTI_USER_PGTABLE_BIT, \save_reg 29121e94459SPeter Zijlstra jnc .Lnoflush_\@ 29221e94459SPeter Zijlstra 29321e94459SPeter Zijlstra /* 29421e94459SPeter Zijlstra * Check if there's a pending flush for the user ASID we're 29521e94459SPeter Zijlstra * about to set. 29621e94459SPeter Zijlstra */ 29721e94459SPeter Zijlstra movq \save_reg, \scratch_reg 29821e94459SPeter Zijlstra andq $(0x7FF), \scratch_reg 29921e94459SPeter Zijlstra bt \scratch_reg, THIS_CPU_user_pcid_flush_mask 30021e94459SPeter Zijlstra jnc .Lnoflush_\@ 30121e94459SPeter Zijlstra 30221e94459SPeter Zijlstra btr \scratch_reg, THIS_CPU_user_pcid_flush_mask 30321e94459SPeter Zijlstra jmp .Lwrcr3_\@ 30421e94459SPeter Zijlstra 30521e94459SPeter Zijlstra .Lnoflush_\@: 30621e94459SPeter Zijlstra SET_NOFLUSH_BIT \save_reg 30721e94459SPeter Zijlstra 30821e94459SPeter Zijlstra .Lwrcr3_\@: 3098a09317bSDave Hansen /* 3108a09317bSDave Hansen * The CR3 write could be avoided when not changing its value, 3118a09317bSDave Hansen * but would require a CR3 read *and* a scratch register. 3128a09317bSDave Hansen */ 3138a09317bSDave Hansen movq \save_reg, %cr3 314aa8c6248SThomas Gleixner .Lend_\@: 3158a09317bSDave Hansen .endm 3168a09317bSDave Hansen 3178a09317bSDave Hansen #else /* CONFIG_PAGE_TABLE_ISOLATION=n: */ 3188a09317bSDave Hansen 3198a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 3208a09317bSDave Hansen .endm 3216fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 3226fd166aaSPeter Zijlstra .endm 3236fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 3248a09317bSDave Hansen .endm 3258a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 3268a09317bSDave Hansen .endm 32721e94459SPeter Zijlstra .macro RESTORE_CR3 scratch_reg:req save_reg:req 3288a09317bSDave Hansen .endm 3298a09317bSDave Hansen 3308a09317bSDave Hansen #endif 3318a09317bSDave Hansen 332afaef01cSAlexander Popov .macro STACKLEAK_ERASE_NOCLOBBER 333afaef01cSAlexander Popov #ifdef CONFIG_GCC_PLUGIN_STACKLEAK 334afaef01cSAlexander Popov PUSH_AND_CLEAR_REGS 335afaef01cSAlexander Popov call stackleak_erase 336afaef01cSAlexander Popov POP_REGS 337afaef01cSAlexander Popov #endif 338afaef01cSAlexander Popov .endm 339afaef01cSAlexander Popov 340d36f9479SIngo Molnar #endif /* CONFIG_X86_64 */ 341d36f9479SIngo Molnar 342afaef01cSAlexander Popov .macro STACKLEAK_ERASE 343afaef01cSAlexander Popov #ifdef CONFIG_GCC_PLUGIN_STACKLEAK 344afaef01cSAlexander Popov call stackleak_erase 345afaef01cSAlexander Popov #endif 346afaef01cSAlexander Popov .endm 347afaef01cSAlexander Popov 348478dc89cSAndy Lutomirski /* 349478dc89cSAndy Lutomirski * This does 'call enter_from_user_mode' unless we can avoid it based on 350478dc89cSAndy Lutomirski * kernel config or using the static jump infrastructure. 351478dc89cSAndy Lutomirski */ 352478dc89cSAndy Lutomirski .macro CALL_enter_from_user_mode 353478dc89cSAndy Lutomirski #ifdef CONFIG_CONTEXT_TRACKING 354478dc89cSAndy Lutomirski #ifdef HAVE_JUMP_LABEL 355478dc89cSAndy Lutomirski STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_enabled, def=0 356478dc89cSAndy Lutomirski #endif 357478dc89cSAndy Lutomirski call enter_from_user_mode 358478dc89cSAndy Lutomirski .Lafter_call_\@: 359478dc89cSAndy Lutomirski #endif 360478dc89cSAndy Lutomirski .endm 361