1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2478dc89cSAndy Lutomirski #include <linux/jump_label.h> 38c1f7558SJosh Poimboeuf #include <asm/unwind_hints.h> 48a09317bSDave Hansen #include <asm/cpufeatures.h> 58a09317bSDave Hansen #include <asm/page_types.h> 66fd166aaSPeter Zijlstra #include <asm/percpu.h> 76fd166aaSPeter Zijlstra #include <asm/asm-offsets.h> 86fd166aaSPeter Zijlstra #include <asm/processor-flags.h> 9478dc89cSAndy Lutomirski 10d36f9479SIngo Molnar /* 11d36f9479SIngo Molnar 12d36f9479SIngo Molnar x86 function call convention, 64-bit: 13d36f9479SIngo Molnar ------------------------------------- 14d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 15d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 16d36f9479SIngo Molnar --------------------------------------------------------------------------- 17d36f9479SIngo Molnar rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**] 18d36f9479SIngo Molnar 19d36f9479SIngo Molnar ( rsp is obviously invariant across normal function calls. (gcc can 'merge' 20d36f9479SIngo Molnar functions when it sees tail-call optimization possibilities) rflags is 21d36f9479SIngo Molnar clobbered. Leftover arguments are passed over the stack frame.) 22d36f9479SIngo Molnar 23d36f9479SIngo Molnar [*] In the frame-pointers case rbp is fixed to the stack frame. 24d36f9479SIngo Molnar 25d36f9479SIngo Molnar [**] for struct return values wider than 64 bits the return convention is a 26d36f9479SIngo Molnar bit more complex: up to 128 bits width we return small structures 27d36f9479SIngo Molnar straight in rax, rdx. For structures larger than that (3 words or 28d36f9479SIngo Molnar larger) the caller puts a pointer to an on-stack return struct 29d36f9479SIngo Molnar [allocated in the caller's stack frame] into the first argument - i.e. 30d36f9479SIngo Molnar into rdi. All other arguments shift up by one in this case. 31d36f9479SIngo Molnar Fortunately this case is rare in the kernel. 32d36f9479SIngo Molnar 33d36f9479SIngo Molnar For 32-bit we have the following conventions - kernel is built with 34d36f9479SIngo Molnar -mregparm=3 and -freg-struct-return: 35d36f9479SIngo Molnar 36d36f9479SIngo Molnar x86 function calling convention, 32-bit: 37d36f9479SIngo Molnar ---------------------------------------- 38d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 39d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 40d36f9479SIngo Molnar ------------------------------------------------------------------------- 41d36f9479SIngo Molnar eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**] 42d36f9479SIngo Molnar 43d36f9479SIngo Molnar ( here too esp is obviously invariant across normal function calls. eflags 44d36f9479SIngo Molnar is clobbered. Leftover arguments are passed over the stack frame. ) 45d36f9479SIngo Molnar 46d36f9479SIngo Molnar [*] In the frame-pointers case ebp is fixed to the stack frame. 47d36f9479SIngo Molnar 48d36f9479SIngo Molnar [**] We build with -freg-struct-return, which on 32-bit means similar 49d36f9479SIngo Molnar semantics as on 64-bit: edx can be used for a second return value 50d36f9479SIngo Molnar (i.e. covering integer and structure sizes up to 64 bits) - after that 51d36f9479SIngo Molnar it gets more complex and more expensive: 3-word or larger struct returns 52d36f9479SIngo Molnar get done in the caller's frame and the pointer to the return struct goes 53d36f9479SIngo Molnar into regparm0, i.e. eax - the other arguments shift up and the 54d36f9479SIngo Molnar function's register parameters degenerate to regparm=2 in essence. 55d36f9479SIngo Molnar 56d36f9479SIngo Molnar */ 57d36f9479SIngo Molnar 58d36f9479SIngo Molnar #ifdef CONFIG_X86_64 59d36f9479SIngo Molnar 60d36f9479SIngo Molnar /* 61d36f9479SIngo Molnar * 64-bit system call stack frame layout defines and helpers, 62d36f9479SIngo Molnar * for assembly code: 63d36f9479SIngo Molnar */ 64d36f9479SIngo Molnar 65d36f9479SIngo Molnar /* The layout forms the "struct pt_regs" on the stack: */ 66d36f9479SIngo Molnar /* 67d36f9479SIngo Molnar * C ABI says these regs are callee-preserved. They aren't saved on kernel entry 68d36f9479SIngo Molnar * unless syscall needs a complete, fully filled "struct pt_regs". 69d36f9479SIngo Molnar */ 70d36f9479SIngo Molnar #define R15 0*8 71d36f9479SIngo Molnar #define R14 1*8 72d36f9479SIngo Molnar #define R13 2*8 73d36f9479SIngo Molnar #define R12 3*8 74d36f9479SIngo Molnar #define RBP 4*8 75d36f9479SIngo Molnar #define RBX 5*8 76d36f9479SIngo Molnar /* These regs are callee-clobbered. Always saved on kernel entry. */ 77d36f9479SIngo Molnar #define R11 6*8 78d36f9479SIngo Molnar #define R10 7*8 79d36f9479SIngo Molnar #define R9 8*8 80d36f9479SIngo Molnar #define R8 9*8 81d36f9479SIngo Molnar #define RAX 10*8 82d36f9479SIngo Molnar #define RCX 11*8 83d36f9479SIngo Molnar #define RDX 12*8 84d36f9479SIngo Molnar #define RSI 13*8 85d36f9479SIngo Molnar #define RDI 14*8 86d36f9479SIngo Molnar /* 87d36f9479SIngo Molnar * On syscall entry, this is syscall#. On CPU exception, this is error code. 88d36f9479SIngo Molnar * On hw interrupt, it's IRQ number: 89d36f9479SIngo Molnar */ 90d36f9479SIngo Molnar #define ORIG_RAX 15*8 91d36f9479SIngo Molnar /* Return frame for iretq */ 92d36f9479SIngo Molnar #define RIP 16*8 93d36f9479SIngo Molnar #define CS 17*8 94d36f9479SIngo Molnar #define EFLAGS 18*8 95d36f9479SIngo Molnar #define RSP 19*8 96d36f9479SIngo Molnar #define SS 20*8 97d36f9479SIngo Molnar 98d36f9479SIngo Molnar #define SIZEOF_PTREGS 21*8 99d36f9479SIngo Molnar 10059df2268SAlexander Kuleshov .macro ALLOC_PT_GPREGS_ON_STACK 10159df2268SAlexander Kuleshov addq $-(15*8), %rsp 102d36f9479SIngo Molnar .endm 103d36f9479SIngo Molnar 104d36f9479SIngo Molnar .macro SAVE_C_REGS_HELPER offset=0 rax=1 rcx=1 r8910=1 r11=1 105d36f9479SIngo Molnar .if \r11 106d36f9479SIngo Molnar movq %r11, 6*8+\offset(%rsp) 107d36f9479SIngo Molnar .endif 108d36f9479SIngo Molnar .if \r8910 109d36f9479SIngo Molnar movq %r10, 7*8+\offset(%rsp) 110d36f9479SIngo Molnar movq %r9, 8*8+\offset(%rsp) 111d36f9479SIngo Molnar movq %r8, 9*8+\offset(%rsp) 112d36f9479SIngo Molnar .endif 113d36f9479SIngo Molnar .if \rax 114d36f9479SIngo Molnar movq %rax, 10*8+\offset(%rsp) 115d36f9479SIngo Molnar .endif 116d36f9479SIngo Molnar .if \rcx 117d36f9479SIngo Molnar movq %rcx, 11*8+\offset(%rsp) 118d36f9479SIngo Molnar .endif 119d36f9479SIngo Molnar movq %rdx, 12*8+\offset(%rsp) 120d36f9479SIngo Molnar movq %rsi, 13*8+\offset(%rsp) 121d36f9479SIngo Molnar movq %rdi, 14*8+\offset(%rsp) 1228c1f7558SJosh Poimboeuf UNWIND_HINT_REGS offset=\offset extra=0 123d36f9479SIngo Molnar .endm 124d36f9479SIngo Molnar .macro SAVE_C_REGS offset=0 125d36f9479SIngo Molnar SAVE_C_REGS_HELPER \offset, 1, 1, 1, 1 126d36f9479SIngo Molnar .endm 127d36f9479SIngo Molnar .macro SAVE_C_REGS_EXCEPT_RAX_RCX offset=0 128d36f9479SIngo Molnar SAVE_C_REGS_HELPER \offset, 0, 0, 1, 1 129d36f9479SIngo Molnar .endm 130d36f9479SIngo Molnar .macro SAVE_C_REGS_EXCEPT_R891011 131d36f9479SIngo Molnar SAVE_C_REGS_HELPER 0, 1, 1, 0, 0 132d36f9479SIngo Molnar .endm 133d36f9479SIngo Molnar .macro SAVE_C_REGS_EXCEPT_RCX_R891011 134d36f9479SIngo Molnar SAVE_C_REGS_HELPER 0, 1, 0, 0, 0 135d36f9479SIngo Molnar .endm 136d36f9479SIngo Molnar .macro SAVE_C_REGS_EXCEPT_RAX_RCX_R11 137d36f9479SIngo Molnar SAVE_C_REGS_HELPER 0, 0, 0, 1, 0 138d36f9479SIngo Molnar .endm 139d36f9479SIngo Molnar 140d36f9479SIngo Molnar .macro SAVE_EXTRA_REGS offset=0 141d36f9479SIngo Molnar movq %r15, 0*8+\offset(%rsp) 142d36f9479SIngo Molnar movq %r14, 1*8+\offset(%rsp) 143d36f9479SIngo Molnar movq %r13, 2*8+\offset(%rsp) 144d36f9479SIngo Molnar movq %r12, 3*8+\offset(%rsp) 145d36f9479SIngo Molnar movq %rbp, 4*8+\offset(%rsp) 146d36f9479SIngo Molnar movq %rbx, 5*8+\offset(%rsp) 1478c1f7558SJosh Poimboeuf UNWIND_HINT_REGS offset=\offset 148d36f9479SIngo Molnar .endm 149d36f9479SIngo Molnar 150e872045bSAndy Lutomirski .macro POP_EXTRA_REGS 151e872045bSAndy Lutomirski popq %r15 152e872045bSAndy Lutomirski popq %r14 153e872045bSAndy Lutomirski popq %r13 154e872045bSAndy Lutomirski popq %r12 155e872045bSAndy Lutomirski popq %rbp 156e872045bSAndy Lutomirski popq %rbx 157d36f9479SIngo Molnar .endm 158d36f9479SIngo Molnar 159e872045bSAndy Lutomirski .macro POP_C_REGS 160e872045bSAndy Lutomirski popq %r11 161e872045bSAndy Lutomirski popq %r10 162e872045bSAndy Lutomirski popq %r9 163e872045bSAndy Lutomirski popq %r8 164e872045bSAndy Lutomirski popq %rax 165e872045bSAndy Lutomirski popq %rcx 166e872045bSAndy Lutomirski popq %rdx 167e872045bSAndy Lutomirski popq %rsi 168e872045bSAndy Lutomirski popq %rdi 169d36f9479SIngo Molnar .endm 170d36f9479SIngo Molnar 171d36f9479SIngo Molnar .macro icebp 172d36f9479SIngo Molnar .byte 0xf1 173d36f9479SIngo Molnar .endm 174d36f9479SIngo Molnar 175946c1911SJosh Poimboeuf /* 176946c1911SJosh Poimboeuf * This is a sneaky trick to help the unwinder find pt_regs on the stack. The 177946c1911SJosh Poimboeuf * frame pointer is replaced with an encoded pointer to pt_regs. The encoding 178946c1911SJosh Poimboeuf * is just setting the LSB, which makes it an invalid stack address and is also 179946c1911SJosh Poimboeuf * a signal to the unwinder that it's a pt_regs pointer in disguise. 180946c1911SJosh Poimboeuf * 181946c1911SJosh Poimboeuf * NOTE: This macro must be used *after* SAVE_EXTRA_REGS because it corrupts 182946c1911SJosh Poimboeuf * the original rbp. 183946c1911SJosh Poimboeuf */ 184946c1911SJosh Poimboeuf .macro ENCODE_FRAME_POINTER ptregs_offset=0 185946c1911SJosh Poimboeuf #ifdef CONFIG_FRAME_POINTER 186946c1911SJosh Poimboeuf .if \ptregs_offset 187946c1911SJosh Poimboeuf leaq \ptregs_offset(%rsp), %rbp 188946c1911SJosh Poimboeuf .else 189946c1911SJosh Poimboeuf mov %rsp, %rbp 190946c1911SJosh Poimboeuf .endif 191946c1911SJosh Poimboeuf orq $0x1, %rbp 192946c1911SJosh Poimboeuf #endif 193946c1911SJosh Poimboeuf .endm 194946c1911SJosh Poimboeuf 1958a09317bSDave Hansen #ifdef CONFIG_PAGE_TABLE_ISOLATION 1968a09317bSDave Hansen 1976fd166aaSPeter Zijlstra /* 1986fd166aaSPeter Zijlstra * PAGE_TABLE_ISOLATION PGDs are 8k. Flip bit 12 to switch between the two 1996fd166aaSPeter Zijlstra * halves: 2006fd166aaSPeter Zijlstra */ 2016fd166aaSPeter Zijlstra #define PTI_SWITCH_PGTABLES_MASK (1<<PAGE_SHIFT) 2026fd166aaSPeter Zijlstra #define PTI_SWITCH_MASK (PTI_SWITCH_PGTABLES_MASK|(1<<X86_CR3_PTI_SWITCH_BIT)) 2038a09317bSDave Hansen 2046fd166aaSPeter Zijlstra .macro SET_NOFLUSH_BIT reg:req 2056fd166aaSPeter Zijlstra bts $X86_CR3_PCID_NOFLUSH_BIT, \reg 2068a09317bSDave Hansen .endm 2078a09317bSDave Hansen 2086fd166aaSPeter Zijlstra .macro ADJUST_KERNEL_CR3 reg:req 2096fd166aaSPeter Zijlstra ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID 2106fd166aaSPeter Zijlstra /* Clear PCID and "PAGE_TABLE_ISOLATION bit", point CR3 at kernel pagetables: */ 2116fd166aaSPeter Zijlstra andq $(~PTI_SWITCH_MASK), \reg 2128a09317bSDave Hansen .endm 2138a09317bSDave Hansen 2148a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 215aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2168a09317bSDave Hansen mov %cr3, \scratch_reg 2178a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2188a09317bSDave Hansen mov \scratch_reg, %cr3 219aa8c6248SThomas Gleixner .Lend_\@: 2208a09317bSDave Hansen .endm 2218a09317bSDave Hansen 2226fd166aaSPeter Zijlstra #define THIS_CPU_user_pcid_flush_mask \ 2236fd166aaSPeter Zijlstra PER_CPU_VAR(cpu_tlbstate) + TLB_STATE_user_pcid_flush_mask 2246fd166aaSPeter Zijlstra 2256fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 226aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2278a09317bSDave Hansen mov %cr3, \scratch_reg 2286fd166aaSPeter Zijlstra 2296fd166aaSPeter Zijlstra ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID 2306fd166aaSPeter Zijlstra 2316fd166aaSPeter Zijlstra /* 2326fd166aaSPeter Zijlstra * Test if the ASID needs a flush. 2336fd166aaSPeter Zijlstra */ 2346fd166aaSPeter Zijlstra movq \scratch_reg, \scratch_reg2 2356fd166aaSPeter Zijlstra andq $(0x7FF), \scratch_reg /* mask ASID */ 2366fd166aaSPeter Zijlstra bt \scratch_reg, THIS_CPU_user_pcid_flush_mask 2376fd166aaSPeter Zijlstra jnc .Lnoflush_\@ 2386fd166aaSPeter Zijlstra 2396fd166aaSPeter Zijlstra /* Flush needed, clear the bit */ 2406fd166aaSPeter Zijlstra btr \scratch_reg, THIS_CPU_user_pcid_flush_mask 2416fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 2426fd166aaSPeter Zijlstra jmp .Lwrcr3_\@ 2436fd166aaSPeter Zijlstra 2446fd166aaSPeter Zijlstra .Lnoflush_\@: 2456fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 2466fd166aaSPeter Zijlstra SET_NOFLUSH_BIT \scratch_reg 2476fd166aaSPeter Zijlstra 2486fd166aaSPeter Zijlstra .Lwrcr3_\@: 2496fd166aaSPeter Zijlstra /* Flip the PGD and ASID to the user version */ 2506fd166aaSPeter Zijlstra orq $(PTI_SWITCH_MASK), \scratch_reg 2518a09317bSDave Hansen mov \scratch_reg, %cr3 252aa8c6248SThomas Gleixner .Lend_\@: 2538a09317bSDave Hansen .endm 2548a09317bSDave Hansen 2556fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 2566fd166aaSPeter Zijlstra pushq %rax 2576fd166aaSPeter Zijlstra SWITCH_TO_USER_CR3_NOSTACK scratch_reg=\scratch_reg scratch_reg2=%rax 2586fd166aaSPeter Zijlstra popq %rax 2596fd166aaSPeter Zijlstra .endm 2606fd166aaSPeter Zijlstra 2618a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 262aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI 2638a09317bSDave Hansen movq %cr3, \scratch_reg 2648a09317bSDave Hansen movq \scratch_reg, \save_reg 2658a09317bSDave Hansen /* 2666fd166aaSPeter Zijlstra * Is the "switch mask" all zero? That means that both of 2676fd166aaSPeter Zijlstra * these are zero: 2686fd166aaSPeter Zijlstra * 2696fd166aaSPeter Zijlstra * 1. The user/kernel PCID bit, and 2706fd166aaSPeter Zijlstra * 2. The user/kernel "bit" that points CR3 to the 2716fd166aaSPeter Zijlstra * bottom half of the 8k PGD 2726fd166aaSPeter Zijlstra * 2736fd166aaSPeter Zijlstra * That indicates a kernel CR3 value, not a user CR3. 2748a09317bSDave Hansen */ 2758a09317bSDave Hansen testq $(PTI_SWITCH_MASK), \scratch_reg 2768a09317bSDave Hansen jz .Ldone_\@ 2778a09317bSDave Hansen 2788a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2798a09317bSDave Hansen movq \scratch_reg, %cr3 2808a09317bSDave Hansen 2818a09317bSDave Hansen .Ldone_\@: 2828a09317bSDave Hansen .endm 2838a09317bSDave Hansen 2848a09317bSDave Hansen .macro RESTORE_CR3 save_reg:req 285aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2868a09317bSDave Hansen /* 2878a09317bSDave Hansen * The CR3 write could be avoided when not changing its value, 2888a09317bSDave Hansen * but would require a CR3 read *and* a scratch register. 2898a09317bSDave Hansen */ 2908a09317bSDave Hansen movq \save_reg, %cr3 291aa8c6248SThomas Gleixner .Lend_\@: 2928a09317bSDave Hansen .endm 2938a09317bSDave Hansen 2948a09317bSDave Hansen #else /* CONFIG_PAGE_TABLE_ISOLATION=n: */ 2958a09317bSDave Hansen 2968a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 2978a09317bSDave Hansen .endm 2986fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 2996fd166aaSPeter Zijlstra .endm 3006fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 3018a09317bSDave Hansen .endm 3028a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 3038a09317bSDave Hansen .endm 3048a09317bSDave Hansen .macro RESTORE_CR3 save_reg:req 3058a09317bSDave Hansen .endm 3068a09317bSDave Hansen 3078a09317bSDave Hansen #endif 3088a09317bSDave Hansen 309d36f9479SIngo Molnar #endif /* CONFIG_X86_64 */ 310d36f9479SIngo Molnar 311478dc89cSAndy Lutomirski /* 312478dc89cSAndy Lutomirski * This does 'call enter_from_user_mode' unless we can avoid it based on 313478dc89cSAndy Lutomirski * kernel config or using the static jump infrastructure. 314478dc89cSAndy Lutomirski */ 315478dc89cSAndy Lutomirski .macro CALL_enter_from_user_mode 316478dc89cSAndy Lutomirski #ifdef CONFIG_CONTEXT_TRACKING 317478dc89cSAndy Lutomirski #ifdef HAVE_JUMP_LABEL 318478dc89cSAndy Lutomirski STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_enabled, def=0 319478dc89cSAndy Lutomirski #endif 320478dc89cSAndy Lutomirski call enter_from_user_mode 321478dc89cSAndy Lutomirski .Lafter_call_\@: 322478dc89cSAndy Lutomirski #endif 323478dc89cSAndy Lutomirski .endm 324