1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2478dc89cSAndy Lutomirski #include <linux/jump_label.h> 38c1f7558SJosh Poimboeuf #include <asm/unwind_hints.h> 48a09317bSDave Hansen #include <asm/cpufeatures.h> 58a09317bSDave Hansen #include <asm/page_types.h> 66fd166aaSPeter Zijlstra #include <asm/percpu.h> 76fd166aaSPeter Zijlstra #include <asm/asm-offsets.h> 86fd166aaSPeter Zijlstra #include <asm/processor-flags.h> 9478dc89cSAndy Lutomirski 10d36f9479SIngo Molnar /* 11d36f9479SIngo Molnar 12d36f9479SIngo Molnar x86 function call convention, 64-bit: 13d36f9479SIngo Molnar ------------------------------------- 14d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 15d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 16d36f9479SIngo Molnar --------------------------------------------------------------------------- 17d36f9479SIngo Molnar rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**] 18d36f9479SIngo Molnar 19d36f9479SIngo Molnar ( rsp is obviously invariant across normal function calls. (gcc can 'merge' 20d36f9479SIngo Molnar functions when it sees tail-call optimization possibilities) rflags is 21d36f9479SIngo Molnar clobbered. Leftover arguments are passed over the stack frame.) 22d36f9479SIngo Molnar 23d36f9479SIngo Molnar [*] In the frame-pointers case rbp is fixed to the stack frame. 24d36f9479SIngo Molnar 25d36f9479SIngo Molnar [**] for struct return values wider than 64 bits the return convention is a 26d36f9479SIngo Molnar bit more complex: up to 128 bits width we return small structures 27d36f9479SIngo Molnar straight in rax, rdx. For structures larger than that (3 words or 28d36f9479SIngo Molnar larger) the caller puts a pointer to an on-stack return struct 29d36f9479SIngo Molnar [allocated in the caller's stack frame] into the first argument - i.e. 30d36f9479SIngo Molnar into rdi. All other arguments shift up by one in this case. 31d36f9479SIngo Molnar Fortunately this case is rare in the kernel. 32d36f9479SIngo Molnar 33d36f9479SIngo Molnar For 32-bit we have the following conventions - kernel is built with 34d36f9479SIngo Molnar -mregparm=3 and -freg-struct-return: 35d36f9479SIngo Molnar 36d36f9479SIngo Molnar x86 function calling convention, 32-bit: 37d36f9479SIngo Molnar ---------------------------------------- 38d36f9479SIngo Molnar arguments | callee-saved | extra caller-saved | return 39d36f9479SIngo Molnar [callee-clobbered] | | [callee-clobbered] | 40d36f9479SIngo Molnar ------------------------------------------------------------------------- 41d36f9479SIngo Molnar eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**] 42d36f9479SIngo Molnar 43d36f9479SIngo Molnar ( here too esp is obviously invariant across normal function calls. eflags 44d36f9479SIngo Molnar is clobbered. Leftover arguments are passed over the stack frame. ) 45d36f9479SIngo Molnar 46d36f9479SIngo Molnar [*] In the frame-pointers case ebp is fixed to the stack frame. 47d36f9479SIngo Molnar 48d36f9479SIngo Molnar [**] We build with -freg-struct-return, which on 32-bit means similar 49d36f9479SIngo Molnar semantics as on 64-bit: edx can be used for a second return value 50d36f9479SIngo Molnar (i.e. covering integer and structure sizes up to 64 bits) - after that 51d36f9479SIngo Molnar it gets more complex and more expensive: 3-word or larger struct returns 52d36f9479SIngo Molnar get done in the caller's frame and the pointer to the return struct goes 53d36f9479SIngo Molnar into regparm0, i.e. eax - the other arguments shift up and the 54d36f9479SIngo Molnar function's register parameters degenerate to regparm=2 in essence. 55d36f9479SIngo Molnar 56d36f9479SIngo Molnar */ 57d36f9479SIngo Molnar 58d36f9479SIngo Molnar #ifdef CONFIG_X86_64 59d36f9479SIngo Molnar 60d36f9479SIngo Molnar /* 61d36f9479SIngo Molnar * 64-bit system call stack frame layout defines and helpers, 62d36f9479SIngo Molnar * for assembly code: 63d36f9479SIngo Molnar */ 64d36f9479SIngo Molnar 65d36f9479SIngo Molnar /* The layout forms the "struct pt_regs" on the stack: */ 66d36f9479SIngo Molnar /* 67d36f9479SIngo Molnar * C ABI says these regs are callee-preserved. They aren't saved on kernel entry 68d36f9479SIngo Molnar * unless syscall needs a complete, fully filled "struct pt_regs". 69d36f9479SIngo Molnar */ 70d36f9479SIngo Molnar #define R15 0*8 71d36f9479SIngo Molnar #define R14 1*8 72d36f9479SIngo Molnar #define R13 2*8 73d36f9479SIngo Molnar #define R12 3*8 74d36f9479SIngo Molnar #define RBP 4*8 75d36f9479SIngo Molnar #define RBX 5*8 76d36f9479SIngo Molnar /* These regs are callee-clobbered. Always saved on kernel entry. */ 77d36f9479SIngo Molnar #define R11 6*8 78d36f9479SIngo Molnar #define R10 7*8 79d36f9479SIngo Molnar #define R9 8*8 80d36f9479SIngo Molnar #define R8 9*8 81d36f9479SIngo Molnar #define RAX 10*8 82d36f9479SIngo Molnar #define RCX 11*8 83d36f9479SIngo Molnar #define RDX 12*8 84d36f9479SIngo Molnar #define RSI 13*8 85d36f9479SIngo Molnar #define RDI 14*8 86d36f9479SIngo Molnar /* 87d36f9479SIngo Molnar * On syscall entry, this is syscall#. On CPU exception, this is error code. 88d36f9479SIngo Molnar * On hw interrupt, it's IRQ number: 89d36f9479SIngo Molnar */ 90d36f9479SIngo Molnar #define ORIG_RAX 15*8 91d36f9479SIngo Molnar /* Return frame for iretq */ 92d36f9479SIngo Molnar #define RIP 16*8 93d36f9479SIngo Molnar #define CS 17*8 94d36f9479SIngo Molnar #define EFLAGS 18*8 95d36f9479SIngo Molnar #define RSP 19*8 96d36f9479SIngo Molnar #define SS 20*8 97d36f9479SIngo Molnar 98d36f9479SIngo Molnar #define SIZEOF_PTREGS 21*8 99d36f9479SIngo Molnar 1009e809d15SDominik Brodowski .macro PUSH_AND_CLEAR_REGS rdx=%rdx rax=%rax save_ret=0 1019e809d15SDominik Brodowski .if \save_ret 1029e809d15SDominik Brodowski pushq %rsi /* pt_regs->si */ 1039e809d15SDominik Brodowski movq 8(%rsp), %rsi /* temporarily store the return address in %rsi */ 1049e809d15SDominik Brodowski movq %rdi, 8(%rsp) /* pt_regs->di (overwriting original return address) */ 1059e809d15SDominik Brodowski .else 1063f01daecSDominik Brodowski pushq %rdi /* pt_regs->di */ 1073f01daecSDominik Brodowski pushq %rsi /* pt_regs->si */ 1089e809d15SDominik Brodowski .endif 10930907fd1SDominik Brodowski pushq \rdx /* pt_regs->dx */ 1103f01daecSDominik Brodowski pushq %rcx /* pt_regs->cx */ 11130907fd1SDominik Brodowski pushq \rax /* pt_regs->ax */ 1123f01daecSDominik Brodowski pushq %r8 /* pt_regs->r8 */ 1133f01daecSDominik Brodowski pushq %r9 /* pt_regs->r9 */ 1143f01daecSDominik Brodowski pushq %r10 /* pt_regs->r10 */ 1153f01daecSDominik Brodowski pushq %r11 /* pt_regs->r11 */ 1163f01daecSDominik Brodowski pushq %rbx /* pt_regs->rbx */ 1173f01daecSDominik Brodowski pushq %rbp /* pt_regs->rbp */ 1183f01daecSDominik Brodowski pushq %r12 /* pt_regs->r12 */ 1193f01daecSDominik Brodowski pushq %r13 /* pt_regs->r13 */ 1203f01daecSDominik Brodowski pushq %r14 /* pt_regs->r14 */ 1213f01daecSDominik Brodowski pushq %r15 /* pt_regs->r15 */ 1223f01daecSDominik Brodowski UNWIND_HINT_REGS 12306a9750eSJosh Poimboeuf 1249e809d15SDominik Brodowski .if \save_ret 1259e809d15SDominik Brodowski pushq %rsi /* return address on top of stack */ 1269e809d15SDominik Brodowski .endif 12706a9750eSJosh Poimboeuf 12806a9750eSJosh Poimboeuf /* 12906a9750eSJosh Poimboeuf * Sanitize registers of values that a speculation attack might 13006a9750eSJosh Poimboeuf * otherwise want to exploit. The lower registers are likely clobbered 13106a9750eSJosh Poimboeuf * well before they could be put to use in a speculative execution 13206a9750eSJosh Poimboeuf * gadget. 13306a9750eSJosh Poimboeuf */ 13406a9750eSJosh Poimboeuf xorl %edx, %edx /* nospec dx */ 13506a9750eSJosh Poimboeuf xorl %ecx, %ecx /* nospec cx */ 13606a9750eSJosh Poimboeuf xorl %r8d, %r8d /* nospec r8 */ 13706a9750eSJosh Poimboeuf xorl %r9d, %r9d /* nospec r9 */ 13806a9750eSJosh Poimboeuf xorl %r10d, %r10d /* nospec r10 */ 13906a9750eSJosh Poimboeuf xorl %r11d, %r11d /* nospec r11 */ 14006a9750eSJosh Poimboeuf xorl %ebx, %ebx /* nospec rbx */ 14106a9750eSJosh Poimboeuf xorl %ebp, %ebp /* nospec rbp */ 14206a9750eSJosh Poimboeuf xorl %r12d, %r12d /* nospec r12 */ 14306a9750eSJosh Poimboeuf xorl %r13d, %r13d /* nospec r13 */ 14406a9750eSJosh Poimboeuf xorl %r14d, %r14d /* nospec r14 */ 14506a9750eSJosh Poimboeuf xorl %r15d, %r15d /* nospec r15 */ 14606a9750eSJosh Poimboeuf 1473f01daecSDominik Brodowski .endm 1483f01daecSDominik Brodowski 149502af0d7SDominik Brodowski .macro POP_REGS pop_rdi=1 skip_r11rcx=0 150e872045bSAndy Lutomirski popq %r15 151e872045bSAndy Lutomirski popq %r14 152e872045bSAndy Lutomirski popq %r13 153e872045bSAndy Lutomirski popq %r12 154e872045bSAndy Lutomirski popq %rbp 155e872045bSAndy Lutomirski popq %rbx 156502af0d7SDominik Brodowski .if \skip_r11rcx 157502af0d7SDominik Brodowski popq %rsi 158502af0d7SDominik Brodowski .else 159e872045bSAndy Lutomirski popq %r11 160502af0d7SDominik Brodowski .endif 161e872045bSAndy Lutomirski popq %r10 162e872045bSAndy Lutomirski popq %r9 163e872045bSAndy Lutomirski popq %r8 164e872045bSAndy Lutomirski popq %rax 165502af0d7SDominik Brodowski .if \skip_r11rcx 166502af0d7SDominik Brodowski popq %rsi 167502af0d7SDominik Brodowski .else 168e872045bSAndy Lutomirski popq %rcx 169502af0d7SDominik Brodowski .endif 170e872045bSAndy Lutomirski popq %rdx 171e872045bSAndy Lutomirski popq %rsi 172502af0d7SDominik Brodowski .if \pop_rdi 173e872045bSAndy Lutomirski popq %rdi 174502af0d7SDominik Brodowski .endif 175d36f9479SIngo Molnar .endm 176d36f9479SIngo Molnar 1778a09317bSDave Hansen #ifdef CONFIG_PAGE_TABLE_ISOLATION 1788a09317bSDave Hansen 1796fd166aaSPeter Zijlstra /* 1806fd166aaSPeter Zijlstra * PAGE_TABLE_ISOLATION PGDs are 8k. Flip bit 12 to switch between the two 1816fd166aaSPeter Zijlstra * halves: 1826fd166aaSPeter Zijlstra */ 183f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_BIT PAGE_SHIFT 184f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_MASK (1 << PTI_USER_PGTABLE_BIT) 185f10ee3dcSThomas Gleixner #define PTI_USER_PCID_BIT X86_CR3_PTI_PCID_USER_BIT 186f10ee3dcSThomas Gleixner #define PTI_USER_PCID_MASK (1 << PTI_USER_PCID_BIT) 187f10ee3dcSThomas Gleixner #define PTI_USER_PGTABLE_AND_PCID_MASK (PTI_USER_PCID_MASK | PTI_USER_PGTABLE_MASK) 1888a09317bSDave Hansen 1896fd166aaSPeter Zijlstra .macro SET_NOFLUSH_BIT reg:req 1906fd166aaSPeter Zijlstra bts $X86_CR3_PCID_NOFLUSH_BIT, \reg 1918a09317bSDave Hansen .endm 1928a09317bSDave Hansen 1936fd166aaSPeter Zijlstra .macro ADJUST_KERNEL_CR3 reg:req 1946fd166aaSPeter Zijlstra ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID 1956fd166aaSPeter Zijlstra /* Clear PCID and "PAGE_TABLE_ISOLATION bit", point CR3 at kernel pagetables: */ 196f10ee3dcSThomas Gleixner andq $(~PTI_USER_PGTABLE_AND_PCID_MASK), \reg 1978a09317bSDave Hansen .endm 1988a09317bSDave Hansen 1998a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 200aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2018a09317bSDave Hansen mov %cr3, \scratch_reg 2028a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2038a09317bSDave Hansen mov \scratch_reg, %cr3 204aa8c6248SThomas Gleixner .Lend_\@: 2058a09317bSDave Hansen .endm 2068a09317bSDave Hansen 2076fd166aaSPeter Zijlstra #define THIS_CPU_user_pcid_flush_mask \ 2086fd166aaSPeter Zijlstra PER_CPU_VAR(cpu_tlbstate) + TLB_STATE_user_pcid_flush_mask 2096fd166aaSPeter Zijlstra 2106fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 211aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 2128a09317bSDave Hansen mov %cr3, \scratch_reg 2136fd166aaSPeter Zijlstra 2146fd166aaSPeter Zijlstra ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID 2156fd166aaSPeter Zijlstra 2166fd166aaSPeter Zijlstra /* 2176fd166aaSPeter Zijlstra * Test if the ASID needs a flush. 2186fd166aaSPeter Zijlstra */ 2196fd166aaSPeter Zijlstra movq \scratch_reg, \scratch_reg2 2206fd166aaSPeter Zijlstra andq $(0x7FF), \scratch_reg /* mask ASID */ 2216fd166aaSPeter Zijlstra bt \scratch_reg, THIS_CPU_user_pcid_flush_mask 2226fd166aaSPeter Zijlstra jnc .Lnoflush_\@ 2236fd166aaSPeter Zijlstra 2246fd166aaSPeter Zijlstra /* Flush needed, clear the bit */ 2256fd166aaSPeter Zijlstra btr \scratch_reg, THIS_CPU_user_pcid_flush_mask 2266fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 227f10ee3dcSThomas Gleixner jmp .Lwrcr3_pcid_\@ 2286fd166aaSPeter Zijlstra 2296fd166aaSPeter Zijlstra .Lnoflush_\@: 2306fd166aaSPeter Zijlstra movq \scratch_reg2, \scratch_reg 2316fd166aaSPeter Zijlstra SET_NOFLUSH_BIT \scratch_reg 2326fd166aaSPeter Zijlstra 233f10ee3dcSThomas Gleixner .Lwrcr3_pcid_\@: 234f10ee3dcSThomas Gleixner /* Flip the ASID to the user version */ 235f10ee3dcSThomas Gleixner orq $(PTI_USER_PCID_MASK), \scratch_reg 236f10ee3dcSThomas Gleixner 2376fd166aaSPeter Zijlstra .Lwrcr3_\@: 238f10ee3dcSThomas Gleixner /* Flip the PGD to the user version */ 239f10ee3dcSThomas Gleixner orq $(PTI_USER_PGTABLE_MASK), \scratch_reg 2408a09317bSDave Hansen mov \scratch_reg, %cr3 241aa8c6248SThomas Gleixner .Lend_\@: 2428a09317bSDave Hansen .endm 2438a09317bSDave Hansen 2446fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 2456fd166aaSPeter Zijlstra pushq %rax 2466fd166aaSPeter Zijlstra SWITCH_TO_USER_CR3_NOSTACK scratch_reg=\scratch_reg scratch_reg2=%rax 2476fd166aaSPeter Zijlstra popq %rax 2486fd166aaSPeter Zijlstra .endm 2496fd166aaSPeter Zijlstra 2508a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 251aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI 2528a09317bSDave Hansen movq %cr3, \scratch_reg 2538a09317bSDave Hansen movq \scratch_reg, \save_reg 2548a09317bSDave Hansen /* 255f10ee3dcSThomas Gleixner * Test the user pagetable bit. If set, then the user page tables 256f10ee3dcSThomas Gleixner * are active. If clear CR3 already has the kernel page table 257f10ee3dcSThomas Gleixner * active. 2588a09317bSDave Hansen */ 259f10ee3dcSThomas Gleixner bt $PTI_USER_PGTABLE_BIT, \scratch_reg 260f10ee3dcSThomas Gleixner jnc .Ldone_\@ 2618a09317bSDave Hansen 2628a09317bSDave Hansen ADJUST_KERNEL_CR3 \scratch_reg 2638a09317bSDave Hansen movq \scratch_reg, %cr3 2648a09317bSDave Hansen 2658a09317bSDave Hansen .Ldone_\@: 2668a09317bSDave Hansen .endm 2678a09317bSDave Hansen 26821e94459SPeter Zijlstra .macro RESTORE_CR3 scratch_reg:req save_reg:req 269aa8c6248SThomas Gleixner ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI 27021e94459SPeter Zijlstra 27121e94459SPeter Zijlstra ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID 27221e94459SPeter Zijlstra 27321e94459SPeter Zijlstra /* 27421e94459SPeter Zijlstra * KERNEL pages can always resume with NOFLUSH as we do 27521e94459SPeter Zijlstra * explicit flushes. 27621e94459SPeter Zijlstra */ 277f10ee3dcSThomas Gleixner bt $PTI_USER_PGTABLE_BIT, \save_reg 27821e94459SPeter Zijlstra jnc .Lnoflush_\@ 27921e94459SPeter Zijlstra 28021e94459SPeter Zijlstra /* 28121e94459SPeter Zijlstra * Check if there's a pending flush for the user ASID we're 28221e94459SPeter Zijlstra * about to set. 28321e94459SPeter Zijlstra */ 28421e94459SPeter Zijlstra movq \save_reg, \scratch_reg 28521e94459SPeter Zijlstra andq $(0x7FF), \scratch_reg 28621e94459SPeter Zijlstra bt \scratch_reg, THIS_CPU_user_pcid_flush_mask 28721e94459SPeter Zijlstra jnc .Lnoflush_\@ 28821e94459SPeter Zijlstra 28921e94459SPeter Zijlstra btr \scratch_reg, THIS_CPU_user_pcid_flush_mask 29021e94459SPeter Zijlstra jmp .Lwrcr3_\@ 29121e94459SPeter Zijlstra 29221e94459SPeter Zijlstra .Lnoflush_\@: 29321e94459SPeter Zijlstra SET_NOFLUSH_BIT \save_reg 29421e94459SPeter Zijlstra 29521e94459SPeter Zijlstra .Lwrcr3_\@: 2968a09317bSDave Hansen /* 2978a09317bSDave Hansen * The CR3 write could be avoided when not changing its value, 2988a09317bSDave Hansen * but would require a CR3 read *and* a scratch register. 2998a09317bSDave Hansen */ 3008a09317bSDave Hansen movq \save_reg, %cr3 301aa8c6248SThomas Gleixner .Lend_\@: 3028a09317bSDave Hansen .endm 3038a09317bSDave Hansen 3048a09317bSDave Hansen #else /* CONFIG_PAGE_TABLE_ISOLATION=n: */ 3058a09317bSDave Hansen 3068a09317bSDave Hansen .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req 3078a09317bSDave Hansen .endm 3086fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_NOSTACK scratch_reg:req scratch_reg2:req 3096fd166aaSPeter Zijlstra .endm 3106fd166aaSPeter Zijlstra .macro SWITCH_TO_USER_CR3_STACK scratch_reg:req 3118a09317bSDave Hansen .endm 3128a09317bSDave Hansen .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req 3138a09317bSDave Hansen .endm 31421e94459SPeter Zijlstra .macro RESTORE_CR3 scratch_reg:req save_reg:req 3158a09317bSDave Hansen .endm 3168a09317bSDave Hansen 3178a09317bSDave Hansen #endif 3188a09317bSDave Hansen 31918ec54fdSJosh Poimboeuf /* 32018ec54fdSJosh Poimboeuf * Mitigate Spectre v1 for conditional swapgs code paths. 32118ec54fdSJosh Poimboeuf * 32218ec54fdSJosh Poimboeuf * FENCE_SWAPGS_USER_ENTRY is used in the user entry swapgs code path, to 32318ec54fdSJosh Poimboeuf * prevent a speculative swapgs when coming from kernel space. 32418ec54fdSJosh Poimboeuf * 32518ec54fdSJosh Poimboeuf * FENCE_SWAPGS_KERNEL_ENTRY is used in the kernel entry non-swapgs code path, 32618ec54fdSJosh Poimboeuf * to prevent the swapgs from getting speculatively skipped when coming from 32718ec54fdSJosh Poimboeuf * user space. 32818ec54fdSJosh Poimboeuf */ 32918ec54fdSJosh Poimboeuf .macro FENCE_SWAPGS_USER_ENTRY 33018ec54fdSJosh Poimboeuf ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER 33118ec54fdSJosh Poimboeuf .endm 33218ec54fdSJosh Poimboeuf .macro FENCE_SWAPGS_KERNEL_ENTRY 33318ec54fdSJosh Poimboeuf ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL 33418ec54fdSJosh Poimboeuf .endm 33518ec54fdSJosh Poimboeuf 336afaef01cSAlexander Popov .macro STACKLEAK_ERASE_NOCLOBBER 337afaef01cSAlexander Popov #ifdef CONFIG_GCC_PLUGIN_STACKLEAK 338afaef01cSAlexander Popov PUSH_AND_CLEAR_REGS 339afaef01cSAlexander Popov call stackleak_erase 340afaef01cSAlexander Popov POP_REGS 341afaef01cSAlexander Popov #endif 342afaef01cSAlexander Popov .endm 343afaef01cSAlexander Popov 344633260faSThomas Gleixner #else /* CONFIG_X86_64 */ 345633260faSThomas Gleixner # undef UNWIND_HINT_IRET_REGS 346633260faSThomas Gleixner # define UNWIND_HINT_IRET_REGS 347633260faSThomas Gleixner #endif /* !CONFIG_X86_64 */ 348d36f9479SIngo Molnar 349afaef01cSAlexander Popov .macro STACKLEAK_ERASE 350afaef01cSAlexander Popov #ifdef CONFIG_GCC_PLUGIN_STACKLEAK 351afaef01cSAlexander Popov call stackleak_erase 352afaef01cSAlexander Popov #endif 353afaef01cSAlexander Popov .endm 354afaef01cSAlexander Popov 355478dc89cSAndy Lutomirski /* 356478dc89cSAndy Lutomirski * This does 'call enter_from_user_mode' unless we can avoid it based on 357478dc89cSAndy Lutomirski * kernel config or using the static jump infrastructure. 358478dc89cSAndy Lutomirski */ 359478dc89cSAndy Lutomirski .macro CALL_enter_from_user_mode 360478dc89cSAndy Lutomirski #ifdef CONFIG_CONTEXT_TRACKING 361e9666d10SMasahiro Yamada #ifdef CONFIG_JUMP_LABEL 36274c57875SFrederic Weisbecker STATIC_JUMP_IF_FALSE .Lafter_call_\@, context_tracking_key, def=0 363478dc89cSAndy Lutomirski #endif 364478dc89cSAndy Lutomirski call enter_from_user_mode 365478dc89cSAndy Lutomirski .Lafter_call_\@: 366478dc89cSAndy Lutomirski #endif 367478dc89cSAndy Lutomirski .endm 36855aedddbSPeter Zijlstra 36955aedddbSPeter Zijlstra #ifdef CONFIG_PARAVIRT_XXL 37055aedddbSPeter Zijlstra #define GET_CR2_INTO(reg) GET_CR2_INTO_AX ; _ASM_MOV %_ASM_AX, reg 37155aedddbSPeter Zijlstra #else 37255aedddbSPeter Zijlstra #define GET_CR2_INTO(reg) _ASM_MOV %cr2, reg 37355aedddbSPeter Zijlstra #endif 374