1 /* -*- linux-c -*- ------------------------------------------------------- * 2 * 3 * Copyright (C) 1991, 1992 Linus Torvalds 4 * Copyright 2007 rPath, Inc. - All Rights Reserved 5 * 6 * This file is part of the Linux kernel, and is made available under 7 * the terms of the GNU General Public License version 2. 8 * 9 * ----------------------------------------------------------------------- */ 10 11 /* 12 * Check for obligatory CPU features and abort if the features are not 13 * present. This code should be compilable as 16-, 32- or 64-bit 14 * code, so be very careful with types and inline assembly. 15 * 16 * This code should not contain any messages; that requires an 17 * additional wrapper. 18 * 19 * As written, this code is not safe for inclusion into the kernel 20 * proper (after FPU initialization, in particular). 21 */ 22 23 #ifdef _SETUP 24 # include "boot.h" 25 #endif 26 #include <linux/types.h> 27 #include <asm/processor-flags.h> 28 #include <asm/required-features.h> 29 #include <asm/msr-index.h> 30 31 static u32 err_flags[NCAPINTS]; 32 33 static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY; 34 35 static const u32 req_flags[NCAPINTS] = 36 { 37 REQUIRED_MASK0, 38 REQUIRED_MASK1, 39 0, /* REQUIRED_MASK2 not implemented in this file */ 40 0, /* REQUIRED_MASK3 not implemented in this file */ 41 REQUIRED_MASK4, 42 0, /* REQUIRED_MASK5 not implemented in this file */ 43 REQUIRED_MASK6, 44 0, /* REQUIRED_MASK7 not implemented in this file */ 45 }; 46 47 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) 48 49 static int is_amd(void) 50 { 51 return cpu_vendor[0] == A32('A', 'u', 't', 'h') && 52 cpu_vendor[1] == A32('e', 'n', 't', 'i') && 53 cpu_vendor[2] == A32('c', 'A', 'M', 'D'); 54 } 55 56 static int is_centaur(void) 57 { 58 return cpu_vendor[0] == A32('C', 'e', 'n', 't') && 59 cpu_vendor[1] == A32('a', 'u', 'r', 'H') && 60 cpu_vendor[2] == A32('a', 'u', 'l', 's'); 61 } 62 63 static int is_transmeta(void) 64 { 65 return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && 66 cpu_vendor[1] == A32('i', 'n', 'e', 'T') && 67 cpu_vendor[2] == A32('M', 'x', '8', '6'); 68 } 69 70 /* Returns a bitmask of which words we have error bits in */ 71 static int check_cpuflags(void) 72 { 73 u32 err; 74 int i; 75 76 err = 0; 77 for (i = 0; i < NCAPINTS; i++) { 78 err_flags[i] = req_flags[i] & ~cpu.flags[i]; 79 if (err_flags[i]) 80 err |= 1 << i; 81 } 82 83 return err; 84 } 85 86 /* 87 * Returns -1 on error. 88 * 89 * *cpu_level is set to the current CPU level; *req_level to the required 90 * level. x86-64 is considered level 64 for this purpose. 91 * 92 * *err_flags_ptr is set to the flags error array if there are flags missing. 93 */ 94 int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) 95 { 96 int err; 97 98 memset(&cpu.flags, 0, sizeof cpu.flags); 99 cpu.level = 3; 100 101 if (has_eflag(X86_EFLAGS_AC)) 102 cpu.level = 4; 103 104 get_cpuflags(); 105 err = check_cpuflags(); 106 107 if (test_bit(X86_FEATURE_LM, cpu.flags)) 108 cpu.level = 64; 109 110 if (err == 0x01 && 111 !(err_flags[0] & 112 ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) && 113 is_amd()) { 114 /* If this is an AMD and we're only missing SSE+SSE2, try to 115 turn them on */ 116 117 u32 ecx = MSR_K7_HWCR; 118 u32 eax, edx; 119 120 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 121 eax &= ~(1 << 15); 122 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 123 124 get_cpuflags(); /* Make sure it really did something */ 125 err = check_cpuflags(); 126 } else if (err == 0x01 && 127 !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) && 128 is_centaur() && cpu.model >= 6) { 129 /* If this is a VIA C3, we might have to enable CX8 130 explicitly */ 131 132 u32 ecx = MSR_VIA_FCR; 133 u32 eax, edx; 134 135 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 136 eax |= (1<<1)|(1<<7); 137 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 138 139 set_bit(X86_FEATURE_CX8, cpu.flags); 140 err = check_cpuflags(); 141 } else if (err == 0x01 && is_transmeta()) { 142 /* Transmeta might have masked feature bits in word 0 */ 143 144 u32 ecx = 0x80860004; 145 u32 eax, edx; 146 u32 level = 1; 147 148 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); 149 asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx)); 150 asm("cpuid" 151 : "+a" (level), "=d" (cpu.flags[0]) 152 : : "ecx", "ebx"); 153 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); 154 155 err = check_cpuflags(); 156 } 157 158 if (err_flags_ptr) 159 *err_flags_ptr = err ? err_flags : NULL; 160 if (cpu_level_ptr) 161 *cpu_level_ptr = cpu.level; 162 if (req_level_ptr) 163 *req_level_ptr = req_level; 164 165 return (cpu.level < req_level || err) ? -1 : 0; 166 } 167