1 #include <linux/efi.h>
2 #include <asm/e820/types.h>
3 #include <asm/processor.h>
4 #include <asm/efi.h>
5 #include "pgtable.h"
6 #include "../string.h"
7 
8 /*
9  * __force_order is used by special_insns.h asm code to force instruction
10  * serialization.
11  *
12  * It is not referenced from the code, but GCC < 5 with -fPIE would fail
13  * due to an undefined symbol. Define it to make these ancient GCCs work.
14  */
15 unsigned long __force_order;
16 
17 #define BIOS_START_MIN		0x20000U	/* 128K, less than this is insane */
18 #define BIOS_START_MAX		0x9f000U	/* 640K, absolute maximum */
19 
20 struct paging_config {
21 	unsigned long trampoline_start;
22 	unsigned long l5_required;
23 };
24 
25 /* Buffer to preserve trampoline memory */
26 static char trampoline_save[TRAMPOLINE_32BIT_SIZE];
27 
28 /*
29  * Trampoline address will be printed by extract_kernel() for debugging
30  * purposes.
31  *
32  * Avoid putting the pointer into .bss as it will be cleared between
33  * paging_prepare() and extract_kernel().
34  */
35 unsigned long *trampoline_32bit __section(.data);
36 
37 extern struct boot_params *boot_params;
38 int cmdline_find_option_bool(const char *option);
39 
40 static unsigned long find_trampoline_placement(void)
41 {
42 	unsigned long bios_start = 0, ebda_start = 0;
43 	struct boot_e820_entry *entry;
44 	char *signature;
45 	int i;
46 
47 	/*
48 	 * Find a suitable spot for the trampoline.
49 	 * This code is based on reserve_bios_regions().
50 	 */
51 
52 	/*
53 	 * EFI systems may not provide legacy ROM. The memory may not be mapped
54 	 * at all.
55 	 *
56 	 * Only look for values in the legacy ROM for non-EFI system.
57 	 */
58 	signature = (char *)&boot_params->efi_info.efi_loader_signature;
59 	if (strncmp(signature, EFI32_LOADER_SIGNATURE, 4) &&
60 	    strncmp(signature, EFI64_LOADER_SIGNATURE, 4)) {
61 		ebda_start = *(unsigned short *)0x40e << 4;
62 		bios_start = *(unsigned short *)0x413 << 10;
63 	}
64 
65 	if (bios_start < BIOS_START_MIN || bios_start > BIOS_START_MAX)
66 		bios_start = BIOS_START_MAX;
67 
68 	if (ebda_start > BIOS_START_MIN && ebda_start < bios_start)
69 		bios_start = ebda_start;
70 
71 	bios_start = round_down(bios_start, PAGE_SIZE);
72 
73 	/* Find the first usable memory region under bios_start. */
74 	for (i = boot_params->e820_entries - 1; i >= 0; i--) {
75 		entry = &boot_params->e820_table[i];
76 
77 		/* Skip all entries above bios_start. */
78 		if (bios_start <= entry->addr)
79 			continue;
80 
81 		/* Skip non-RAM entries. */
82 		if (entry->type != E820_TYPE_RAM)
83 			continue;
84 
85 		/* Adjust bios_start to the end of the entry if needed. */
86 		if (bios_start > entry->addr + entry->size)
87 			bios_start = entry->addr + entry->size;
88 
89 		/* Keep bios_start page-aligned. */
90 		bios_start = round_down(bios_start, PAGE_SIZE);
91 
92 		/* Skip the entry if it's too small. */
93 		if (bios_start - TRAMPOLINE_32BIT_SIZE < entry->addr)
94 			continue;
95 
96 		break;
97 	}
98 
99 	/* Place the trampoline just below the end of low memory */
100 	return bios_start - TRAMPOLINE_32BIT_SIZE;
101 }
102 
103 struct paging_config paging_prepare(void *rmode)
104 {
105 	struct paging_config paging_config = {};
106 
107 	/* Initialize boot_params. Required for cmdline_find_option_bool(). */
108 	boot_params = rmode;
109 
110 	/*
111 	 * Check if LA57 is desired and supported.
112 	 *
113 	 * There are several parts to the check:
114 	 *   - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y
115 	 *   - if user asked to disable 5-level paging: no5lvl in cmdline
116 	 *   - if the machine supports 5-level paging:
117 	 *     + CPUID leaf 7 is supported
118 	 *     + the leaf has the feature bit set
119 	 *
120 	 * That's substitute for boot_cpu_has() in early boot code.
121 	 */
122 	if (IS_ENABLED(CONFIG_X86_5LEVEL) &&
123 			!cmdline_find_option_bool("no5lvl") &&
124 			native_cpuid_eax(0) >= 7 &&
125 			(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
126 		paging_config.l5_required = 1;
127 	}
128 
129 	paging_config.trampoline_start = find_trampoline_placement();
130 
131 	trampoline_32bit = (unsigned long *)paging_config.trampoline_start;
132 
133 	/* Preserve trampoline memory */
134 	memcpy(trampoline_save, trampoline_32bit, TRAMPOLINE_32BIT_SIZE);
135 
136 	/* Clear trampoline memory first */
137 	memset(trampoline_32bit, 0, TRAMPOLINE_32BIT_SIZE);
138 
139 	/* Copy trampoline code in place */
140 	memcpy(trampoline_32bit + TRAMPOLINE_32BIT_CODE_OFFSET / sizeof(unsigned long),
141 			&trampoline_32bit_src, TRAMPOLINE_32BIT_CODE_SIZE);
142 
143 	/*
144 	 * The code below prepares page table in trampoline memory.
145 	 *
146 	 * The new page table will be used by trampoline code for switching
147 	 * from 4- to 5-level paging or vice versa.
148 	 *
149 	 * If switching is not required, the page table is unused: trampoline
150 	 * code wouldn't touch CR3.
151 	 */
152 
153 	/*
154 	 * We are not going to use the page table in trampoline memory if we
155 	 * are already in the desired paging mode.
156 	 */
157 	if (paging_config.l5_required == !!(native_read_cr4() & X86_CR4_LA57))
158 		goto out;
159 
160 	if (paging_config.l5_required) {
161 		/*
162 		 * For 4- to 5-level paging transition, set up current CR3 as
163 		 * the first and the only entry in a new top-level page table.
164 		 */
165 		trampoline_32bit[TRAMPOLINE_32BIT_PGTABLE_OFFSET] = __native_read_cr3() | _PAGE_TABLE_NOENC;
166 	} else {
167 		unsigned long src;
168 
169 		/*
170 		 * For 5- to 4-level paging transition, copy page table pointed
171 		 * by first entry in the current top-level page table as our
172 		 * new top-level page table.
173 		 *
174 		 * We cannot just point to the page table from trampoline as it
175 		 * may be above 4G.
176 		 */
177 		src = *(unsigned long *)__native_read_cr3() & PAGE_MASK;
178 		memcpy(trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long),
179 		       (void *)src, PAGE_SIZE);
180 	}
181 
182 out:
183 	return paging_config;
184 }
185 
186 void cleanup_trampoline(void *pgtable)
187 {
188 	void *trampoline_pgtable;
189 
190 	trampoline_pgtable = trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long);
191 
192 	/*
193 	 * Move the top level page table out of trampoline memory,
194 	 * if it's there.
195 	 */
196 	if ((void *)__native_read_cr3() == trampoline_pgtable) {
197 		memcpy(pgtable, trampoline_pgtable, PAGE_SIZE);
198 		native_write_cr3((unsigned long)pgtable);
199 	}
200 
201 	/* Restore trampoline memory */
202 	memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE);
203 }
204