1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/boot/head.S 4 * 5 * Copyright (C) 1991, 1992, 1993 Linus Torvalds 6 */ 7 8/* 9 * head.S contains the 32-bit startup code. 10 * 11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where 12 * the page directory will exist. The startup code will be overwritten by 13 * the page directory. [According to comments etc elsewhere on a compressed 14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC] 15 * 16 * Page 0 is deliberately kept safe, since System Management Mode code in 17 * laptops may need to access the BIOS data stored there. This is also 18 * useful for future device drivers that either access the BIOS via VM86 19 * mode. 20 */ 21 22/* 23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 24 */ 25 .code32 26 .text 27 28#include <linux/init.h> 29#include <linux/linkage.h> 30#include <asm/segment.h> 31#include <asm/boot.h> 32#include <asm/msr.h> 33#include <asm/processor-flags.h> 34#include <asm/asm-offsets.h> 35#include <asm/bootparam.h> 36#include "pgtable.h" 37 38/* 39 * Locally defined symbols should be marked hidden: 40 */ 41 .hidden _bss 42 .hidden _ebss 43 .hidden _got 44 .hidden _egot 45 46 __HEAD 47 .code32 48ENTRY(startup_32) 49 /* 50 * 32bit entry is 0 and it is ABI so immutable! 51 * If we come here directly from a bootloader, 52 * kernel(text+data+bss+brk) ramdisk, zero_page, command line 53 * all need to be under the 4G limit. 54 */ 55 cld 56 /* 57 * Test KEEP_SEGMENTS flag to see if the bootloader is asking 58 * us to not reload segments 59 */ 60 testb $KEEP_SEGMENTS, BP_loadflags(%esi) 61 jnz 1f 62 63 cli 64 movl $(__BOOT_DS), %eax 65 movl %eax, %ds 66 movl %eax, %es 67 movl %eax, %ss 681: 69 70/* 71 * Calculate the delta between where we were compiled to run 72 * at and where we were actually loaded at. This can only be done 73 * with a short local call on x86. Nothing else will tell us what 74 * address we are running at. The reserved chunk of the real-mode 75 * data at 0x1e4 (defined as a scratch field) are used as the stack 76 * for this calculation. Only 4 bytes are needed. 77 */ 78 leal (BP_scratch+4)(%esi), %esp 79 call 1f 801: popl %ebp 81 subl $1b, %ebp 82 83/* setup a stack and make sure cpu supports long mode. */ 84 movl $boot_stack_end, %eax 85 addl %ebp, %eax 86 movl %eax, %esp 87 88 call verify_cpu 89 testl %eax, %eax 90 jnz no_longmode 91 92/* 93 * Compute the delta between where we were compiled to run at 94 * and where the code will actually run at. 95 * 96 * %ebp contains the address we are loaded at by the boot loader and %ebx 97 * contains the address where we should move the kernel image temporarily 98 * for safe in-place decompression. 99 */ 100 101#ifdef CONFIG_RELOCATABLE 102 movl %ebp, %ebx 103 movl BP_kernel_alignment(%esi), %eax 104 decl %eax 105 addl %eax, %ebx 106 notl %eax 107 andl %eax, %ebx 108 cmpl $LOAD_PHYSICAL_ADDR, %ebx 109 jge 1f 110#endif 111 movl $LOAD_PHYSICAL_ADDR, %ebx 1121: 113 114 /* Target address to relocate to for decompression */ 115 movl BP_init_size(%esi), %eax 116 subl $_end, %eax 117 addl %eax, %ebx 118 119/* 120 * Prepare for entering 64 bit mode 121 */ 122 123 /* Load new GDT with the 64bit segments using 32bit descriptor */ 124 addl %ebp, gdt+2(%ebp) 125 lgdt gdt(%ebp) 126 127 /* Enable PAE mode */ 128 movl %cr4, %eax 129 orl $X86_CR4_PAE, %eax 130 movl %eax, %cr4 131 132 /* 133 * Build early 4G boot pagetable 134 */ 135 /* 136 * If SEV is active then set the encryption mask in the page tables. 137 * This will insure that when the kernel is copied and decompressed 138 * it will be done so encrypted. 139 */ 140 call get_sev_encryption_bit 141 xorl %edx, %edx 142 testl %eax, %eax 143 jz 1f 144 subl $32, %eax /* Encryption bit is always above bit 31 */ 145 bts %eax, %edx /* Set encryption mask for page tables */ 1461: 147 148 /* Initialize Page tables to 0 */ 149 leal pgtable(%ebx), %edi 150 xorl %eax, %eax 151 movl $(BOOT_INIT_PGT_SIZE/4), %ecx 152 rep stosl 153 154 /* Build Level 4 */ 155 leal pgtable + 0(%ebx), %edi 156 leal 0x1007 (%edi), %eax 157 movl %eax, 0(%edi) 158 addl %edx, 4(%edi) 159 160 /* Build Level 3 */ 161 leal pgtable + 0x1000(%ebx), %edi 162 leal 0x1007(%edi), %eax 163 movl $4, %ecx 1641: movl %eax, 0x00(%edi) 165 addl %edx, 0x04(%edi) 166 addl $0x00001000, %eax 167 addl $8, %edi 168 decl %ecx 169 jnz 1b 170 171 /* Build Level 2 */ 172 leal pgtable + 0x2000(%ebx), %edi 173 movl $0x00000183, %eax 174 movl $2048, %ecx 1751: movl %eax, 0(%edi) 176 addl %edx, 4(%edi) 177 addl $0x00200000, %eax 178 addl $8, %edi 179 decl %ecx 180 jnz 1b 181 182 /* Enable the boot page tables */ 183 leal pgtable(%ebx), %eax 184 movl %eax, %cr3 185 186 /* Enable Long mode in EFER (Extended Feature Enable Register) */ 187 movl $MSR_EFER, %ecx 188 rdmsr 189 btsl $_EFER_LME, %eax 190 wrmsr 191 192 /* After gdt is loaded */ 193 xorl %eax, %eax 194 lldt %ax 195 movl $__BOOT_TSS, %eax 196 ltr %ax 197 198 /* 199 * Setup for the jump to 64bit mode 200 * 201 * When the jump is performend we will be in long mode but 202 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1 203 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use 204 * the new gdt/idt that has __KERNEL_CS with CS.L = 1. 205 * We place all of the values on our mini stack so lret can 206 * used to perform that far jump. 207 */ 208 pushl $__KERNEL_CS 209 leal startup_64(%ebp), %eax 210#ifdef CONFIG_EFI_MIXED 211 movl efi32_config(%ebp), %ebx 212 cmp $0, %ebx 213 jz 1f 214 leal handover_entry(%ebp), %eax 2151: 216#endif 217 pushl %eax 218 219 /* Enter paged protected Mode, activating Long Mode */ 220 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */ 221 movl %eax, %cr0 222 223 /* Jump from 32bit compatibility mode into 64bit mode. */ 224 lret 225ENDPROC(startup_32) 226 227#ifdef CONFIG_EFI_MIXED 228 .org 0x190 229ENTRY(efi32_stub_entry) 230 add $0x4, %esp /* Discard return address */ 231 popl %ecx 232 popl %edx 233 popl %esi 234 235 leal (BP_scratch+4)(%esi), %esp 236 call 1f 2371: pop %ebp 238 subl $1b, %ebp 239 240 movl %ecx, efi32_config(%ebp) 241 movl %edx, efi32_config+8(%ebp) 242 sgdtl efi32_boot_gdt(%ebp) 243 244 leal efi32_config(%ebp), %eax 245 movl %eax, efi_config(%ebp) 246 247 jmp startup_32 248ENDPROC(efi32_stub_entry) 249#endif 250 251 .code64 252 .org 0x200 253ENTRY(startup_64) 254 /* 255 * 64bit entry is 0x200 and it is ABI so immutable! 256 * We come here either from startup_32 or directly from a 257 * 64bit bootloader. 258 * If we come here from a bootloader, kernel(text+data+bss+brk), 259 * ramdisk, zero_page, command line could be above 4G. 260 * We depend on an identity mapped page table being provided 261 * that maps our entire kernel(text+data+bss+brk), zero page 262 * and command line. 263 */ 264 265 /* Setup data segments. */ 266 xorl %eax, %eax 267 movl %eax, %ds 268 movl %eax, %es 269 movl %eax, %ss 270 movl %eax, %fs 271 movl %eax, %gs 272 273 /* 274 * Compute the decompressed kernel start address. It is where 275 * we were loaded at aligned to a 2M boundary. %rbp contains the 276 * decompressed kernel start address. 277 * 278 * If it is a relocatable kernel then decompress and run the kernel 279 * from load address aligned to 2MB addr, otherwise decompress and 280 * run the kernel from LOAD_PHYSICAL_ADDR 281 * 282 * We cannot rely on the calculation done in 32-bit mode, since we 283 * may have been invoked via the 64-bit entry point. 284 */ 285 286 /* Start with the delta to where the kernel will run at. */ 287#ifdef CONFIG_RELOCATABLE 288 leaq startup_32(%rip) /* - $startup_32 */, %rbp 289 movl BP_kernel_alignment(%rsi), %eax 290 decl %eax 291 addq %rax, %rbp 292 notq %rax 293 andq %rax, %rbp 294 cmpq $LOAD_PHYSICAL_ADDR, %rbp 295 jge 1f 296#endif 297 movq $LOAD_PHYSICAL_ADDR, %rbp 2981: 299 300 /* Target address to relocate to for decompression */ 301 movl BP_init_size(%rsi), %ebx 302 subl $_end, %ebx 303 addq %rbp, %rbx 304 305 /* Set up the stack */ 306 leaq boot_stack_end(%rbx), %rsp 307 308 /* 309 * At this point we are in long mode with 4-level paging enabled, 310 * but we might want to enable 5-level paging or vice versa. 311 * 312 * The problem is that we cannot do it directly. Setting or clearing 313 * CR4.LA57 in long mode would trigger #GP. So we need to switch off 314 * long mode and paging first. 315 * 316 * We also need a trampoline in lower memory to switch over from 317 * 4- to 5-level paging for cases when the bootloader puts the kernel 318 * above 4G, but didn't enable 5-level paging for us. 319 * 320 * The same trampoline can be used to switch from 5- to 4-level paging 321 * mode, like when starting 4-level paging kernel via kexec() when 322 * original kernel worked in 5-level paging mode. 323 * 324 * For the trampoline, we need the top page table to reside in lower 325 * memory as we don't have a way to load 64-bit values into CR3 in 326 * 32-bit mode. 327 * 328 * We go though the trampoline even if we don't have to: if we're 329 * already in a desired paging mode. This way the trampoline code gets 330 * tested on every boot. 331 */ 332 333 /* Make sure we have GDT with 32-bit code segment */ 334 leaq gdt(%rip), %rax 335 movq %rax, gdt64+2(%rip) 336 lgdt gdt64(%rip) 337 338 /* 339 * paging_prepare() sets up the trampoline and checks if we need to 340 * enable 5-level paging. 341 * 342 * Address of the trampoline is returned in RAX. 343 * Non zero RDX on return means we need to enable 5-level paging. 344 * 345 * RSI holds real mode data and needs to be preserved across 346 * this function call. 347 */ 348 pushq %rsi 349 call paging_prepare 350 popq %rsi 351 352 /* Save the trampoline address in RCX */ 353 movq %rax, %rcx 354 355 /* 356 * Load the address of trampoline_return() into RDI. 357 * It will be used by the trampoline to return to the main code. 358 */ 359 leaq trampoline_return(%rip), %rdi 360 361 /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */ 362 pushq $__KERNEL32_CS 363 leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax 364 pushq %rax 365 lretq 366trampoline_return: 367 /* Restore the stack, the 32-bit trampoline uses its own stack */ 368 leaq boot_stack_end(%rbx), %rsp 369 370 /* 371 * cleanup_trampoline() would restore trampoline memory. 372 * 373 * RSI holds real mode data and needs to be preserved across 374 * this function call. 375 */ 376 pushq %rsi 377 call cleanup_trampoline 378 popq %rsi 379 380 /* Zero EFLAGS */ 381 pushq $0 382 popfq 383 384/* 385 * Copy the compressed kernel to the end of our buffer 386 * where decompression in place becomes safe. 387 */ 388 pushq %rsi 389 leaq (_bss-8)(%rip), %rsi 390 leaq (_bss-8)(%rbx), %rdi 391 movq $_bss /* - $startup_32 */, %rcx 392 shrq $3, %rcx 393 std 394 rep movsq 395 cld 396 popq %rsi 397 398/* 399 * Jump to the relocated address. 400 */ 401 leaq relocated(%rbx), %rax 402 jmp *%rax 403 404#ifdef CONFIG_EFI_STUB 405 406/* The entry point for the PE/COFF executable is efi_pe_entry. */ 407ENTRY(efi_pe_entry) 408 movq %rcx, efi64_config(%rip) /* Handle */ 409 movq %rdx, efi64_config+8(%rip) /* EFI System table pointer */ 410 411 leaq efi64_config(%rip), %rax 412 movq %rax, efi_config(%rip) 413 414 call 1f 4151: popq %rbp 416 subq $1b, %rbp 417 418 /* 419 * Relocate efi_config->call(). 420 */ 421 addq %rbp, efi64_config+40(%rip) 422 423 movq %rax, %rdi 424 call make_boot_params 425 cmpq $0,%rax 426 je fail 427 mov %rax, %rsi 428 leaq startup_32(%rip), %rax 429 movl %eax, BP_code32_start(%rsi) 430 jmp 2f /* Skip the relocation */ 431 432handover_entry: 433 call 1f 4341: popq %rbp 435 subq $1b, %rbp 436 437 /* 438 * Relocate efi_config->call(). 439 */ 440 movq efi_config(%rip), %rax 441 addq %rbp, 40(%rax) 4422: 443 movq efi_config(%rip), %rdi 444 call efi_main 445 movq %rax,%rsi 446 cmpq $0,%rax 447 jne 2f 448fail: 449 /* EFI init failed, so hang. */ 450 hlt 451 jmp fail 4522: 453 movl BP_code32_start(%esi), %eax 454 leaq startup_64(%rax), %rax 455 jmp *%rax 456ENDPROC(efi_pe_entry) 457 458 .org 0x390 459ENTRY(efi64_stub_entry) 460 movq %rdi, efi64_config(%rip) /* Handle */ 461 movq %rsi, efi64_config+8(%rip) /* EFI System table pointer */ 462 463 leaq efi64_config(%rip), %rax 464 movq %rax, efi_config(%rip) 465 466 movq %rdx, %rsi 467 jmp handover_entry 468ENDPROC(efi64_stub_entry) 469#endif 470 471 .text 472relocated: 473 474/* 475 * Clear BSS (stack is currently empty) 476 */ 477 xorl %eax, %eax 478 leaq _bss(%rip), %rdi 479 leaq _ebss(%rip), %rcx 480 subq %rdi, %rcx 481 shrq $3, %rcx 482 rep stosq 483 484/* 485 * Adjust our own GOT 486 */ 487 leaq _got(%rip), %rdx 488 leaq _egot(%rip), %rcx 4891: 490 cmpq %rcx, %rdx 491 jae 2f 492 addq %rbx, (%rdx) 493 addq $8, %rdx 494 jmp 1b 4952: 496 497/* 498 * Do the extraction, and jump to the new kernel.. 499 */ 500 pushq %rsi /* Save the real mode argument */ 501 movq %rsi, %rdi /* real mode address */ 502 leaq boot_heap(%rip), %rsi /* malloc area for uncompression */ 503 leaq input_data(%rip), %rdx /* input_data */ 504 movl $z_input_len, %ecx /* input_len */ 505 movq %rbp, %r8 /* output target address */ 506 movq $z_output_len, %r9 /* decompressed length, end of relocs */ 507 call extract_kernel /* returns kernel location in %rax */ 508 popq %rsi 509 510/* 511 * Jump to the decompressed kernel. 512 */ 513 jmp *%rax 514 515 .code32 516/* 517 * This is the 32-bit trampoline that will be copied over to low memory. 518 * 519 * RDI contains the return address (might be above 4G). 520 * ECX contains the base address of the trampoline memory. 521 * Non zero RDX on return means we need to enable 5-level paging. 522 */ 523ENTRY(trampoline_32bit_src) 524 /* Set up data and stack segments */ 525 movl $__KERNEL_DS, %eax 526 movl %eax, %ds 527 movl %eax, %ss 528 529 /* Set up new stack */ 530 leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp 531 532 /* Disable paging */ 533 movl %cr0, %eax 534 btrl $X86_CR0_PG_BIT, %eax 535 movl %eax, %cr0 536 537 /* Check what paging mode we want to be in after the trampoline */ 538 cmpl $0, %edx 539 jz 1f 540 541 /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */ 542 movl %cr4, %eax 543 testl $X86_CR4_LA57, %eax 544 jnz 3f 545 jmp 2f 5461: 547 /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */ 548 movl %cr4, %eax 549 testl $X86_CR4_LA57, %eax 550 jz 3f 5512: 552 /* Point CR3 to the trampoline's new top level page table */ 553 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax 554 movl %eax, %cr3 5553: 556 /* Enable PAE and LA57 (if required) paging modes */ 557 movl $X86_CR4_PAE, %eax 558 cmpl $0, %edx 559 jz 1f 560 orl $X86_CR4_LA57, %eax 5611: 562 movl %eax, %cr4 563 564 /* Calculate address of paging_enabled() once we are executing in the trampoline */ 565 leal paging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax 566 567 /* Prepare the stack for far return to Long Mode */ 568 pushl $__KERNEL_CS 569 pushl %eax 570 571 /* Enable paging again */ 572 movl $(X86_CR0_PG | X86_CR0_PE), %eax 573 movl %eax, %cr0 574 575 lret 576 577 .code64 578paging_enabled: 579 /* Return from the trampoline */ 580 jmp *%rdi 581 582 /* 583 * The trampoline code has a size limit. 584 * Make sure we fail to compile if the trampoline code grows 585 * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes. 586 */ 587 .org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE 588 589 .code32 590no_longmode: 591 /* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */ 5921: 593 hlt 594 jmp 1b 595 596#include "../../kernel/verify_cpu.S" 597 598 .data 599gdt64: 600 .word gdt_end - gdt 601 .long 0 602 .word 0 603 .quad 0 604gdt: 605 .word gdt_end - gdt 606 .long gdt 607 .word 0 608 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */ 609 .quad 0x00af9a000000ffff /* __KERNEL_CS */ 610 .quad 0x00cf92000000ffff /* __KERNEL_DS */ 611 .quad 0x0080890000000000 /* TS descriptor */ 612 .quad 0x0000000000000000 /* TS continued */ 613gdt_end: 614 615#ifdef CONFIG_EFI_STUB 616efi_config: 617 .quad 0 618 619#ifdef CONFIG_EFI_MIXED 620 .global efi32_config 621efi32_config: 622 .fill 5,8,0 623 .quad efi64_thunk 624 .byte 0 625#endif 626 627 .global efi64_config 628efi64_config: 629 .fill 5,8,0 630 .quad efi_call 631 .byte 1 632#endif /* CONFIG_EFI_STUB */ 633 634/* 635 * Stack and heap for uncompression 636 */ 637 .bss 638 .balign 4 639boot_heap: 640 .fill BOOT_HEAP_SIZE, 1, 0 641boot_stack: 642 .fill BOOT_STACK_SIZE, 1, 0 643boot_stack_end: 644 645/* 646 * Space for page tables (not in .bss so not zeroed) 647 */ 648 .section ".pgtable","a",@nobits 649 .balign 4096 650pgtable: 651 .fill BOOT_PGT_SIZE, 1, 0 652