xref: /openbmc/linux/arch/x86/boot/compressed/head_64.S (revision 5ef12cb4a3a78ffb331c03a795a15eea4ae35155)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *  linux/boot/head.S
4 *
5 *  Copyright (C) 1991, 1992, 1993  Linus Torvalds
6 */
7
8/*
9 *  head.S contains the 32-bit startup code.
10 *
11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
12 * the page directory will exist. The startup code will be overwritten by
13 * the page directory. [According to comments etc elsewhere on a compressed
14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
15 *
16 * Page 0 is deliberately kept safe, since System Management Mode code in
17 * laptops may need to access the BIOS data stored there.  This is also
18 * useful for future device drivers that either access the BIOS via VM86
19 * mode.
20 */
21
22/*
23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
24 */
25	.code32
26	.text
27
28#include <linux/init.h>
29#include <linux/linkage.h>
30#include <asm/segment.h>
31#include <asm/boot.h>
32#include <asm/msr.h>
33#include <asm/processor-flags.h>
34#include <asm/asm-offsets.h>
35#include <asm/bootparam.h>
36#include "pgtable.h"
37
38/*
39 * Locally defined symbols should be marked hidden:
40 */
41	.hidden _bss
42	.hidden _ebss
43	.hidden _got
44	.hidden _egot
45
46	__HEAD
47	.code32
48ENTRY(startup_32)
49	/*
50	 * 32bit entry is 0 and it is ABI so immutable!
51	 * If we come here directly from a bootloader,
52	 * kernel(text+data+bss+brk) ramdisk, zero_page, command line
53	 * all need to be under the 4G limit.
54	 */
55	cld
56	/*
57	 * Test KEEP_SEGMENTS flag to see if the bootloader is asking
58	 * us to not reload segments
59	 */
60	testb $KEEP_SEGMENTS, BP_loadflags(%esi)
61	jnz 1f
62
63	cli
64	movl	$(__BOOT_DS), %eax
65	movl	%eax, %ds
66	movl	%eax, %es
67	movl	%eax, %ss
681:
69
70/*
71 * Calculate the delta between where we were compiled to run
72 * at and where we were actually loaded at.  This can only be done
73 * with a short local call on x86.  Nothing  else will tell us what
74 * address we are running at.  The reserved chunk of the real-mode
75 * data at 0x1e4 (defined as a scratch field) are used as the stack
76 * for this calculation. Only 4 bytes are needed.
77 */
78	leal	(BP_scratch+4)(%esi), %esp
79	call	1f
801:	popl	%ebp
81	subl	$1b, %ebp
82
83/* setup a stack and make sure cpu supports long mode. */
84	movl	$boot_stack_end, %eax
85	addl	%ebp, %eax
86	movl	%eax, %esp
87
88	call	verify_cpu
89	testl	%eax, %eax
90	jnz	no_longmode
91
92/*
93 * Compute the delta between where we were compiled to run at
94 * and where the code will actually run at.
95 *
96 * %ebp contains the address we are loaded at by the boot loader and %ebx
97 * contains the address where we should move the kernel image temporarily
98 * for safe in-place decompression.
99 */
100
101#ifdef CONFIG_RELOCATABLE
102	movl	%ebp, %ebx
103	movl	BP_kernel_alignment(%esi), %eax
104	decl	%eax
105	addl	%eax, %ebx
106	notl	%eax
107	andl	%eax, %ebx
108	cmpl	$LOAD_PHYSICAL_ADDR, %ebx
109	jge	1f
110#endif
111	movl	$LOAD_PHYSICAL_ADDR, %ebx
1121:
113
114	/* Target address to relocate to for decompression */
115	movl	BP_init_size(%esi), %eax
116	subl	$_end, %eax
117	addl	%eax, %ebx
118
119/*
120 * Prepare for entering 64 bit mode
121 */
122
123	/* Load new GDT with the 64bit segments using 32bit descriptor */
124	addl	%ebp, gdt+2(%ebp)
125	lgdt	gdt(%ebp)
126
127	/* Enable PAE mode */
128	movl	%cr4, %eax
129	orl	$X86_CR4_PAE, %eax
130	movl	%eax, %cr4
131
132 /*
133  * Build early 4G boot pagetable
134  */
135	/*
136	 * If SEV is active then set the encryption mask in the page tables.
137	 * This will insure that when the kernel is copied and decompressed
138	 * it will be done so encrypted.
139	 */
140	call	get_sev_encryption_bit
141	xorl	%edx, %edx
142	testl	%eax, %eax
143	jz	1f
144	subl	$32, %eax	/* Encryption bit is always above bit 31 */
145	bts	%eax, %edx	/* Set encryption mask for page tables */
1461:
147
148	/* Initialize Page tables to 0 */
149	leal	pgtable(%ebx), %edi
150	xorl	%eax, %eax
151	movl	$(BOOT_INIT_PGT_SIZE/4), %ecx
152	rep	stosl
153
154	/* Build Level 4 */
155	leal	pgtable + 0(%ebx), %edi
156	leal	0x1007 (%edi), %eax
157	movl	%eax, 0(%edi)
158	addl	%edx, 4(%edi)
159
160	/* Build Level 3 */
161	leal	pgtable + 0x1000(%ebx), %edi
162	leal	0x1007(%edi), %eax
163	movl	$4, %ecx
1641:	movl	%eax, 0x00(%edi)
165	addl	%edx, 0x04(%edi)
166	addl	$0x00001000, %eax
167	addl	$8, %edi
168	decl	%ecx
169	jnz	1b
170
171	/* Build Level 2 */
172	leal	pgtable + 0x2000(%ebx), %edi
173	movl	$0x00000183, %eax
174	movl	$2048, %ecx
1751:	movl	%eax, 0(%edi)
176	addl	%edx, 4(%edi)
177	addl	$0x00200000, %eax
178	addl	$8, %edi
179	decl	%ecx
180	jnz	1b
181
182	/* Enable the boot page tables */
183	leal	pgtable(%ebx), %eax
184	movl	%eax, %cr3
185
186	/* Enable Long mode in EFER (Extended Feature Enable Register) */
187	movl	$MSR_EFER, %ecx
188	rdmsr
189	btsl	$_EFER_LME, %eax
190	wrmsr
191
192	/* After gdt is loaded */
193	xorl	%eax, %eax
194	lldt	%ax
195	movl    $__BOOT_TSS, %eax
196	ltr	%ax
197
198	/*
199	 * Setup for the jump to 64bit mode
200	 *
201	 * When the jump is performend we will be in long mode but
202	 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
203	 * (and in turn EFER.LMA = 1).	To jump into 64bit mode we use
204	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
205	 * We place all of the values on our mini stack so lret can
206	 * used to perform that far jump.
207	 */
208	pushl	$__KERNEL_CS
209	leal	startup_64(%ebp), %eax
210#ifdef CONFIG_EFI_MIXED
211	movl	efi32_config(%ebp), %ebx
212	cmp	$0, %ebx
213	jz	1f
214	leal	handover_entry(%ebp), %eax
2151:
216#endif
217	pushl	%eax
218
219	/* Enter paged protected Mode, activating Long Mode */
220	movl	$(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
221	movl	%eax, %cr0
222
223	/* Jump from 32bit compatibility mode into 64bit mode. */
224	lret
225ENDPROC(startup_32)
226
227#ifdef CONFIG_EFI_MIXED
228	.org 0x190
229ENTRY(efi32_stub_entry)
230	add	$0x4, %esp		/* Discard return address */
231	popl	%ecx
232	popl	%edx
233	popl	%esi
234
235	leal	(BP_scratch+4)(%esi), %esp
236	call	1f
2371:	pop	%ebp
238	subl	$1b, %ebp
239
240	movl	%ecx, efi32_config(%ebp)
241	movl	%edx, efi32_config+8(%ebp)
242	sgdtl	efi32_boot_gdt(%ebp)
243
244	leal	efi32_config(%ebp), %eax
245	movl	%eax, efi_config(%ebp)
246
247	jmp	startup_32
248ENDPROC(efi32_stub_entry)
249#endif
250
251	.code64
252	.org 0x200
253ENTRY(startup_64)
254	/*
255	 * 64bit entry is 0x200 and it is ABI so immutable!
256	 * We come here either from startup_32 or directly from a
257	 * 64bit bootloader.
258	 * If we come here from a bootloader, kernel(text+data+bss+brk),
259	 * ramdisk, zero_page, command line could be above 4G.
260	 * We depend on an identity mapped page table being provided
261	 * that maps our entire kernel(text+data+bss+brk), zero page
262	 * and command line.
263	 */
264
265	/* Setup data segments. */
266	xorl	%eax, %eax
267	movl	%eax, %ds
268	movl	%eax, %es
269	movl	%eax, %ss
270	movl	%eax, %fs
271	movl	%eax, %gs
272
273	/*
274	 * Compute the decompressed kernel start address.  It is where
275	 * we were loaded at aligned to a 2M boundary. %rbp contains the
276	 * decompressed kernel start address.
277	 *
278	 * If it is a relocatable kernel then decompress and run the kernel
279	 * from load address aligned to 2MB addr, otherwise decompress and
280	 * run the kernel from LOAD_PHYSICAL_ADDR
281	 *
282	 * We cannot rely on the calculation done in 32-bit mode, since we
283	 * may have been invoked via the 64-bit entry point.
284	 */
285
286	/* Start with the delta to where the kernel will run at. */
287#ifdef CONFIG_RELOCATABLE
288	leaq	startup_32(%rip) /* - $startup_32 */, %rbp
289	movl	BP_kernel_alignment(%rsi), %eax
290	decl	%eax
291	addq	%rax, %rbp
292	notq	%rax
293	andq	%rax, %rbp
294	cmpq	$LOAD_PHYSICAL_ADDR, %rbp
295	jge	1f
296#endif
297	movq	$LOAD_PHYSICAL_ADDR, %rbp
2981:
299
300	/* Target address to relocate to for decompression */
301	movl	BP_init_size(%rsi), %ebx
302	subl	$_end, %ebx
303	addq	%rbp, %rbx
304
305	/* Set up the stack */
306	leaq	boot_stack_end(%rbx), %rsp
307
308	/*
309	 * paging_prepare() and cleanup_trampoline() below can have GOT
310	 * references. Adjust the table with address we are running at.
311	 *
312	 * Zero RAX for adjust_got: the GOT was not adjusted before;
313	 * there's no adjustment to undo.
314	 */
315	xorq	%rax, %rax
316
317	/*
318	 * Calculate the address the binary is loaded at and use it as
319	 * a GOT adjustment.
320	 */
321	call	1f
3221:	popq	%rdi
323	subq	$1b, %rdi
324
325	call	adjust_got
326
327	/*
328	 * At this point we are in long mode with 4-level paging enabled,
329	 * but we might want to enable 5-level paging or vice versa.
330	 *
331	 * The problem is that we cannot do it directly. Setting or clearing
332	 * CR4.LA57 in long mode would trigger #GP. So we need to switch off
333	 * long mode and paging first.
334	 *
335	 * We also need a trampoline in lower memory to switch over from
336	 * 4- to 5-level paging for cases when the bootloader puts the kernel
337	 * above 4G, but didn't enable 5-level paging for us.
338	 *
339	 * The same trampoline can be used to switch from 5- to 4-level paging
340	 * mode, like when starting 4-level paging kernel via kexec() when
341	 * original kernel worked in 5-level paging mode.
342	 *
343	 * For the trampoline, we need the top page table to reside in lower
344	 * memory as we don't have a way to load 64-bit values into CR3 in
345	 * 32-bit mode.
346	 *
347	 * We go though the trampoline even if we don't have to: if we're
348	 * already in a desired paging mode. This way the trampoline code gets
349	 * tested on every boot.
350	 */
351
352	/* Make sure we have GDT with 32-bit code segment */
353	leaq	gdt(%rip), %rax
354	movq	%rax, gdt64+2(%rip)
355	lgdt	gdt64(%rip)
356
357	/*
358	 * paging_prepare() sets up the trampoline and checks if we need to
359	 * enable 5-level paging.
360	 *
361	 * Address of the trampoline is returned in RAX.
362	 * Non zero RDX on return means we need to enable 5-level paging.
363	 *
364	 * RSI holds real mode data and needs to be preserved across
365	 * this function call.
366	 */
367	pushq	%rsi
368	call	paging_prepare
369	popq	%rsi
370
371	/* Save the trampoline address in RCX */
372	movq	%rax, %rcx
373
374	/*
375	 * Load the address of trampoline_return() into RDI.
376	 * It will be used by the trampoline to return to the main code.
377	 */
378	leaq	trampoline_return(%rip), %rdi
379
380	/* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
381	pushq	$__KERNEL32_CS
382	leaq	TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
383	pushq	%rax
384	lretq
385trampoline_return:
386	/* Restore the stack, the 32-bit trampoline uses its own stack */
387	leaq	boot_stack_end(%rbx), %rsp
388
389	/*
390	 * cleanup_trampoline() would restore trampoline memory.
391	 *
392	 * RDI is address of the page table to use instead of page table
393	 * in trampoline memory (if required).
394	 *
395	 * RSI holds real mode data and needs to be preserved across
396	 * this function call.
397	 */
398	pushq	%rsi
399	leaq	top_pgtable(%rbx), %rdi
400	call	cleanup_trampoline
401	popq	%rsi
402
403	/* Zero EFLAGS */
404	pushq	$0
405	popfq
406
407	/*
408	 * Previously we've adjusted the GOT with address the binary was
409	 * loaded at. Now we need to re-adjust for relocation address.
410	 *
411	 * Calculate the address the binary is loaded at, so that we can
412	 * undo the previous GOT adjustment.
413	 */
414	call	1f
4151:	popq	%rax
416	subq	$1b, %rax
417
418	/* The new adjustment is the relocation address */
419	movq	%rbx, %rdi
420	call	adjust_got
421
422/*
423 * Copy the compressed kernel to the end of our buffer
424 * where decompression in place becomes safe.
425 */
426	pushq	%rsi
427	leaq	(_bss-8)(%rip), %rsi
428	leaq	(_bss-8)(%rbx), %rdi
429	movq	$_bss /* - $startup_32 */, %rcx
430	shrq	$3, %rcx
431	std
432	rep	movsq
433	cld
434	popq	%rsi
435
436/*
437 * Jump to the relocated address.
438 */
439	leaq	relocated(%rbx), %rax
440	jmp	*%rax
441
442#ifdef CONFIG_EFI_STUB
443
444/* The entry point for the PE/COFF executable is efi_pe_entry. */
445ENTRY(efi_pe_entry)
446	movq	%rcx, efi64_config(%rip)	/* Handle */
447	movq	%rdx, efi64_config+8(%rip) /* EFI System table pointer */
448
449	leaq	efi64_config(%rip), %rax
450	movq	%rax, efi_config(%rip)
451
452	call	1f
4531:	popq	%rbp
454	subq	$1b, %rbp
455
456	/*
457	 * Relocate efi_config->call().
458	 */
459	addq	%rbp, efi64_config+40(%rip)
460
461	movq	%rax, %rdi
462	call	make_boot_params
463	cmpq	$0,%rax
464	je	fail
465	mov	%rax, %rsi
466	leaq	startup_32(%rip), %rax
467	movl	%eax, BP_code32_start(%rsi)
468	jmp	2f		/* Skip the relocation */
469
470handover_entry:
471	call	1f
4721:	popq	%rbp
473	subq	$1b, %rbp
474
475	/*
476	 * Relocate efi_config->call().
477	 */
478	movq	efi_config(%rip), %rax
479	addq	%rbp, 40(%rax)
4802:
481	movq	efi_config(%rip), %rdi
482	call	efi_main
483	movq	%rax,%rsi
484	cmpq	$0,%rax
485	jne	2f
486fail:
487	/* EFI init failed, so hang. */
488	hlt
489	jmp	fail
4902:
491	movl	BP_code32_start(%esi), %eax
492	leaq	startup_64(%rax), %rax
493	jmp	*%rax
494ENDPROC(efi_pe_entry)
495
496	.org 0x390
497ENTRY(efi64_stub_entry)
498	movq	%rdi, efi64_config(%rip)	/* Handle */
499	movq	%rsi, efi64_config+8(%rip) /* EFI System table pointer */
500
501	leaq	efi64_config(%rip), %rax
502	movq	%rax, efi_config(%rip)
503
504	movq	%rdx, %rsi
505	jmp	handover_entry
506ENDPROC(efi64_stub_entry)
507#endif
508
509	.text
510relocated:
511
512/*
513 * Clear BSS (stack is currently empty)
514 */
515	xorl	%eax, %eax
516	leaq    _bss(%rip), %rdi
517	leaq    _ebss(%rip), %rcx
518	subq	%rdi, %rcx
519	shrq	$3, %rcx
520	rep	stosq
521
522/*
523 * Do the extraction, and jump to the new kernel..
524 */
525	pushq	%rsi			/* Save the real mode argument */
526	movq	%rsi, %rdi		/* real mode address */
527	leaq	boot_heap(%rip), %rsi	/* malloc area for uncompression */
528	leaq	input_data(%rip), %rdx  /* input_data */
529	movl	$z_input_len, %ecx	/* input_len */
530	movq	%rbp, %r8		/* output target address */
531	movq	$z_output_len, %r9	/* decompressed length, end of relocs */
532	call	extract_kernel		/* returns kernel location in %rax */
533	popq	%rsi
534
535/*
536 * Jump to the decompressed kernel.
537 */
538	jmp	*%rax
539
540/*
541 * Adjust the global offset table
542 *
543 * RAX is the previous adjustment of the table to undo (use 0 if it's the
544 * first time we touch GOT).
545 * RDI is the new adjustment to apply.
546 */
547adjust_got:
548	/* Walk through the GOT adding the address to the entries */
549	leaq	_got(%rip), %rdx
550	leaq	_egot(%rip), %rcx
5511:
552	cmpq	%rcx, %rdx
553	jae	2f
554	subq	%rax, (%rdx)	/* Undo previous adjustment */
555	addq	%rdi, (%rdx)	/* Apply the new adjustment */
556	addq	$8, %rdx
557	jmp	1b
5582:
559	ret
560
561	.code32
562/*
563 * This is the 32-bit trampoline that will be copied over to low memory.
564 *
565 * RDI contains the return address (might be above 4G).
566 * ECX contains the base address of the trampoline memory.
567 * Non zero RDX on return means we need to enable 5-level paging.
568 */
569ENTRY(trampoline_32bit_src)
570	/* Set up data and stack segments */
571	movl	$__KERNEL_DS, %eax
572	movl	%eax, %ds
573	movl	%eax, %ss
574
575	/* Set up new stack */
576	leal	TRAMPOLINE_32BIT_STACK_END(%ecx), %esp
577
578	/* Disable paging */
579	movl	%cr0, %eax
580	btrl	$X86_CR0_PG_BIT, %eax
581	movl	%eax, %cr0
582
583	/* Check what paging mode we want to be in after the trampoline */
584	cmpl	$0, %edx
585	jz	1f
586
587	/* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
588	movl	%cr4, %eax
589	testl	$X86_CR4_LA57, %eax
590	jnz	3f
591	jmp	2f
5921:
593	/* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */
594	movl	%cr4, %eax
595	testl	$X86_CR4_LA57, %eax
596	jz	3f
5972:
598	/* Point CR3 to the trampoline's new top level page table */
599	leal	TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
600	movl	%eax, %cr3
6013:
602	/* Enable PAE and LA57 (if required) paging modes */
603	movl	$X86_CR4_PAE, %eax
604	cmpl	$0, %edx
605	jz	1f
606	orl	$X86_CR4_LA57, %eax
6071:
608	movl	%eax, %cr4
609
610	/* Calculate address of paging_enabled() once we are executing in the trampoline */
611	leal	paging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
612
613	/* Prepare the stack for far return to Long Mode */
614	pushl	$__KERNEL_CS
615	pushl	%eax
616
617	/* Enable paging again */
618	movl	$(X86_CR0_PG | X86_CR0_PE), %eax
619	movl	%eax, %cr0
620
621	lret
622
623	.code64
624paging_enabled:
625	/* Return from the trampoline */
626	jmp	*%rdi
627
628	/*
629         * The trampoline code has a size limit.
630         * Make sure we fail to compile if the trampoline code grows
631         * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes.
632	 */
633	.org	trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
634
635	.code32
636no_longmode:
637	/* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
6381:
639	hlt
640	jmp     1b
641
642#include "../../kernel/verify_cpu.S"
643
644	.data
645gdt64:
646	.word	gdt_end - gdt
647	.long	0
648	.word	0
649	.quad   0
650gdt:
651	.word	gdt_end - gdt
652	.long	gdt
653	.word	0
654	.quad	0x00cf9a000000ffff	/* __KERNEL32_CS */
655	.quad	0x00af9a000000ffff	/* __KERNEL_CS */
656	.quad	0x00cf92000000ffff	/* __KERNEL_DS */
657	.quad	0x0080890000000000	/* TS descriptor */
658	.quad   0x0000000000000000	/* TS continued */
659gdt_end:
660
661#ifdef CONFIG_EFI_STUB
662efi_config:
663	.quad	0
664
665#ifdef CONFIG_EFI_MIXED
666	.global efi32_config
667efi32_config:
668	.fill	5,8,0
669	.quad	efi64_thunk
670	.byte	0
671#endif
672
673	.global efi64_config
674efi64_config:
675	.fill	5,8,0
676	.quad	efi_call
677	.byte	1
678#endif /* CONFIG_EFI_STUB */
679
680/*
681 * Stack and heap for uncompression
682 */
683	.bss
684	.balign 4
685boot_heap:
686	.fill BOOT_HEAP_SIZE, 1, 0
687boot_stack:
688	.fill BOOT_STACK_SIZE, 1, 0
689boot_stack_end:
690
691/*
692 * Space for page tables (not in .bss so not zeroed)
693 */
694	.section ".pgtable","a",@nobits
695	.balign 4096
696pgtable:
697	.fill BOOT_PGT_SIZE, 1, 0
698
699/*
700 * The page table is going to be used instead of page table in the trampoline
701 * memory.
702 */
703top_pgtable:
704	.fill PAGE_SIZE, 1, 0
705