1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/boot/head.S 4 * 5 * Copyright (C) 1991, 1992, 1993 Linus Torvalds 6 */ 7 8/* 9 * head.S contains the 32-bit startup code. 10 * 11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where 12 * the page directory will exist. The startup code will be overwritten by 13 * the page directory. [According to comments etc elsewhere on a compressed 14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC] 15 * 16 * Page 0 is deliberately kept safe, since System Management Mode code in 17 * laptops may need to access the BIOS data stored there. This is also 18 * useful for future device drivers that either access the BIOS via VM86 19 * mode. 20 */ 21 22/* 23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 24 */ 25 .code32 26 .text 27 28#include <linux/init.h> 29#include <linux/linkage.h> 30#include <asm/segment.h> 31#include <asm/boot.h> 32#include <asm/msr.h> 33#include <asm/processor-flags.h> 34#include <asm/asm-offsets.h> 35#include <asm/bootparam.h> 36#include <asm/desc_defs.h> 37#include "pgtable.h" 38 39/* 40 * Locally defined symbols should be marked hidden: 41 */ 42 .hidden _bss 43 .hidden _ebss 44 .hidden _end 45 46 __HEAD 47 48/* 49 * This macro gives the relative virtual address of X, i.e. the offset of X 50 * from startup_32. This is the same as the link-time virtual address of X, 51 * since startup_32 is at 0, but defining it this way tells the 52 * assembler/linker that we do not want the actual run-time address of X. This 53 * prevents the linker from trying to create unwanted run-time relocation 54 * entries for the reference when the compressed kernel is linked as PIE. 55 * 56 * A reference X(%reg) will result in the link-time VA of X being stored with 57 * the instruction, and a run-time R_X86_64_RELATIVE relocation entry that 58 * adds the 64-bit base address where the kernel is loaded. 59 * 60 * Replacing it with (X-startup_32)(%reg) results in the offset being stored, 61 * and no run-time relocation. 62 * 63 * The macro should be used as a displacement with a base register containing 64 * the run-time address of startup_32 [i.e. rva(X)(%reg)], or as an immediate 65 * [$ rva(X)]. 66 * 67 * This macro can only be used from within the .head.text section, since the 68 * expression requires startup_32 to be in the same section as the code being 69 * assembled. 70 */ 71#define rva(X) ((X) - startup_32) 72 73 .code32 74SYM_FUNC_START(startup_32) 75 /* 76 * 32bit entry is 0 and it is ABI so immutable! 77 * If we come here directly from a bootloader, 78 * kernel(text+data+bss+brk) ramdisk, zero_page, command line 79 * all need to be under the 4G limit. 80 */ 81 cld 82 cli 83 84/* 85 * Calculate the delta between where we were compiled to run 86 * at and where we were actually loaded at. This can only be done 87 * with a short local call on x86. Nothing else will tell us what 88 * address we are running at. The reserved chunk of the real-mode 89 * data at 0x1e4 (defined as a scratch field) are used as the stack 90 * for this calculation. Only 4 bytes are needed. 91 */ 92 leal (BP_scratch+4)(%esi), %esp 93 call 1f 941: popl %ebp 95 subl $ rva(1b), %ebp 96 97 /* Load new GDT with the 64bit segments using 32bit descriptor */ 98 leal rva(gdt)(%ebp), %eax 99 movl %eax, 2(%eax) 100 lgdt (%eax) 101 102 /* Load segment registers with our descriptors */ 103 movl $__BOOT_DS, %eax 104 movl %eax, %ds 105 movl %eax, %es 106 movl %eax, %fs 107 movl %eax, %gs 108 movl %eax, %ss 109 110/* setup a stack and make sure cpu supports long mode. */ 111 leal rva(boot_stack_end)(%ebp), %esp 112 113 call verify_cpu 114 testl %eax, %eax 115 jnz .Lno_longmode 116 117/* 118 * Compute the delta between where we were compiled to run at 119 * and where the code will actually run at. 120 * 121 * %ebp contains the address we are loaded at by the boot loader and %ebx 122 * contains the address where we should move the kernel image temporarily 123 * for safe in-place decompression. 124 */ 125 126#ifdef CONFIG_RELOCATABLE 127 movl %ebp, %ebx 128 129#ifdef CONFIG_EFI_STUB 130/* 131 * If we were loaded via the EFI LoadImage service, startup_32 will be at an 132 * offset to the start of the space allocated for the image. efi_pe_entry will 133 * set up image_offset to tell us where the image actually starts, so that we 134 * can use the full available buffer. 135 * image_offset = startup_32 - image_base 136 * Otherwise image_offset will be zero and has no effect on the calculations. 137 */ 138 subl rva(image_offset)(%ebp), %ebx 139#endif 140 141 movl BP_kernel_alignment(%esi), %eax 142 decl %eax 143 addl %eax, %ebx 144 notl %eax 145 andl %eax, %ebx 146 cmpl $LOAD_PHYSICAL_ADDR, %ebx 147 jae 1f 148#endif 149 movl $LOAD_PHYSICAL_ADDR, %ebx 1501: 151 152 /* Target address to relocate to for decompression */ 153 addl BP_init_size(%esi), %ebx 154 subl $ rva(_end), %ebx 155 156/* 157 * Prepare for entering 64 bit mode 158 */ 159 160 /* Enable PAE mode */ 161 movl %cr4, %eax 162 orl $X86_CR4_PAE, %eax 163 movl %eax, %cr4 164 165 /* 166 * Build early 4G boot pagetable 167 */ 168 /* 169 * If SEV is active then set the encryption mask in the page tables. 170 * This will insure that when the kernel is copied and decompressed 171 * it will be done so encrypted. 172 */ 173 call get_sev_encryption_bit 174 xorl %edx, %edx 175 testl %eax, %eax 176 jz 1f 177 subl $32, %eax /* Encryption bit is always above bit 31 */ 178 bts %eax, %edx /* Set encryption mask for page tables */ 1791: 180 181 /* Initialize Page tables to 0 */ 182 leal rva(pgtable)(%ebx), %edi 183 xorl %eax, %eax 184 movl $(BOOT_INIT_PGT_SIZE/4), %ecx 185 rep stosl 186 187 /* Build Level 4 */ 188 leal rva(pgtable + 0)(%ebx), %edi 189 leal 0x1007 (%edi), %eax 190 movl %eax, 0(%edi) 191 addl %edx, 4(%edi) 192 193 /* Build Level 3 */ 194 leal rva(pgtable + 0x1000)(%ebx), %edi 195 leal 0x1007(%edi), %eax 196 movl $4, %ecx 1971: movl %eax, 0x00(%edi) 198 addl %edx, 0x04(%edi) 199 addl $0x00001000, %eax 200 addl $8, %edi 201 decl %ecx 202 jnz 1b 203 204 /* Build Level 2 */ 205 leal rva(pgtable + 0x2000)(%ebx), %edi 206 movl $0x00000183, %eax 207 movl $2048, %ecx 2081: movl %eax, 0(%edi) 209 addl %edx, 4(%edi) 210 addl $0x00200000, %eax 211 addl $8, %edi 212 decl %ecx 213 jnz 1b 214 215 /* Enable the boot page tables */ 216 leal rva(pgtable)(%ebx), %eax 217 movl %eax, %cr3 218 219 /* Enable Long mode in EFER (Extended Feature Enable Register) */ 220 movl $MSR_EFER, %ecx 221 rdmsr 222 btsl $_EFER_LME, %eax 223 wrmsr 224 225 /* After gdt is loaded */ 226 xorl %eax, %eax 227 lldt %ax 228 movl $__BOOT_TSS, %eax 229 ltr %ax 230 231 /* 232 * Setup for the jump to 64bit mode 233 * 234 * When the jump is performend we will be in long mode but 235 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1 236 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use 237 * the new gdt/idt that has __KERNEL_CS with CS.L = 1. 238 * We place all of the values on our mini stack so lret can 239 * used to perform that far jump. 240 */ 241 leal rva(startup_64)(%ebp), %eax 242#ifdef CONFIG_EFI_MIXED 243 movl rva(efi32_boot_args)(%ebp), %edi 244 testl %edi, %edi 245 jz 1f 246 leal rva(efi64_stub_entry)(%ebp), %eax 247 movl rva(efi32_boot_args+4)(%ebp), %esi 248 movl rva(efi32_boot_args+8)(%ebp), %edx // saved bootparams pointer 249 testl %edx, %edx 250 jnz 1f 251 /* 252 * efi_pe_entry uses MS calling convention, which requires 32 bytes of 253 * shadow space on the stack even if all arguments are passed in 254 * registers. We also need an additional 8 bytes for the space that 255 * would be occupied by the return address, and this also results in 256 * the correct stack alignment for entry. 257 */ 258 subl $40, %esp 259 leal rva(efi_pe_entry)(%ebp), %eax 260 movl %edi, %ecx // MS calling convention 261 movl %esi, %edx 2621: 263#endif 264 pushl $__KERNEL_CS 265 pushl %eax 266 267 /* Enter paged protected Mode, activating Long Mode */ 268 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */ 269 movl %eax, %cr0 270 271 /* Jump from 32bit compatibility mode into 64bit mode. */ 272 lret 273SYM_FUNC_END(startup_32) 274 275#ifdef CONFIG_EFI_MIXED 276 .org 0x190 277SYM_FUNC_START(efi32_stub_entry) 278 add $0x4, %esp /* Discard return address */ 279 popl %ecx 280 popl %edx 281 popl %esi 282 283 call 1f 2841: pop %ebp 285 subl $ rva(1b), %ebp 286 287 movl %esi, rva(efi32_boot_args+8)(%ebp) 288SYM_INNER_LABEL(efi32_pe_stub_entry, SYM_L_LOCAL) 289 movl %ecx, rva(efi32_boot_args)(%ebp) 290 movl %edx, rva(efi32_boot_args+4)(%ebp) 291 movb $0, rva(efi_is64)(%ebp) 292 293 /* Save firmware GDTR and code/data selectors */ 294 sgdtl rva(efi32_boot_gdt)(%ebp) 295 movw %cs, rva(efi32_boot_cs)(%ebp) 296 movw %ds, rva(efi32_boot_ds)(%ebp) 297 298 /* Disable paging */ 299 movl %cr0, %eax 300 btrl $X86_CR0_PG_BIT, %eax 301 movl %eax, %cr0 302 303 jmp startup_32 304SYM_FUNC_END(efi32_stub_entry) 305#endif 306 307 .code64 308 .org 0x200 309SYM_CODE_START(startup_64) 310 /* 311 * 64bit entry is 0x200 and it is ABI so immutable! 312 * We come here either from startup_32 or directly from a 313 * 64bit bootloader. 314 * If we come here from a bootloader, kernel(text+data+bss+brk), 315 * ramdisk, zero_page, command line could be above 4G. 316 * We depend on an identity mapped page table being provided 317 * that maps our entire kernel(text+data+bss+brk), zero page 318 * and command line. 319 */ 320 321 cld 322 cli 323 324 /* Setup data segments. */ 325 xorl %eax, %eax 326 movl %eax, %ds 327 movl %eax, %es 328 movl %eax, %ss 329 movl %eax, %fs 330 movl %eax, %gs 331 332 /* 333 * Compute the decompressed kernel start address. It is where 334 * we were loaded at aligned to a 2M boundary. %rbp contains the 335 * decompressed kernel start address. 336 * 337 * If it is a relocatable kernel then decompress and run the kernel 338 * from load address aligned to 2MB addr, otherwise decompress and 339 * run the kernel from LOAD_PHYSICAL_ADDR 340 * 341 * We cannot rely on the calculation done in 32-bit mode, since we 342 * may have been invoked via the 64-bit entry point. 343 */ 344 345 /* Start with the delta to where the kernel will run at. */ 346#ifdef CONFIG_RELOCATABLE 347 leaq startup_32(%rip) /* - $startup_32 */, %rbp 348 349#ifdef CONFIG_EFI_STUB 350/* 351 * If we were loaded via the EFI LoadImage service, startup_32 will be at an 352 * offset to the start of the space allocated for the image. efi_pe_entry will 353 * set up image_offset to tell us where the image actually starts, so that we 354 * can use the full available buffer. 355 * image_offset = startup_32 - image_base 356 * Otherwise image_offset will be zero and has no effect on the calculations. 357 */ 358 movl image_offset(%rip), %eax 359 subq %rax, %rbp 360#endif 361 362 movl BP_kernel_alignment(%rsi), %eax 363 decl %eax 364 addq %rax, %rbp 365 notq %rax 366 andq %rax, %rbp 367 cmpq $LOAD_PHYSICAL_ADDR, %rbp 368 jae 1f 369#endif 370 movq $LOAD_PHYSICAL_ADDR, %rbp 3711: 372 373 /* Target address to relocate to for decompression */ 374 movl BP_init_size(%rsi), %ebx 375 subl $ rva(_end), %ebx 376 addq %rbp, %rbx 377 378 /* Set up the stack */ 379 leaq rva(boot_stack_end)(%rbx), %rsp 380 381 /* 382 * At this point we are in long mode with 4-level paging enabled, 383 * but we might want to enable 5-level paging or vice versa. 384 * 385 * The problem is that we cannot do it directly. Setting or clearing 386 * CR4.LA57 in long mode would trigger #GP. So we need to switch off 387 * long mode and paging first. 388 * 389 * We also need a trampoline in lower memory to switch over from 390 * 4- to 5-level paging for cases when the bootloader puts the kernel 391 * above 4G, but didn't enable 5-level paging for us. 392 * 393 * The same trampoline can be used to switch from 5- to 4-level paging 394 * mode, like when starting 4-level paging kernel via kexec() when 395 * original kernel worked in 5-level paging mode. 396 * 397 * For the trampoline, we need the top page table to reside in lower 398 * memory as we don't have a way to load 64-bit values into CR3 in 399 * 32-bit mode. 400 * 401 * We go though the trampoline even if we don't have to: if we're 402 * already in a desired paging mode. This way the trampoline code gets 403 * tested on every boot. 404 */ 405 406 /* Make sure we have GDT with 32-bit code segment */ 407 leaq gdt64(%rip), %rax 408 addq %rax, 2(%rax) 409 lgdt (%rax) 410 411 /* Reload CS so IRET returns to a CS actually in the GDT */ 412 pushq $__KERNEL_CS 413 leaq .Lon_kernel_cs(%rip), %rax 414 pushq %rax 415 lretq 416 417.Lon_kernel_cs: 418 419 pushq %rsi 420 call load_stage1_idt 421 popq %rsi 422 423 /* 424 * paging_prepare() sets up the trampoline and checks if we need to 425 * enable 5-level paging. 426 * 427 * paging_prepare() returns a two-quadword structure which lands 428 * into RDX:RAX: 429 * - Address of the trampoline is returned in RAX. 430 * - Non zero RDX means trampoline needs to enable 5-level 431 * paging. 432 * 433 * RSI holds real mode data and needs to be preserved across 434 * this function call. 435 */ 436 pushq %rsi 437 movq %rsi, %rdi /* real mode address */ 438 call paging_prepare 439 popq %rsi 440 441 /* Save the trampoline address in RCX */ 442 movq %rax, %rcx 443 444 /* 445 * Load the address of trampoline_return() into RDI. 446 * It will be used by the trampoline to return to the main code. 447 */ 448 leaq trampoline_return(%rip), %rdi 449 450 /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */ 451 pushq $__KERNEL32_CS 452 leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax 453 pushq %rax 454 lretq 455trampoline_return: 456 /* Restore the stack, the 32-bit trampoline uses its own stack */ 457 leaq rva(boot_stack_end)(%rbx), %rsp 458 459 /* 460 * cleanup_trampoline() would restore trampoline memory. 461 * 462 * RDI is address of the page table to use instead of page table 463 * in trampoline memory (if required). 464 * 465 * RSI holds real mode data and needs to be preserved across 466 * this function call. 467 */ 468 pushq %rsi 469 leaq rva(top_pgtable)(%rbx), %rdi 470 call cleanup_trampoline 471 popq %rsi 472 473 /* Zero EFLAGS */ 474 pushq $0 475 popfq 476 477/* 478 * Copy the compressed kernel to the end of our buffer 479 * where decompression in place becomes safe. 480 */ 481 pushq %rsi 482 leaq (_bss-8)(%rip), %rsi 483 leaq rva(_bss-8)(%rbx), %rdi 484 movl $(_bss - startup_32), %ecx 485 shrl $3, %ecx 486 std 487 rep movsq 488 cld 489 popq %rsi 490 491 /* 492 * The GDT may get overwritten either during the copy we just did or 493 * during extract_kernel below. To avoid any issues, repoint the GDTR 494 * to the new copy of the GDT. 495 */ 496 leaq rva(gdt64)(%rbx), %rax 497 leaq rva(gdt)(%rbx), %rdx 498 movq %rdx, 2(%rax) 499 lgdt (%rax) 500 501/* 502 * Jump to the relocated address. 503 */ 504 leaq rva(.Lrelocated)(%rbx), %rax 505 jmp *%rax 506SYM_CODE_END(startup_64) 507 508#ifdef CONFIG_EFI_STUB 509 .org 0x390 510SYM_FUNC_START(efi64_stub_entry) 511SYM_FUNC_START_ALIAS(efi_stub_entry) 512 and $~0xf, %rsp /* realign the stack */ 513 movq %rdx, %rbx /* save boot_params pointer */ 514 call efi_main 515 movq %rbx,%rsi 516 leaq rva(startup_64)(%rax), %rax 517 jmp *%rax 518SYM_FUNC_END(efi64_stub_entry) 519SYM_FUNC_END_ALIAS(efi_stub_entry) 520#endif 521 522 .text 523SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated) 524 525/* 526 * Clear BSS (stack is currently empty) 527 */ 528 xorl %eax, %eax 529 leaq _bss(%rip), %rdi 530 leaq _ebss(%rip), %rcx 531 subq %rdi, %rcx 532 shrq $3, %rcx 533 rep stosq 534 535/* 536 * If running as an SEV guest, the encryption mask is required in the 537 * page-table setup code below. When the guest also has SEV-ES enabled 538 * set_sev_encryption_mask() will cause #VC exceptions, but the stage2 539 * handler can't map its GHCB because the page-table is not set up yet. 540 * So set up the encryption mask here while still on the stage1 #VC 541 * handler. Then load stage2 IDT and switch to the kernel's own 542 * page-table. 543 */ 544 pushq %rsi 545 call set_sev_encryption_mask 546 call load_stage2_idt 547 548 /* Pass boot_params to initialize_identity_maps() */ 549 movq (%rsp), %rdi 550 call initialize_identity_maps 551 popq %rsi 552 553/* 554 * Do the extraction, and jump to the new kernel.. 555 */ 556 pushq %rsi /* Save the real mode argument */ 557 movq %rsi, %rdi /* real mode address */ 558 leaq boot_heap(%rip), %rsi /* malloc area for uncompression */ 559 leaq input_data(%rip), %rdx /* input_data */ 560 movl input_len(%rip), %ecx /* input_len */ 561 movq %rbp, %r8 /* output target address */ 562 movl output_len(%rip), %r9d /* decompressed length, end of relocs */ 563 call extract_kernel /* returns kernel location in %rax */ 564 popq %rsi 565 566/* 567 * Jump to the decompressed kernel. 568 */ 569 jmp *%rax 570SYM_FUNC_END(.Lrelocated) 571 572 .code32 573/* 574 * This is the 32-bit trampoline that will be copied over to low memory. 575 * 576 * RDI contains the return address (might be above 4G). 577 * ECX contains the base address of the trampoline memory. 578 * Non zero RDX means trampoline needs to enable 5-level paging. 579 */ 580SYM_CODE_START(trampoline_32bit_src) 581 /* Set up data and stack segments */ 582 movl $__KERNEL_DS, %eax 583 movl %eax, %ds 584 movl %eax, %ss 585 586 /* Set up new stack */ 587 leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp 588 589 /* Disable paging */ 590 movl %cr0, %eax 591 btrl $X86_CR0_PG_BIT, %eax 592 movl %eax, %cr0 593 594 /* Check what paging mode we want to be in after the trampoline */ 595 testl %edx, %edx 596 jz 1f 597 598 /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */ 599 movl %cr4, %eax 600 testl $X86_CR4_LA57, %eax 601 jnz 3f 602 jmp 2f 6031: 604 /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */ 605 movl %cr4, %eax 606 testl $X86_CR4_LA57, %eax 607 jz 3f 6082: 609 /* Point CR3 to the trampoline's new top level page table */ 610 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax 611 movl %eax, %cr3 6123: 613 /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */ 614 pushl %ecx 615 pushl %edx 616 movl $MSR_EFER, %ecx 617 rdmsr 618 btsl $_EFER_LME, %eax 619 wrmsr 620 popl %edx 621 popl %ecx 622 623 /* Enable PAE and LA57 (if required) paging modes */ 624 movl $X86_CR4_PAE, %eax 625 testl %edx, %edx 626 jz 1f 627 orl $X86_CR4_LA57, %eax 6281: 629 movl %eax, %cr4 630 631 /* Calculate address of paging_enabled() once we are executing in the trampoline */ 632 leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax 633 634 /* Prepare the stack for far return to Long Mode */ 635 pushl $__KERNEL_CS 636 pushl %eax 637 638 /* Enable paging again */ 639 movl $(X86_CR0_PG | X86_CR0_PE), %eax 640 movl %eax, %cr0 641 642 lret 643SYM_CODE_END(trampoline_32bit_src) 644 645 .code64 646SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled) 647 /* Return from the trampoline */ 648 jmp *%rdi 649SYM_FUNC_END(.Lpaging_enabled) 650 651 /* 652 * The trampoline code has a size limit. 653 * Make sure we fail to compile if the trampoline code grows 654 * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes. 655 */ 656 .org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE 657 658 .code32 659SYM_FUNC_START_LOCAL_NOALIGN(.Lno_longmode) 660 /* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */ 6611: 662 hlt 663 jmp 1b 664SYM_FUNC_END(.Lno_longmode) 665 666#include "../../kernel/verify_cpu.S" 667 668 .data 669SYM_DATA_START_LOCAL(gdt64) 670 .word gdt_end - gdt - 1 671 .quad gdt - gdt64 672SYM_DATA_END(gdt64) 673 .balign 8 674SYM_DATA_START_LOCAL(gdt) 675 .word gdt_end - gdt - 1 676 .long 0 677 .word 0 678 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */ 679 .quad 0x00af9a000000ffff /* __KERNEL_CS */ 680 .quad 0x00cf92000000ffff /* __KERNEL_DS */ 681 .quad 0x0080890000000000 /* TS descriptor */ 682 .quad 0x0000000000000000 /* TS continued */ 683SYM_DATA_END_LABEL(gdt, SYM_L_LOCAL, gdt_end) 684 685SYM_DATA_START(boot_idt_desc) 686 .word boot_idt_end - boot_idt - 1 687 .quad 0 688SYM_DATA_END(boot_idt_desc) 689 .balign 8 690SYM_DATA_START(boot_idt) 691 .rept BOOT_IDT_ENTRIES 692 .quad 0 693 .quad 0 694 .endr 695SYM_DATA_END_LABEL(boot_idt, SYM_L_GLOBAL, boot_idt_end) 696 697#ifdef CONFIG_EFI_STUB 698SYM_DATA(image_offset, .long 0) 699#endif 700#ifdef CONFIG_EFI_MIXED 701SYM_DATA_LOCAL(efi32_boot_args, .long 0, 0, 0) 702SYM_DATA(efi_is64, .byte 1) 703 704#define ST32_boottime 60 // offsetof(efi_system_table_32_t, boottime) 705#define BS32_handle_protocol 88 // offsetof(efi_boot_services_32_t, handle_protocol) 706#define LI32_image_base 32 // offsetof(efi_loaded_image_32_t, image_base) 707 708 __HEAD 709 .code32 710SYM_FUNC_START(efi32_pe_entry) 711/* 712 * efi_status_t efi32_pe_entry(efi_handle_t image_handle, 713 * efi_system_table_32_t *sys_table) 714 */ 715 716 pushl %ebp 717 movl %esp, %ebp 718 pushl %eax // dummy push to allocate loaded_image 719 720 pushl %ebx // save callee-save registers 721 pushl %edi 722 723 call verify_cpu // check for long mode support 724 testl %eax, %eax 725 movl $0x80000003, %eax // EFI_UNSUPPORTED 726 jnz 2f 727 728 call 1f 7291: pop %ebx 730 subl $ rva(1b), %ebx 731 732 /* Get the loaded image protocol pointer from the image handle */ 733 leal -4(%ebp), %eax 734 pushl %eax // &loaded_image 735 leal rva(loaded_image_proto)(%ebx), %eax 736 pushl %eax // pass the GUID address 737 pushl 8(%ebp) // pass the image handle 738 739 /* 740 * Note the alignment of the stack frame. 741 * sys_table 742 * handle <-- 16-byte aligned on entry by ABI 743 * return address 744 * frame pointer 745 * loaded_image <-- local variable 746 * saved %ebx <-- 16-byte aligned here 747 * saved %edi 748 * &loaded_image 749 * &loaded_image_proto 750 * handle <-- 16-byte aligned for call to handle_protocol 751 */ 752 753 movl 12(%ebp), %eax // sys_table 754 movl ST32_boottime(%eax), %eax // sys_table->boottime 755 call *BS32_handle_protocol(%eax) // sys_table->boottime->handle_protocol 756 addl $12, %esp // restore argument space 757 testl %eax, %eax 758 jnz 2f 759 760 movl 8(%ebp), %ecx // image_handle 761 movl 12(%ebp), %edx // sys_table 762 movl -4(%ebp), %esi // loaded_image 763 movl LI32_image_base(%esi), %esi // loaded_image->image_base 764 movl %ebx, %ebp // startup_32 for efi32_pe_stub_entry 765 /* 766 * We need to set the image_offset variable here since startup_32() will 767 * use it before we get to the 64-bit efi_pe_entry() in C code. 768 */ 769 subl %esi, %ebx 770 movl %ebx, rva(image_offset)(%ebp) // save image_offset 771 jmp efi32_pe_stub_entry 772 7732: popl %edi // restore callee-save registers 774 popl %ebx 775 leave 776 ret 777SYM_FUNC_END(efi32_pe_entry) 778 779 .section ".rodata" 780 /* EFI loaded image protocol GUID */ 781 .balign 4 782SYM_DATA_START_LOCAL(loaded_image_proto) 783 .long 0x5b1b31a1 784 .word 0x9562, 0x11d2 785 .byte 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b 786SYM_DATA_END(loaded_image_proto) 787#endif 788 789/* 790 * Stack and heap for uncompression 791 */ 792 .bss 793 .balign 4 794SYM_DATA_LOCAL(boot_heap, .fill BOOT_HEAP_SIZE, 1, 0) 795 796SYM_DATA_START_LOCAL(boot_stack) 797 .fill BOOT_STACK_SIZE, 1, 0 798 .balign 16 799SYM_DATA_END_LABEL(boot_stack, SYM_L_LOCAL, boot_stack_end) 800 801/* 802 * Space for page tables (not in .bss so not zeroed) 803 */ 804 .section ".pgtable","aw",@nobits 805 .balign 4096 806SYM_DATA_LOCAL(pgtable, .fill BOOT_PGT_SIZE, 1, 0) 807 808/* 809 * The page table is going to be used instead of page table in the trampoline 810 * memory. 811 */ 812SYM_DATA_LOCAL(top_pgtable, .fill PAGE_SIZE, 1, 0) 813