1/* 2 * tsunami.S: High speed MicroSparc-I mmu/cache operations. 3 * 4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7#include <asm/ptrace.h> 8#include <asm/asm-offsets.h> 9#include <asm/psr.h> 10#include <asm/asi.h> 11#include <asm/page.h> 12#include <asm/pgtsrmmu.h> 13 14 .text 15 .align 4 16 17 .globl tsunami_flush_cache_all, tsunami_flush_cache_mm 18 .globl tsunami_flush_cache_range, tsunami_flush_cache_page 19 .globl tsunami_flush_page_to_ram, tsunami_flush_page_for_dma 20 .globl tsunami_flush_sig_insns 21 .globl tsunami_flush_tlb_all, tsunami_flush_tlb_mm 22 .globl tsunami_flush_tlb_range, tsunami_flush_tlb_page 23 24 /* Sliiick... */ 25tsunami_flush_cache_page: 26tsunami_flush_cache_range: 27 ld [%o0 + VMA_VM_MM], %o0 28tsunami_flush_cache_mm: 29 ld [%o0 + AOFF_mm_context], %g2 30 cmp %g2, -1 31 be tsunami_flush_cache_out 32tsunami_flush_cache_all: 33 WINDOW_FLUSH(%g4, %g5) 34tsunami_flush_page_for_dma: 35 sta %g0, [%g0] ASI_M_IC_FLCLEAR 36 sta %g0, [%g0] ASI_M_DC_FLCLEAR 37tsunami_flush_cache_out: 38tsunami_flush_page_to_ram: 39 retl 40 nop 41 42tsunami_flush_sig_insns: 43 flush %o1 44 retl 45 flush %o1 + 4 46 47 /* More slick stuff... */ 48tsunami_flush_tlb_range: 49 ld [%o0 + VMA_VM_MM], %o0 50tsunami_flush_tlb_mm: 51 ld [%o0 + AOFF_mm_context], %g2 52 cmp %g2, -1 53 be tsunami_flush_tlb_out 54tsunami_flush_tlb_all: 55 mov 0x400, %o1 56 sta %g0, [%o1] ASI_M_FLUSH_PROBE 57 nop 58 nop 59 nop 60 nop 61 nop 62tsunami_flush_tlb_out: 63 retl 64 nop 65 66 /* This one can be done in a fine grained manner... */ 67tsunami_flush_tlb_page: 68 ld [%o0 + VMA_VM_MM], %o0 69 mov SRMMU_CTX_REG, %g1 70 ld [%o0 + AOFF_mm_context], %o3 71 andn %o1, (PAGE_SIZE - 1), %o1 72 cmp %o3, -1 73 be tsunami_flush_tlb_page_out 74 lda [%g1] ASI_M_MMUREGS, %g5 75 sta %o3, [%g1] ASI_M_MMUREGS 76 sta %g0, [%o1] ASI_M_FLUSH_PROBE 77 nop 78 nop 79 nop 80 nop 81 nop 82tsunami_flush_tlb_page_out: 83 retl 84 sta %g5, [%g1] ASI_M_MMUREGS 85 86#define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3) \ 87 ldd [src + offset + 0x18], t0; \ 88 std t0, [dst + offset + 0x18]; \ 89 ldd [src + offset + 0x10], t2; \ 90 std t2, [dst + offset + 0x10]; \ 91 ldd [src + offset + 0x08], t0; \ 92 std t0, [dst + offset + 0x08]; \ 93 ldd [src + offset + 0x00], t2; \ 94 std t2, [dst + offset + 0x00]; 95 96tsunami_copy_1page: 97/* NOTE: This routine has to be shorter than 70insns --jj */ 98 or %g0, (PAGE_SIZE >> 8), %g1 991: 100 MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5) 101 MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5) 102 MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5) 103 MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5) 104 MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5) 105 MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5) 106 MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5) 107 MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5) 108 subcc %g1, 1, %g1 109 add %o0, 0x100, %o0 110 bne 1b 111 add %o1, 0x100, %o1 112 113 .globl tsunami_setup_blockops 114tsunami_setup_blockops: 115 sethi %hi(__copy_1page), %o0 116 or %o0, %lo(__copy_1page), %o0 117 sethi %hi(tsunami_copy_1page), %o1 118 or %o1, %lo(tsunami_copy_1page), %o1 119 sethi %hi(tsunami_setup_blockops), %o2 120 or %o2, %lo(tsunami_setup_blockops), %o2 121 ld [%o1], %o4 1221: add %o1, 4, %o1 123 st %o4, [%o0] 124 add %o0, 4, %o0 125 cmp %o1, %o2 126 bne 1b 127 ld [%o1], %o4 128 sta %g0, [%g0] ASI_M_IC_FLCLEAR 129 sta %g0, [%g0] ASI_M_DC_FLCLEAR 130 retl 131 nop 132