1/* ld script for sparc32/sparc64 kernel */ 2 3#include <asm-generic/vmlinux.lds.h> 4 5#include <asm/page.h> 6#include <asm/thread_info.h> 7 8#ifdef CONFIG_SPARC32 9#define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS 10#define TEXTSTART 0xf0004000 11 12#define SMP_CACHE_BYTES_SHIFT 5 13 14#else 15#define SMP_CACHE_BYTES_SHIFT 6 16#define INITIAL_ADDRESS 0x4000 17#define TEXTSTART 0x0000000000404000 18 19#endif 20 21#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) 22 23#ifdef CONFIG_SPARC32 24OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") 25OUTPUT_ARCH(sparc) 26ENTRY(_start) 27jiffies = jiffies_64 + 4; 28#else 29/* sparc64 */ 30OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") 31OUTPUT_ARCH(sparc:v9a) 32ENTRY(_start) 33jiffies = jiffies_64; 34#endif 35 36SECTIONS 37{ 38#ifdef CONFIG_SPARC64 39 swapper_pg_dir = 0x0000000000402000; 40#endif 41 . = INITIAL_ADDRESS; 42 .text TEXTSTART : 43 { 44 _text = .; 45 HEAD_TEXT 46 TEXT_TEXT 47 SCHED_TEXT 48 LOCK_TEXT 49 KPROBES_TEXT 50 IRQENTRY_TEXT 51 *(.gnu.warning) 52 } = 0 53 _etext = .; 54 55 RO_DATA(PAGE_SIZE) 56 57 /* Start of data section */ 58 _sdata = .; 59 60 .data1 : { 61 *(.data1) 62 } 63 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) 64 65 /* End of data section */ 66 _edata = .; 67 68 .fixup : { 69 __start___fixup = .; 70 *(.fixup) 71 __stop___fixup = .; 72 } 73 EXCEPTION_TABLE(16) 74 NOTES 75 76 . = ALIGN(PAGE_SIZE); 77 __init_begin = ALIGN(PAGE_SIZE); 78 INIT_TEXT_SECTION(PAGE_SIZE) 79 __init_text_end = .; 80 INIT_DATA_SECTION(16) 81 82 . = ALIGN(4); 83 .tsb_ldquad_phys_patch : { 84 __tsb_ldquad_phys_patch = .; 85 *(.tsb_ldquad_phys_patch) 86 __tsb_ldquad_phys_patch_end = .; 87 } 88 89 .tsb_phys_patch : { 90 __tsb_phys_patch = .; 91 *(.tsb_phys_patch) 92 __tsb_phys_patch_end = .; 93 } 94 95 .cpuid_patch : { 96 __cpuid_patch = .; 97 *(.cpuid_patch) 98 __cpuid_patch_end = .; 99 } 100 101 .sun4v_1insn_patch : { 102 __sun4v_1insn_patch = .; 103 *(.sun4v_1insn_patch) 104 __sun4v_1insn_patch_end = .; 105 } 106 .sun4v_2insn_patch : { 107 __sun4v_2insn_patch = .; 108 *(.sun4v_2insn_patch) 109 __sun4v_2insn_patch_end = .; 110 } 111 .leon_1insn_patch : { 112 __leon_1insn_patch = .; 113 *(.leon_1insn_patch) 114 __leon_1insn_patch_end = .; 115 } 116 .swapper_tsb_phys_patch : { 117 __swapper_tsb_phys_patch = .; 118 *(.swapper_tsb_phys_patch) 119 __swapper_tsb_phys_patch_end = .; 120 } 121 .swapper_4m_tsb_phys_patch : { 122 __swapper_4m_tsb_phys_patch = .; 123 *(.swapper_4m_tsb_phys_patch) 124 __swapper_4m_tsb_phys_patch_end = .; 125 } 126 .popc_3insn_patch : { 127 __popc_3insn_patch = .; 128 *(.popc_3insn_patch) 129 __popc_3insn_patch_end = .; 130 } 131 .popc_6insn_patch : { 132 __popc_6insn_patch = .; 133 *(.popc_6insn_patch) 134 __popc_6insn_patch_end = .; 135 } 136 .pause_3insn_patch : { 137 __pause_3insn_patch = .; 138 *(.pause_3insn_patch) 139 __pause_3insn_patch_end = .; 140 } 141 PERCPU_SECTION(SMP_CACHE_BYTES) 142 143 . = ALIGN(PAGE_SIZE); 144 __init_end = .; 145 BSS_SECTION(0, 0, 0) 146 _end = . ; 147 148 STABS_DEBUG 149 DWARF_DEBUG 150 151 DISCARDS 152} 153