1/* ld script for sparc32/sparc64 kernel */ 2 3#include <asm-generic/vmlinux.lds.h> 4 5#include <asm/page.h> 6#include <asm/thread_info.h> 7 8#ifdef CONFIG_SPARC32 9#define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS 10#define TEXTSTART 0xf0004000 11 12#define SMP_CACHE_BYTES_SHIFT 5 13 14#else 15#define SMP_CACHE_BYTES_SHIFT 6 16#define INITIAL_ADDRESS 0x4000 17#define TEXTSTART 0x0000000000404000 18 19#endif 20 21#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) 22 23#ifdef CONFIG_SPARC32 24OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") 25OUTPUT_ARCH(sparc) 26ENTRY(_start) 27jiffies = jiffies_64 + 4; 28#else 29/* sparc64 */ 30OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") 31OUTPUT_ARCH(sparc:v9a) 32ENTRY(_start) 33jiffies = jiffies_64; 34#endif 35 36#ifdef CONFIG_SPARC64 37ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large") 38#endif 39 40SECTIONS 41{ 42#ifdef CONFIG_SPARC64 43 swapper_pg_dir = 0x0000000000402000; 44#endif 45 . = INITIAL_ADDRESS; 46 .text TEXTSTART : 47 { 48 _text = .; 49 HEAD_TEXT 50 TEXT_TEXT 51 SCHED_TEXT 52 CPUIDLE_TEXT 53 LOCK_TEXT 54 KPROBES_TEXT 55 IRQENTRY_TEXT 56 SOFTIRQENTRY_TEXT 57 *(.gnu.warning) 58 } = 0 59 _etext = .; 60 61 RO_DATA(PAGE_SIZE) 62 63 /* Start of data section */ 64 _sdata = .; 65 66 .data1 : { 67 *(.data1) 68 } 69 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) 70 71 /* End of data section */ 72 _edata = .; 73 74 .fixup : { 75 __start___fixup = .; 76 *(.fixup) 77 __stop___fixup = .; 78 } 79 EXCEPTION_TABLE(16) 80 NOTES 81 82 . = ALIGN(PAGE_SIZE); 83 __init_begin = ALIGN(PAGE_SIZE); 84 INIT_TEXT_SECTION(PAGE_SIZE) 85 __init_text_end = .; 86 INIT_DATA_SECTION(16) 87 88 . = ALIGN(4); 89 .tsb_ldquad_phys_patch : { 90 __tsb_ldquad_phys_patch = .; 91 *(.tsb_ldquad_phys_patch) 92 __tsb_ldquad_phys_patch_end = .; 93 } 94 95 .tsb_phys_patch : { 96 __tsb_phys_patch = .; 97 *(.tsb_phys_patch) 98 __tsb_phys_patch_end = .; 99 } 100 101 .cpuid_patch : { 102 __cpuid_patch = .; 103 *(.cpuid_patch) 104 __cpuid_patch_end = .; 105 } 106 107 .sun4v_1insn_patch : { 108 __sun4v_1insn_patch = .; 109 *(.sun4v_1insn_patch) 110 __sun4v_1insn_patch_end = .; 111 } 112 .sun4v_2insn_patch : { 113 __sun4v_2insn_patch = .; 114 *(.sun4v_2insn_patch) 115 __sun4v_2insn_patch_end = .; 116 } 117 .leon_1insn_patch : { 118 __leon_1insn_patch = .; 119 *(.leon_1insn_patch) 120 __leon_1insn_patch_end = .; 121 } 122 .swapper_tsb_phys_patch : { 123 __swapper_tsb_phys_patch = .; 124 *(.swapper_tsb_phys_patch) 125 __swapper_tsb_phys_patch_end = .; 126 } 127 .swapper_4m_tsb_phys_patch : { 128 __swapper_4m_tsb_phys_patch = .; 129 *(.swapper_4m_tsb_phys_patch) 130 __swapper_4m_tsb_phys_patch_end = .; 131 } 132 .popc_3insn_patch : { 133 __popc_3insn_patch = .; 134 *(.popc_3insn_patch) 135 __popc_3insn_patch_end = .; 136 } 137 .popc_6insn_patch : { 138 __popc_6insn_patch = .; 139 *(.popc_6insn_patch) 140 __popc_6insn_patch_end = .; 141 } 142 .pause_3insn_patch : { 143 __pause_3insn_patch = .; 144 *(.pause_3insn_patch) 145 __pause_3insn_patch_end = .; 146 } 147 .sun_m7_2insn_patch : { 148 __sun_m7_2insn_patch = .; 149 *(.sun_m7_2insn_patch) 150 __sun_m7_2insn_patch_end = .; 151 } 152 PERCPU_SECTION(SMP_CACHE_BYTES) 153 154#ifdef CONFIG_JUMP_LABEL 155 . = ALIGN(PAGE_SIZE); 156 .exit.text : { 157 EXIT_TEXT 158 } 159#endif 160 161 . = ALIGN(PAGE_SIZE); 162 __init_end = .; 163 BSS_SECTION(0, 0, 0) 164 _end = . ; 165 166 STABS_DEBUG 167 DWARF_DEBUG 168 169 DISCARDS 170} 171