1 /* 2 * User-space Probes (UProbes) for sparc 3 * 4 * Copyright (C) 2013 Oracle Inc. 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 * 19 * Authors: 20 * Jose E. Marchesi <jose.marchesi@oracle.com> 21 * Eric Saint Etienne <eric.saint.etienne@oracle.com> 22 */ 23 24 #include <linux/kernel.h> 25 #include <linux/highmem.h> 26 #include <linux/uprobes.h> 27 #include <linux/uaccess.h> 28 #include <linux/sched.h> /* For struct task_struct */ 29 #include <linux/kdebug.h> 30 31 #include <asm/cacheflush.h> 32 33 /* Compute the address of the breakpoint instruction and return it. 34 * 35 * Note that uprobe_get_swbp_addr is defined as a weak symbol in 36 * kernel/events/uprobe.c. 37 */ 38 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs) 39 { 40 return instruction_pointer(regs); 41 } 42 43 static void copy_to_page(struct page *page, unsigned long vaddr, 44 const void *src, int len) 45 { 46 void *kaddr = kmap_atomic(page); 47 48 memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len); 49 kunmap_atomic(kaddr); 50 } 51 52 /* Fill in the xol area with the probed instruction followed by the 53 * single-step trap. Some fixups in the copied instruction are 54 * performed at this point. 55 * 56 * Note that uprobe_xol_copy is defined as a weak symbol in 57 * kernel/events/uprobe.c. 58 */ 59 void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr, 60 void *src, unsigned long len) 61 { 62 const u32 stp_insn = UPROBE_STP_INSN; 63 u32 insn = *(u32 *) src; 64 65 /* Branches annulling their delay slot must be fixed to not do 66 * so. Clearing the annul bit on these instructions we can be 67 * sure the single-step breakpoint in the XOL slot will be 68 * executed. 69 */ 70 71 u32 op = (insn >> 30) & 0x3; 72 u32 op2 = (insn >> 22) & 0x7; 73 74 if (op == 0 && 75 (op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) && 76 (insn & ANNUL_BIT) == ANNUL_BIT) 77 insn &= ~ANNUL_BIT; 78 79 copy_to_page(page, vaddr, &insn, len); 80 copy_to_page(page, vaddr+len, &stp_insn, 4); 81 } 82 83 84 /* Instruction analysis/validity. 85 * 86 * This function returns 0 on success or a -ve number on error. 87 */ 88 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, 89 struct mm_struct *mm, unsigned long addr) 90 { 91 /* Any unsupported instruction? Then return -EINVAL */ 92 return 0; 93 } 94 95 /* If INSN is a relative control transfer instruction, return the 96 * corrected branch destination value. 97 * 98 * Note that regs->tpc and regs->tnpc still hold the values of the 99 * program counters at the time of the single-step trap due to the 100 * execution of the UPROBE_STP_INSN at utask->xol_vaddr + 4. 101 * 102 */ 103 static unsigned long relbranch_fixup(u32 insn, struct uprobe_task *utask, 104 struct pt_regs *regs) 105 { 106 /* Branch not taken, no mods necessary. */ 107 if (regs->tnpc == regs->tpc + 0x4UL) 108 return utask->autask.saved_tnpc + 0x4UL; 109 110 /* The three cases are call, branch w/prediction, 111 * and traditional branch. 112 */ 113 if ((insn & 0xc0000000) == 0x40000000 || 114 (insn & 0xc1c00000) == 0x00400000 || 115 (insn & 0xc1c00000) == 0x00800000) { 116 unsigned long real_pc = (unsigned long) utask->vaddr; 117 unsigned long ixol_addr = utask->xol_vaddr; 118 119 /* The instruction did all the work for us 120 * already, just apply the offset to the correct 121 * instruction location. 122 */ 123 return (real_pc + (regs->tnpc - ixol_addr)); 124 } 125 126 /* It is jmpl or some other absolute PC modification instruction, 127 * leave NPC as-is. 128 */ 129 return regs->tnpc; 130 } 131 132 /* If INSN is an instruction which writes its PC location 133 * into a destination register, fix that up. 134 */ 135 static int retpc_fixup(struct pt_regs *regs, u32 insn, 136 unsigned long real_pc) 137 { 138 unsigned long *slot = NULL; 139 int rc = 0; 140 141 /* Simplest case is 'call', which always uses %o7 */ 142 if ((insn & 0xc0000000) == 0x40000000) 143 slot = ®s->u_regs[UREG_I7]; 144 145 /* 'jmpl' encodes the register inside of the opcode */ 146 if ((insn & 0xc1f80000) == 0x81c00000) { 147 unsigned long rd = ((insn >> 25) & 0x1f); 148 149 if (rd <= 15) { 150 slot = ®s->u_regs[rd]; 151 } else { 152 unsigned long fp = regs->u_regs[UREG_FP]; 153 /* Hard case, it goes onto the stack. */ 154 flushw_all(); 155 156 rd -= 16; 157 if (test_thread_64bit_stack(fp)) { 158 unsigned long __user *uslot = 159 (unsigned long __user *) (fp + STACK_BIAS) + rd; 160 rc = __put_user(real_pc, uslot); 161 } else { 162 unsigned int __user *uslot = (unsigned int 163 __user *) fp + rd; 164 rc = __put_user((u32) real_pc, uslot); 165 } 166 } 167 } 168 if (slot != NULL) 169 *slot = real_pc; 170 return rc; 171 } 172 173 /* Single-stepping can be avoided for certain instructions: NOPs and 174 * instructions that can be emulated. This function determines 175 * whether the instruction where the uprobe is installed falls in one 176 * of these cases and emulates it. 177 * 178 * This function returns true if the single-stepping can be skipped, 179 * false otherwise. 180 */ 181 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs) 182 { 183 /* We currently only emulate NOP instructions. 184 */ 185 186 if (auprobe->ixol == (1 << 24)) { 187 regs->tnpc += 4; 188 regs->tpc += 4; 189 return true; 190 } 191 192 return false; 193 } 194 195 /* Prepare to execute out of line. At this point 196 * current->utask->xol_vaddr points to an allocated XOL slot properly 197 * initialized with the original instruction and the single-stepping 198 * trap instruction. 199 * 200 * This function returns 0 on success, any other number on error. 201 */ 202 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) 203 { 204 struct uprobe_task *utask = current->utask; 205 struct arch_uprobe_task *autask = ¤t->utask->autask; 206 207 /* Save the current program counters so they can be restored 208 * later. 209 */ 210 autask->saved_tpc = regs->tpc; 211 autask->saved_tnpc = regs->tnpc; 212 213 /* Adjust PC and NPC so the first instruction in the XOL slot 214 * will be executed by the user task. 215 */ 216 instruction_pointer_set(regs, utask->xol_vaddr); 217 218 return 0; 219 } 220 221 /* Prepare to resume execution after the single-step. Called after 222 * single-stepping. To avoid the SMP problems that can occur when we 223 * temporarily put back the original opcode to single-step, we 224 * single-stepped a copy of the instruction. 225 * 226 * This function returns 0 on success, any other number on error. 227 */ 228 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) 229 { 230 struct uprobe_task *utask = current->utask; 231 struct arch_uprobe_task *autask = &utask->autask; 232 u32 insn = auprobe->ixol; 233 int rc = 0; 234 235 if (utask->state == UTASK_SSTEP_ACK) { 236 regs->tnpc = relbranch_fixup(insn, utask, regs); 237 regs->tpc = autask->saved_tnpc; 238 rc = retpc_fixup(regs, insn, (unsigned long) utask->vaddr); 239 } else { 240 regs->tnpc = utask->vaddr+4; 241 regs->tpc = autask->saved_tnpc+4; 242 } 243 return rc; 244 } 245 246 /* Handler for uprobe traps. This is called from the traps table and 247 * triggers the proper die notification. 248 */ 249 asmlinkage void uprobe_trap(struct pt_regs *regs, 250 unsigned long trap_level) 251 { 252 BUG_ON(trap_level != 0x173 && trap_level != 0x174); 253 254 /* We are only interested in user-mode code. Uprobe traps 255 * shall not be present in kernel code. 256 */ 257 if (!user_mode(regs)) { 258 local_irq_enable(); 259 bad_trap(regs, trap_level); 260 return; 261 } 262 263 /* trap_level == 0x173 --> ta 0x73 264 * trap_level == 0x174 --> ta 0x74 265 */ 266 if (notify_die((trap_level == 0x173) ? DIE_BPT : DIE_SSTEP, 267 (trap_level == 0x173) ? "bpt" : "sstep", 268 regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP) 269 bad_trap(regs, trap_level); 270 } 271 272 /* Callback routine for handling die notifications. 273 */ 274 int arch_uprobe_exception_notify(struct notifier_block *self, 275 unsigned long val, void *data) 276 { 277 int ret = NOTIFY_DONE; 278 struct die_args *args = (struct die_args *)data; 279 280 /* We are only interested in userspace traps */ 281 if (args->regs && !user_mode(args->regs)) 282 return NOTIFY_DONE; 283 284 switch (val) { 285 case DIE_BPT: 286 if (uprobe_pre_sstep_notifier(args->regs)) 287 ret = NOTIFY_STOP; 288 break; 289 290 case DIE_SSTEP: 291 if (uprobe_post_sstep_notifier(args->regs)) 292 ret = NOTIFY_STOP; 293 294 default: 295 break; 296 } 297 298 return ret; 299 } 300 301 /* This function gets called when a XOL instruction either gets 302 * trapped or the thread has a fatal signal, so reset the instruction 303 * pointer to its probed address. 304 */ 305 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) 306 { 307 struct uprobe_task *utask = current->utask; 308 309 instruction_pointer_set(regs, utask->vaddr); 310 } 311 312 /* If xol insn itself traps and generates a signal(Say, 313 * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped 314 * instruction jumps back to its own address. 315 */ 316 bool arch_uprobe_xol_was_trapped(struct task_struct *t) 317 { 318 return false; 319 } 320 321 unsigned long 322 arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, 323 struct pt_regs *regs) 324 { 325 unsigned long orig_ret_vaddr = regs->u_regs[UREG_I7]; 326 327 regs->u_regs[UREG_I7] = trampoline_vaddr-8; 328 329 return orig_ret_vaddr + 8; 330 } 331