1 /* sun4m_smp.c: Sparc SUN4M SMP support. 2 * 3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 4 */ 5 6 #include <asm/head.h> 7 8 #include <linux/kernel.h> 9 #include <linux/sched.h> 10 #include <linux/threads.h> 11 #include <linux/smp.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel_stat.h> 14 #include <linux/init.h> 15 #include <linux/spinlock.h> 16 #include <linux/mm.h> 17 #include <linux/swap.h> 18 #include <linux/profile.h> 19 #include <asm/cacheflush.h> 20 #include <asm/tlbflush.h> 21 #include <asm/irq_regs.h> 22 23 #include <asm/ptrace.h> 24 #include <asm/atomic.h> 25 26 #include <asm/delay.h> 27 #include <asm/irq.h> 28 #include <asm/page.h> 29 #include <asm/pgalloc.h> 30 #include <asm/pgtable.h> 31 #include <asm/oplib.h> 32 #include <asm/cpudata.h> 33 34 #include "irq.h" 35 36 #define IRQ_RESCHEDULE 13 37 #define IRQ_STOP_CPU 14 38 #define IRQ_CROSS_CALL 15 39 40 extern ctxd_t *srmmu_ctx_table_phys; 41 42 extern void calibrate_delay(void); 43 44 extern volatile unsigned long cpu_callin_map[NR_CPUS]; 45 extern unsigned char boot_cpu_id; 46 47 extern cpumask_t smp_commenced_mask; 48 49 extern int __smp4m_processor_id(void); 50 51 /*#define SMP_DEBUG*/ 52 53 #ifdef SMP_DEBUG 54 #define SMP_PRINTK(x) printk x 55 #else 56 #define SMP_PRINTK(x) 57 #endif 58 59 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val) 60 { 61 __asm__ __volatile__("swap [%1], %0\n\t" : 62 "=&r" (val), "=&r" (ptr) : 63 "0" (val), "1" (ptr)); 64 return val; 65 } 66 67 static void smp_setup_percpu_timer(void); 68 extern void cpu_probe(void); 69 70 void __cpuinit smp4m_callin(void) 71 { 72 int cpuid = hard_smp_processor_id(); 73 74 local_flush_cache_all(); 75 local_flush_tlb_all(); 76 77 /* Get our local ticker going. */ 78 smp_setup_percpu_timer(); 79 80 calibrate_delay(); 81 smp_store_cpu_info(cpuid); 82 83 local_flush_cache_all(); 84 local_flush_tlb_all(); 85 86 /* 87 * Unblock the master CPU _only_ when the scheduler state 88 * of all secondary CPUs will be up-to-date, so after 89 * the SMP initialization the master will be just allowed 90 * to call the scheduler code. 91 */ 92 /* Allow master to continue. */ 93 swap(&cpu_callin_map[cpuid], 1); 94 95 /* XXX: What's up with all the flushes? */ 96 local_flush_cache_all(); 97 local_flush_tlb_all(); 98 99 cpu_probe(); 100 101 /* Fix idle thread fields. */ 102 __asm__ __volatile__("ld [%0], %%g6\n\t" 103 : : "r" (¤t_set[cpuid]) 104 : "memory" /* paranoid */); 105 106 /* Attach to the address space of init_task. */ 107 atomic_inc(&init_mm.mm_count); 108 current->active_mm = &init_mm; 109 110 while (!cpu_isset(cpuid, smp_commenced_mask)) 111 mb(); 112 113 local_irq_enable(); 114 115 cpu_set(cpuid, cpu_online_map); 116 } 117 118 /* 119 * Cycle through the processors asking the PROM to start each one. 120 */ 121 122 extern struct linux_prom_registers smp_penguin_ctable; 123 extern unsigned long trapbase_cpu1[]; 124 extern unsigned long trapbase_cpu2[]; 125 extern unsigned long trapbase_cpu3[]; 126 127 void __init smp4m_boot_cpus(void) 128 { 129 smp_setup_percpu_timer(); 130 local_flush_cache_all(); 131 } 132 133 int __cpuinit smp4m_boot_one_cpu(int i) 134 { 135 extern unsigned long sun4m_cpu_startup; 136 unsigned long *entry = &sun4m_cpu_startup; 137 struct task_struct *p; 138 int timeout; 139 int cpu_node; 140 141 cpu_find_by_mid(i, &cpu_node); 142 143 /* Cook up an idler for this guy. */ 144 p = fork_idle(i); 145 current_set[i] = task_thread_info(p); 146 /* See trampoline.S for details... */ 147 entry += ((i-1) * 3); 148 149 /* 150 * Initialize the contexts table 151 * Since the call to prom_startcpu() trashes the structure, 152 * we need to re-initialize it for each cpu 153 */ 154 smp_penguin_ctable.which_io = 0; 155 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys; 156 smp_penguin_ctable.reg_size = 0; 157 158 /* whirrr, whirrr, whirrrrrrrrr... */ 159 printk("Starting CPU %d at %p\n", i, entry); 160 local_flush_cache_all(); 161 prom_startcpu(cpu_node, 162 &smp_penguin_ctable, 0, (char *)entry); 163 164 /* wheee... it's going... */ 165 for(timeout = 0; timeout < 10000; timeout++) { 166 if(cpu_callin_map[i]) 167 break; 168 udelay(200); 169 } 170 171 if (!(cpu_callin_map[i])) { 172 printk("Processor %d is stuck.\n", i); 173 return -ENODEV; 174 } 175 176 local_flush_cache_all(); 177 return 0; 178 } 179 180 void __init smp4m_smp_done(void) 181 { 182 int i, first; 183 int *prev; 184 185 /* setup cpu list for irq rotation */ 186 first = 0; 187 prev = &first; 188 for (i = 0; i < NR_CPUS; i++) { 189 if (cpu_online(i)) { 190 *prev = i; 191 prev = &cpu_data(i).next; 192 } 193 } 194 *prev = first; 195 local_flush_cache_all(); 196 197 /* Free unneeded trap tables */ 198 if (!cpu_isset(1, cpu_present_map)) { 199 ClearPageReserved(virt_to_page(trapbase_cpu1)); 200 init_page_count(virt_to_page(trapbase_cpu1)); 201 free_page((unsigned long)trapbase_cpu1); 202 totalram_pages++; 203 num_physpages++; 204 } 205 if (!cpu_isset(2, cpu_present_map)) { 206 ClearPageReserved(virt_to_page(trapbase_cpu2)); 207 init_page_count(virt_to_page(trapbase_cpu2)); 208 free_page((unsigned long)trapbase_cpu2); 209 totalram_pages++; 210 num_physpages++; 211 } 212 if (!cpu_isset(3, cpu_present_map)) { 213 ClearPageReserved(virt_to_page(trapbase_cpu3)); 214 init_page_count(virt_to_page(trapbase_cpu3)); 215 free_page((unsigned long)trapbase_cpu3); 216 totalram_pages++; 217 num_physpages++; 218 } 219 220 /* Ok, they are spinning and ready to go. */ 221 } 222 223 /* At each hardware IRQ, we get this called to forward IRQ reception 224 * to the next processor. The caller must disable the IRQ level being 225 * serviced globally so that there are no double interrupts received. 226 * 227 * XXX See sparc64 irq.c. 228 */ 229 void smp4m_irq_rotate(int cpu) 230 { 231 int next = cpu_data(cpu).next; 232 if (next != cpu) 233 set_irq_udt(next); 234 } 235 236 /* Cross calls, in order to work efficiently and atomically do all 237 * the message passing work themselves, only stopcpu and reschedule 238 * messages come through here. 239 */ 240 void smp4m_message_pass(int target, int msg, unsigned long data, int wait) 241 { 242 static unsigned long smp_cpu_in_msg[NR_CPUS]; 243 cpumask_t mask; 244 int me = smp_processor_id(); 245 int irq, i; 246 247 if(msg == MSG_RESCHEDULE) { 248 irq = IRQ_RESCHEDULE; 249 250 if(smp_cpu_in_msg[me]) 251 return; 252 } else if(msg == MSG_STOP_CPU) { 253 irq = IRQ_STOP_CPU; 254 } else { 255 goto barf; 256 } 257 258 smp_cpu_in_msg[me]++; 259 if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) { 260 mask = cpu_online_map; 261 if(target == MSG_ALL_BUT_SELF) 262 cpu_clear(me, mask); 263 for(i = 0; i < 4; i++) { 264 if (cpu_isset(i, mask)) 265 set_cpu_int(i, irq); 266 } 267 } else { 268 set_cpu_int(target, irq); 269 } 270 smp_cpu_in_msg[me]--; 271 272 return; 273 barf: 274 printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me); 275 panic("Bogon SMP message pass."); 276 } 277 278 static struct smp_funcall { 279 smpfunc_t func; 280 unsigned long arg1; 281 unsigned long arg2; 282 unsigned long arg3; 283 unsigned long arg4; 284 unsigned long arg5; 285 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */ 286 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */ 287 } ccall_info; 288 289 static DEFINE_SPINLOCK(cross_call_lock); 290 291 /* Cross calls must be serialized, at least currently. */ 292 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2, 293 unsigned long arg3, unsigned long arg4, unsigned long arg5) 294 { 295 register int ncpus = SUN4M_NCPUS; 296 unsigned long flags; 297 298 spin_lock_irqsave(&cross_call_lock, flags); 299 300 /* Init function glue. */ 301 ccall_info.func = func; 302 ccall_info.arg1 = arg1; 303 ccall_info.arg2 = arg2; 304 ccall_info.arg3 = arg3; 305 ccall_info.arg4 = arg4; 306 ccall_info.arg5 = arg5; 307 308 /* Init receive/complete mapping, plus fire the IPI's off. */ 309 { 310 cpumask_t mask = cpu_online_map; 311 register int i; 312 313 cpu_clear(smp_processor_id(), mask); 314 for(i = 0; i < ncpus; i++) { 315 if (cpu_isset(i, mask)) { 316 ccall_info.processors_in[i] = 0; 317 ccall_info.processors_out[i] = 0; 318 set_cpu_int(i, IRQ_CROSS_CALL); 319 } else { 320 ccall_info.processors_in[i] = 1; 321 ccall_info.processors_out[i] = 1; 322 } 323 } 324 } 325 326 { 327 register int i; 328 329 i = 0; 330 do { 331 while(!ccall_info.processors_in[i]) 332 barrier(); 333 } while(++i < ncpus); 334 335 i = 0; 336 do { 337 while(!ccall_info.processors_out[i]) 338 barrier(); 339 } while(++i < ncpus); 340 } 341 342 spin_unlock_irqrestore(&cross_call_lock, flags); 343 } 344 345 /* Running cross calls. */ 346 void smp4m_cross_call_irq(void) 347 { 348 int i = smp_processor_id(); 349 350 ccall_info.processors_in[i] = 1; 351 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3, 352 ccall_info.arg4, ccall_info.arg5); 353 ccall_info.processors_out[i] = 1; 354 } 355 356 void smp4m_percpu_timer_interrupt(struct pt_regs *regs) 357 { 358 struct pt_regs *old_regs; 359 int cpu = smp_processor_id(); 360 361 old_regs = set_irq_regs(regs); 362 363 clear_profile_irq(cpu); 364 365 profile_tick(CPU_PROFILING); 366 367 if(!--prof_counter(cpu)) { 368 int user = user_mode(regs); 369 370 irq_enter(); 371 update_process_times(user); 372 irq_exit(); 373 374 prof_counter(cpu) = prof_multiplier(cpu); 375 } 376 set_irq_regs(old_regs); 377 } 378 379 extern unsigned int lvl14_resolution; 380 381 static void __init smp_setup_percpu_timer(void) 382 { 383 int cpu = smp_processor_id(); 384 385 prof_counter(cpu) = prof_multiplier(cpu) = 1; 386 load_profile_irq(cpu, lvl14_resolution); 387 388 if(cpu == boot_cpu_id) 389 enable_pil_irq(14); 390 } 391 392 void __init smp4m_blackbox_id(unsigned *addr) 393 { 394 int rd = *addr & 0x3e000000; 395 int rs1 = rd >> 11; 396 397 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */ 398 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */ 399 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */ 400 } 401 402 void __init smp4m_blackbox_current(unsigned *addr) 403 { 404 int rd = *addr & 0x3e000000; 405 int rs1 = rd >> 11; 406 407 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */ 408 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */ 409 addr[4] = 0x8008200c | rd | rs1; /* and reg, 0xc, reg */ 410 } 411 412 void __init sun4m_init_smp(void) 413 { 414 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id); 415 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current); 416 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM); 417 BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM); 418 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM); 419 } 420