1 /* 2 * pcic.c: MicroSPARC-IIep PCI controller support 3 * 4 * Copyright (C) 1998 V. Roganov and G. Raiko 5 * 6 * Code is derived from Ultra/PCI PSYCHO controller support, see that 7 * for author info. 8 * 9 * Support for diverse IIep based platforms by Pete Zaitcev. 10 * CP-1200 by Eric Brower. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/init.h> 16 #include <linux/mm.h> 17 #include <linux/slab.h> 18 #include <linux/jiffies.h> 19 20 #include <asm/ebus.h> 21 #include <asm/sbus.h> /* for sanity check... */ 22 #include <asm/swift.h> /* for cache flushing. */ 23 #include <asm/io.h> 24 25 #include <linux/ctype.h> 26 #include <linux/pci.h> 27 #include <linux/time.h> 28 #include <linux/timex.h> 29 #include <linux/interrupt.h> 30 31 #include <asm/irq.h> 32 #include <asm/oplib.h> 33 #include <asm/prom.h> 34 #include <asm/pcic.h> 35 #include <asm/timer.h> 36 #include <asm/uaccess.h> 37 #include <asm/irq_regs.h> 38 39 40 /* 41 * I studied different documents and many live PROMs both from 2.30 42 * family and 3.xx versions. I came to the amazing conclusion: there is 43 * absolutely no way to route interrupts in IIep systems relying on 44 * information which PROM presents. We must hardcode interrupt routing 45 * schematics. And this actually sucks. -- zaitcev 1999/05/12 46 * 47 * To find irq for a device we determine which routing map 48 * is in effect or, in other words, on which machine we are running. 49 * We use PROM name for this although other techniques may be used 50 * in special cases (Gleb reports a PROMless IIep based system). 51 * Once we know the map we take device configuration address and 52 * find PCIC pin number where INT line goes. Then we may either program 53 * preferred irq into the PCIC or supply the preexisting irq to the device. 54 */ 55 struct pcic_ca2irq { 56 unsigned char busno; /* PCI bus number */ 57 unsigned char devfn; /* Configuration address */ 58 unsigned char pin; /* PCIC external interrupt pin */ 59 unsigned char irq; /* Preferred IRQ (mappable in PCIC) */ 60 unsigned int force; /* Enforce preferred IRQ */ 61 }; 62 63 struct pcic_sn2list { 64 char *sysname; 65 struct pcic_ca2irq *intmap; 66 int mapdim; 67 }; 68 69 /* 70 * JavaEngine-1 apparently has different versions. 71 * 72 * According to communications with Sun folks, for P2 build 501-4628-03: 73 * pin 0 - parallel, audio; 74 * pin 1 - Ethernet; 75 * pin 2 - su; 76 * pin 3 - PS/2 kbd and mouse. 77 * 78 * OEM manual (805-1486): 79 * pin 0: Ethernet 80 * pin 1: All EBus 81 * pin 2: IGA (unused) 82 * pin 3: Not connected 83 * OEM manual says that 501-4628 & 501-4811 are the same thing, 84 * only the latter has NAND flash in place. 85 * 86 * So far unofficial Sun wins over the OEM manual. Poor OEMs... 87 */ 88 static struct pcic_ca2irq pcic_i_je1a[] = { /* 501-4811-03 */ 89 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */ 90 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */ 91 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */ 92 }; 93 94 /* XXX JS-E entry is incomplete - PCI Slot 2 address (pin 7)? */ 95 static struct pcic_ca2irq pcic_i_jse[] = { 96 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */ 97 { 0, 0x01, 1, 6, 0 }, /* hme */ 98 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */ 99 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */ 100 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */ 101 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */ 102 { 0, 0x80, 5, 11, 0 }, /* EIDE */ 103 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */ 104 { 0, 0xA0, 4, 9, 0 }, /* USB */ 105 /* 106 * Some pins belong to non-PCI devices, we hardcode them in drivers. 107 * sun4m timers - irq 10, 14 108 * PC style RTC - pin 7, irq 4 ? 109 * Smart card, Parallel - pin 4 shared with USB, ISA 110 * audio - pin 3, irq 5 ? 111 */ 112 }; 113 114 /* SPARCengine-6 was the original release name of CP1200. 115 * The documentation differs between the two versions 116 */ 117 static struct pcic_ca2irq pcic_i_se6[] = { 118 { 0, 0x08, 0, 2, 0 }, /* SCSI */ 119 { 0, 0x01, 1, 6, 0 }, /* HME */ 120 { 0, 0x00, 3, 13, 0 }, /* EBus */ 121 }; 122 123 /* 124 * Krups (courtesy of Varol Kaptan) 125 * No documentation available, but it was easy to guess 126 * because it was very similar to Espresso. 127 * 128 * pin 0 - kbd, mouse, serial; 129 * pin 1 - Ethernet; 130 * pin 2 - igs (we do not use it); 131 * pin 3 - audio; 132 * pin 4,5,6 - unused; 133 * pin 7 - RTC (from P2 onwards as David B. says). 134 */ 135 static struct pcic_ca2irq pcic_i_jk[] = { 136 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */ 137 { 0, 0x01, 1, 6, 0 }, /* hme */ 138 }; 139 140 /* 141 * Several entries in this list may point to the same routing map 142 * as several PROMs may be installed on the same physical board. 143 */ 144 #define SN2L_INIT(name, map) \ 145 { name, map, ARRAY_SIZE(map) } 146 147 static struct pcic_sn2list pcic_known_sysnames[] = { 148 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a), /* JE1, PROM 2.32 */ 149 SN2L_INIT("SUNW,JS-E", pcic_i_jse), /* PROLL JavaStation-E */ 150 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6), /* SPARCengine-6/CP-1200 */ 151 SN2L_INIT("SUNW,JS-NC", pcic_i_jk), /* PROLL JavaStation-NC */ 152 SN2L_INIT("SUNW,JSIIep", pcic_i_jk), /* OBP JavaStation-NC */ 153 { NULL, NULL, 0 } 154 }; 155 156 /* 157 * Only one PCIC per IIep, 158 * and since we have no SMP IIep, only one per system. 159 */ 160 static int pcic0_up; 161 static struct linux_pcic pcic0; 162 163 void __iomem *pcic_regs; 164 volatile int pcic_speculative; 165 volatile int pcic_trapped; 166 167 static void pci_do_gettimeofday(struct timeval *tv); 168 static int pci_do_settimeofday(struct timespec *tv); 169 170 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3)) 171 172 static int pcic_read_config_dword(unsigned int busno, unsigned int devfn, 173 int where, u32 *value) 174 { 175 struct linux_pcic *pcic; 176 unsigned long flags; 177 178 pcic = &pcic0; 179 180 local_irq_save(flags); 181 #if 0 /* does not fail here */ 182 pcic_speculative = 1; 183 pcic_trapped = 0; 184 #endif 185 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); 186 #if 0 /* does not fail here */ 187 nop(); 188 if (pcic_trapped) { 189 local_irq_restore(flags); 190 *value = ~0; 191 return 0; 192 } 193 #endif 194 pcic_speculative = 2; 195 pcic_trapped = 0; 196 *value = readl(pcic->pcic_config_space_data + (where&4)); 197 nop(); 198 if (pcic_trapped) { 199 pcic_speculative = 0; 200 local_irq_restore(flags); 201 *value = ~0; 202 return 0; 203 } 204 pcic_speculative = 0; 205 local_irq_restore(flags); 206 return 0; 207 } 208 209 static int pcic_read_config(struct pci_bus *bus, unsigned int devfn, 210 int where, int size, u32 *val) 211 { 212 unsigned int v; 213 214 if (bus->number != 0) return -EINVAL; 215 switch (size) { 216 case 1: 217 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 218 *val = 0xff & (v >> (8*(where & 3))); 219 return 0; 220 case 2: 221 if (where&1) return -EINVAL; 222 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 223 *val = 0xffff & (v >> (8*(where & 3))); 224 return 0; 225 case 4: 226 if (where&3) return -EINVAL; 227 pcic_read_config_dword(bus->number, devfn, where&~3, val); 228 return 0; 229 } 230 return -EINVAL; 231 } 232 233 static int pcic_write_config_dword(unsigned int busno, unsigned int devfn, 234 int where, u32 value) 235 { 236 struct linux_pcic *pcic; 237 unsigned long flags; 238 239 pcic = &pcic0; 240 241 local_irq_save(flags); 242 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); 243 writel(value, pcic->pcic_config_space_data + (where&4)); 244 local_irq_restore(flags); 245 return 0; 246 } 247 248 static int pcic_write_config(struct pci_bus *bus, unsigned int devfn, 249 int where, int size, u32 val) 250 { 251 unsigned int v; 252 253 if (bus->number != 0) return -EINVAL; 254 switch (size) { 255 case 1: 256 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 257 v = (v & ~(0xff << (8*(where&3)))) | 258 ((0xff&val) << (8*(where&3))); 259 return pcic_write_config_dword(bus->number, devfn, where&~3, v); 260 case 2: 261 if (where&1) return -EINVAL; 262 pcic_read_config_dword(bus->number, devfn, where&~3, &v); 263 v = (v & ~(0xffff << (8*(where&3)))) | 264 ((0xffff&val) << (8*(where&3))); 265 return pcic_write_config_dword(bus->number, devfn, where&~3, v); 266 case 4: 267 if (where&3) return -EINVAL; 268 return pcic_write_config_dword(bus->number, devfn, where, val); 269 } 270 return -EINVAL; 271 } 272 273 static struct pci_ops pcic_ops = { 274 .read = pcic_read_config, 275 .write = pcic_write_config, 276 }; 277 278 /* 279 * On sparc64 pcibios_init() calls pci_controller_probe(). 280 * We want PCIC probed little ahead so that interrupt controller 281 * would be operational. 282 */ 283 int __init pcic_probe(void) 284 { 285 struct linux_pcic *pcic; 286 struct linux_prom_registers regs[PROMREG_MAX]; 287 struct linux_pbm_info* pbm; 288 char namebuf[64]; 289 int node; 290 int err; 291 292 if (pcic0_up) { 293 prom_printf("PCIC: called twice!\n"); 294 prom_halt(); 295 } 296 pcic = &pcic0; 297 298 node = prom_getchild (prom_root_node); 299 node = prom_searchsiblings (node, "pci"); 300 if (node == 0) 301 return -ENODEV; 302 /* 303 * Map in PCIC register set, config space, and IO base 304 */ 305 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs)); 306 if (err == 0 || err == -1) { 307 prom_printf("PCIC: Error, cannot get PCIC registers " 308 "from PROM.\n"); 309 prom_halt(); 310 } 311 312 pcic0_up = 1; 313 314 pcic->pcic_res_regs.name = "pcic_registers"; 315 pcic->pcic_regs = ioremap(regs[0].phys_addr, regs[0].reg_size); 316 if (!pcic->pcic_regs) { 317 prom_printf("PCIC: Error, cannot map PCIC registers.\n"); 318 prom_halt(); 319 } 320 321 pcic->pcic_res_io.name = "pcic_io"; 322 if ((pcic->pcic_io = (unsigned long) 323 ioremap(regs[1].phys_addr, 0x10000)) == 0) { 324 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n"); 325 prom_halt(); 326 } 327 328 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr"; 329 if ((pcic->pcic_config_space_addr = 330 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == 0) { 331 prom_printf("PCIC: Error, cannot map" 332 "PCI Configuration Space Address.\n"); 333 prom_halt(); 334 } 335 336 /* 337 * Docs say three least significant bits in address and data 338 * must be the same. Thus, we need adjust size of data. 339 */ 340 pcic->pcic_res_cfg_data.name = "pcic_cfg_data"; 341 if ((pcic->pcic_config_space_data = 342 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == 0) { 343 prom_printf("PCIC: Error, cannot map" 344 "PCI Configuration Space Data.\n"); 345 prom_halt(); 346 } 347 348 pbm = &pcic->pbm; 349 pbm->prom_node = node; 350 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 351 strcpy(pbm->prom_name, namebuf); 352 353 { 354 extern volatile int t_nmi[1]; 355 extern int pcic_nmi_trap_patch[1]; 356 357 t_nmi[0] = pcic_nmi_trap_patch[0]; 358 t_nmi[1] = pcic_nmi_trap_patch[1]; 359 t_nmi[2] = pcic_nmi_trap_patch[2]; 360 t_nmi[3] = pcic_nmi_trap_patch[3]; 361 swift_flush_dcache(); 362 pcic_regs = pcic->pcic_regs; 363 } 364 365 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0; 366 { 367 struct pcic_sn2list *p; 368 369 for (p = pcic_known_sysnames; p->sysname != NULL; p++) { 370 if (strcmp(namebuf, p->sysname) == 0) 371 break; 372 } 373 pcic->pcic_imap = p->intmap; 374 pcic->pcic_imdim = p->mapdim; 375 } 376 if (pcic->pcic_imap == NULL) { 377 /* 378 * We do not panic here for the sake of embedded systems. 379 */ 380 printk("PCIC: System %s is unknown, cannot route interrupts\n", 381 namebuf); 382 } 383 384 return 0; 385 } 386 387 static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic) 388 { 389 struct linux_pbm_info *pbm = &pcic->pbm; 390 391 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm); 392 #if 0 /* deadwood transplanted from sparc64 */ 393 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node); 394 pci_record_assignments(pbm, pbm->pci_bus); 395 pci_assign_unassigned(pbm, pbm->pci_bus); 396 pci_fixup_irq(pbm, pbm->pci_bus); 397 #endif 398 } 399 400 /* 401 * Main entry point from the PCI subsystem. 402 */ 403 static int __init pcic_init(void) 404 { 405 struct linux_pcic *pcic; 406 407 /* 408 * PCIC should be initialized at start of the timer. 409 * So, here we report the presence of PCIC and do some magic passes. 410 */ 411 if(!pcic0_up) 412 return 0; 413 pcic = &pcic0; 414 415 /* 416 * Switch off IOTLB translation. 417 */ 418 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE, 419 pcic->pcic_regs+PCI_DVMA_CONTROL); 420 421 /* 422 * Increase mapped size for PCI memory space (DMA access). 423 * Should be done in that order (size first, address second). 424 * Why we couldn't set up 4GB and forget about it? XXX 425 */ 426 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0); 427 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY, 428 pcic->pcic_regs+PCI_BASE_ADDRESS_0); 429 430 pcic_pbm_scan_bus(pcic); 431 432 ebus_init(); 433 return 0; 434 } 435 436 int pcic_present(void) 437 { 438 return pcic0_up; 439 } 440 441 static int __init pdev_to_pnode(struct linux_pbm_info *pbm, 442 struct pci_dev *pdev) 443 { 444 struct linux_prom_pci_registers regs[PROMREG_MAX]; 445 int err; 446 int node = prom_getchild(pbm->prom_node); 447 448 while(node) { 449 err = prom_getproperty(node, "reg", 450 (char *)®s[0], sizeof(regs)); 451 if(err != 0 && err != -1) { 452 unsigned long devfn = (regs[0].which_io >> 8) & 0xff; 453 if(devfn == pdev->devfn) 454 return node; 455 } 456 node = prom_getsibling(node); 457 } 458 return 0; 459 } 460 461 static inline struct pcidev_cookie *pci_devcookie_alloc(void) 462 { 463 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC); 464 } 465 466 static void pcic_map_pci_device(struct linux_pcic *pcic, 467 struct pci_dev *dev, int node) 468 { 469 char namebuf[64]; 470 unsigned long address; 471 unsigned long flags; 472 int j; 473 474 if (node == 0 || node == -1) { 475 strcpy(namebuf, "???"); 476 } else { 477 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 478 } 479 480 for (j = 0; j < 6; j++) { 481 address = dev->resource[j].start; 482 if (address == 0) break; /* are sequential */ 483 flags = dev->resource[j].flags; 484 if ((flags & IORESOURCE_IO) != 0) { 485 if (address < 0x10000) { 486 /* 487 * A device responds to I/O cycles on PCI. 488 * We generate these cycles with memory 489 * access into the fixed map (phys 0x30000000). 490 * 491 * Since a device driver does not want to 492 * do ioremap() before accessing PC-style I/O, 493 * we supply virtual, ready to access address. 494 * 495 * Ebus devices do not come here even if 496 * CheerIO makes a similar conversion. 497 * See ebus.c for details. 498 * 499 * Note that request_region() 500 * works for these devices. 501 * 502 * XXX Neat trick, but it's a *bad* idea 503 * to shit into regions like that. 504 * What if we want to allocate one more 505 * PCI base address... 506 */ 507 dev->resource[j].start = 508 pcic->pcic_io + address; 509 dev->resource[j].end = 1; /* XXX */ 510 dev->resource[j].flags = 511 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM; 512 } else { 513 /* 514 * OOPS... PCI Spec allows this. Sun does 515 * not have any devices getting above 64K 516 * so it must be user with a weird I/O 517 * board in a PCI slot. We must remap it 518 * under 64K but it is not done yet. XXX 519 */ 520 printk("PCIC: Skipping I/O space at 0x%lx," 521 "this will Oops if a driver attaches;" 522 "device '%s' at %02x:%02x)\n", address, 523 namebuf, dev->bus->number, dev->devfn); 524 } 525 } 526 } 527 } 528 529 static void 530 pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node) 531 { 532 struct pcic_ca2irq *p; 533 int i, ivec; 534 char namebuf[64]; 535 536 if (node == 0 || node == -1) { 537 strcpy(namebuf, "???"); 538 } else { 539 prom_getstring(node, "name", namebuf, sizeof(namebuf)); 540 } 541 542 if ((p = pcic->pcic_imap) == 0) { 543 dev->irq = 0; 544 return; 545 } 546 for (i = 0; i < pcic->pcic_imdim; i++) { 547 if (p->busno == dev->bus->number && p->devfn == dev->devfn) 548 break; 549 p++; 550 } 551 if (i >= pcic->pcic_imdim) { 552 printk("PCIC: device %s devfn %02x:%02x not found in %d\n", 553 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim); 554 dev->irq = 0; 555 return; 556 } 557 558 i = p->pin; 559 if (i >= 0 && i < 4) { 560 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 561 dev->irq = ivec >> (i << 2) & 0xF; 562 } else if (i >= 4 && i < 8) { 563 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 564 dev->irq = ivec >> ((i-4) << 2) & 0xF; 565 } else { /* Corrupted map */ 566 printk("PCIC: BAD PIN %d\n", i); for (;;) {} 567 } 568 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */ 569 570 /* 571 * dev->irq=0 means PROM did not bother to program the upper 572 * half of PCIC. This happens on JS-E with PROM 3.11, for instance. 573 */ 574 if (dev->irq == 0 || p->force) { 575 if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */ 576 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {} 577 } 578 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n", 579 p->irq, p->pin, dev->bus->number, dev->devfn); 580 dev->irq = p->irq; 581 582 i = p->pin; 583 if (i >= 4) { 584 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 585 ivec &= ~(0xF << ((i - 4) << 2)); 586 ivec |= p->irq << ((i - 4) << 2); 587 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI); 588 } else { 589 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 590 ivec &= ~(0xF << (i << 2)); 591 ivec |= p->irq << (i << 2); 592 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO); 593 } 594 } 595 596 return; 597 } 598 599 /* 600 * Normally called from {do_}pci_scan_bus... 601 */ 602 void __devinit pcibios_fixup_bus(struct pci_bus *bus) 603 { 604 struct pci_dev *dev; 605 int i, has_io, has_mem; 606 unsigned int cmd; 607 struct linux_pcic *pcic; 608 /* struct linux_pbm_info* pbm = &pcic->pbm; */ 609 int node; 610 struct pcidev_cookie *pcp; 611 612 if (!pcic0_up) { 613 printk("pcibios_fixup_bus: no PCIC\n"); 614 return; 615 } 616 pcic = &pcic0; 617 618 /* 619 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus); 620 */ 621 if (bus->number != 0) { 622 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number); 623 return; 624 } 625 626 list_for_each_entry(dev, &bus->devices, bus_list) { 627 628 /* 629 * Comment from i386 branch: 630 * There are buggy BIOSes that forget to enable I/O and memory 631 * access to PCI devices. We try to fix this, but we need to 632 * be sure that the BIOS didn't forget to assign an address 633 * to the device. [mj] 634 * OBP is a case of such BIOS :-) 635 */ 636 has_io = has_mem = 0; 637 for(i=0; i<6; i++) { 638 unsigned long f = dev->resource[i].flags; 639 if (f & IORESOURCE_IO) { 640 has_io = 1; 641 } else if (f & IORESOURCE_MEM) 642 has_mem = 1; 643 } 644 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd); 645 if (has_io && !(cmd & PCI_COMMAND_IO)) { 646 printk("PCIC: Enabling I/O for device %02x:%02x\n", 647 dev->bus->number, dev->devfn); 648 cmd |= PCI_COMMAND_IO; 649 pcic_write_config(dev->bus, dev->devfn, 650 PCI_COMMAND, 2, cmd); 651 } 652 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) { 653 printk("PCIC: Enabling memory for device %02x:%02x\n", 654 dev->bus->number, dev->devfn); 655 cmd |= PCI_COMMAND_MEMORY; 656 pcic_write_config(dev->bus, dev->devfn, 657 PCI_COMMAND, 2, cmd); 658 } 659 660 node = pdev_to_pnode(&pcic->pbm, dev); 661 if(node == 0) 662 node = -1; 663 664 /* cookies */ 665 pcp = pci_devcookie_alloc(); 666 pcp->pbm = &pcic->pbm; 667 pcp->prom_node = of_find_node_by_phandle(node); 668 dev->sysdata = pcp; 669 670 /* fixing I/O to look like memory */ 671 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE) 672 pcic_map_pci_device(pcic, dev, node); 673 674 pcic_fill_irq(pcic, dev, node); 675 } 676 } 677 678 /* 679 * pcic_pin_to_irq() is exported to ebus.c. 680 */ 681 unsigned int 682 pcic_pin_to_irq(unsigned int pin, const char *name) 683 { 684 struct linux_pcic *pcic = &pcic0; 685 unsigned int irq; 686 unsigned int ivec; 687 688 if (pin < 4) { 689 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); 690 irq = ivec >> (pin << 2) & 0xF; 691 } else if (pin < 8) { 692 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); 693 irq = ivec >> ((pin-4) << 2) & 0xF; 694 } else { /* Corrupted map */ 695 printk("PCIC: BAD PIN %d FOR %s\n", pin, name); 696 for (;;) {} /* XXX Cannot panic properly in case of PROLL */ 697 } 698 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */ 699 return irq; 700 } 701 702 /* Makes compiler happy */ 703 static volatile int pcic_timer_dummy; 704 705 static void pcic_clear_clock_irq(void) 706 { 707 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT); 708 } 709 710 static irqreturn_t pcic_timer_handler (int irq, void *h) 711 { 712 write_seqlock(&xtime_lock); /* Dummy, to show that we remember */ 713 pcic_clear_clock_irq(); 714 do_timer(1); 715 #ifndef CONFIG_SMP 716 update_process_times(user_mode(get_irq_regs())); 717 #endif 718 write_sequnlock(&xtime_lock); 719 return IRQ_HANDLED; 720 } 721 722 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */ 723 #define TICK_TIMER_LIMIT ((100*1000000/4)/100) 724 725 void __init pci_time_init(void) 726 { 727 struct linux_pcic *pcic = &pcic0; 728 unsigned long v; 729 int timer_irq, irq; 730 731 /* A hack until do_gettimeofday prototype is moved to arch specific headers 732 and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */ 733 ((unsigned int *)do_gettimeofday)[0] = 734 0x10800000 | ((((unsigned long)pci_do_gettimeofday - 735 (unsigned long)do_gettimeofday) >> 2) & 0x003fffff); 736 ((unsigned int *)do_gettimeofday)[1] = 0x01000000; 737 BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM); 738 btfixup(); 739 740 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT); 741 /* PROM should set appropriate irq */ 742 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ); 743 timer_irq = PCI_COUNTER_IRQ_SYS(v); 744 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0), 745 pcic->pcic_regs+PCI_COUNTER_IRQ); 746 irq = request_irq(timer_irq, pcic_timer_handler, 747 (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); 748 if (irq) { 749 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq); 750 prom_halt(); 751 } 752 local_irq_enable(); 753 } 754 755 static __inline__ unsigned long do_gettimeoffset(void) 756 { 757 /* 758 * We divide all by 100 759 * to have microsecond resolution and to avoid overflow 760 */ 761 unsigned long count = 762 readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW; 763 count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100); 764 return count; 765 } 766 767 static void pci_do_gettimeofday(struct timeval *tv) 768 { 769 unsigned long flags; 770 unsigned long seq; 771 unsigned long usec, sec; 772 unsigned long max_ntp_tick = tick_usec - tickadj; 773 774 do { 775 seq = read_seqbegin_irqsave(&xtime_lock, flags); 776 usec = do_gettimeoffset(); 777 778 /* 779 * If time_adjust is negative then NTP is slowing the clock 780 * so make sure not to go into next possible interval. 781 * Better to lose some accuracy than have time go backwards.. 782 */ 783 if (unlikely(time_adjust < 0)) 784 usec = min(usec, max_ntp_tick); 785 786 sec = xtime.tv_sec; 787 usec += (xtime.tv_nsec / 1000); 788 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); 789 790 while (usec >= 1000000) { 791 usec -= 1000000; 792 sec++; 793 } 794 795 tv->tv_sec = sec; 796 tv->tv_usec = usec; 797 } 798 799 static int pci_do_settimeofday(struct timespec *tv) 800 { 801 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) 802 return -EINVAL; 803 804 /* 805 * This is revolting. We need to set "xtime" correctly. However, the 806 * value in this location is the value at the most recent update of 807 * wall time. Discover what correction gettimeofday() would have 808 * made, and then undo it! 809 */ 810 tv->tv_nsec -= 1000 * do_gettimeoffset(); 811 while (tv->tv_nsec < 0) { 812 tv->tv_nsec += NSEC_PER_SEC; 813 tv->tv_sec--; 814 } 815 816 wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec; 817 wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec; 818 819 if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) { 820 wall_to_monotonic.tv_nsec -= NSEC_PER_SEC; 821 wall_to_monotonic.tv_sec++; 822 } 823 if (wall_to_monotonic.tv_nsec < 0) { 824 wall_to_monotonic.tv_nsec += NSEC_PER_SEC; 825 wall_to_monotonic.tv_sec--; 826 } 827 828 xtime.tv_sec = tv->tv_sec; 829 xtime.tv_nsec = tv->tv_nsec; 830 ntp_clear(); 831 return 0; 832 } 833 834 #if 0 835 static void watchdog_reset() { 836 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS); 837 } 838 #endif 839 840 /* 841 * Other archs parse arguments here. 842 */ 843 char * __devinit pcibios_setup(char *str) 844 { 845 return str; 846 } 847 848 void pcibios_align_resource(void *data, struct resource *res, 849 resource_size_t size, resource_size_t align) 850 { 851 } 852 853 int pcibios_enable_device(struct pci_dev *pdev, int mask) 854 { 855 return 0; 856 } 857 858 /* 859 * NMI 860 */ 861 void pcic_nmi(unsigned int pend, struct pt_regs *regs) 862 { 863 864 pend = flip_dword(pend); 865 866 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) { 867 /* 868 * XXX On CP-1200 PCI #SERR may happen, we do not know 869 * what to do about it yet. 870 */ 871 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n", 872 pend, (int)regs->pc, pcic_speculative); 873 for (;;) { } 874 } 875 pcic_speculative = 0; 876 pcic_trapped = 1; 877 regs->pc = regs->npc; 878 regs->npc += 4; 879 } 880 881 static inline unsigned long get_irqmask(int irq_nr) 882 { 883 return 1 << irq_nr; 884 } 885 886 static void pcic_disable_irq(unsigned int irq_nr) 887 { 888 unsigned long mask, flags; 889 890 mask = get_irqmask(irq_nr); 891 local_irq_save(flags); 892 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); 893 local_irq_restore(flags); 894 } 895 896 static void pcic_enable_irq(unsigned int irq_nr) 897 { 898 unsigned long mask, flags; 899 900 mask = get_irqmask(irq_nr); 901 local_irq_save(flags); 902 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); 903 local_irq_restore(flags); 904 } 905 906 static void pcic_clear_profile_irq(int cpu) 907 { 908 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); 909 } 910 911 static void pcic_load_profile_irq(int cpu, unsigned int limit) 912 { 913 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); 914 } 915 916 /* We assume the caller has disabled local interrupts when these are called, 917 * or else very bizarre behavior will result. 918 */ 919 static void pcic_disable_pil_irq(unsigned int pil) 920 { 921 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); 922 } 923 924 static void pcic_enable_pil_irq(unsigned int pil) 925 { 926 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); 927 } 928 929 void __init sun4m_pci_init_IRQ(void) 930 { 931 BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM); 932 BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM); 933 BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM); 934 BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM); 935 BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); 936 BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM); 937 BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); 938 } 939 940 int pcibios_assign_resource(struct pci_dev *pdev, int resource) 941 { 942 return -ENXIO; 943 } 944 945 struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) 946 { 947 struct pcidev_cookie *pc = pdev->sysdata; 948 949 return pc->prom_node; 950 } 951 EXPORT_SYMBOL(pci_device_to_OF_node); 952 953 /* 954 * This probably belongs here rather than ioport.c because 955 * we do not want this crud linked into SBus kernels. 956 * Also, think for a moment about likes of floppy.c that 957 * include architecture specific parts. They may want to redefine ins/outs. 958 * 959 * We do not use horrible macros here because we want to 960 * advance pointer by sizeof(size). 961 */ 962 void outsb(unsigned long addr, const void *src, unsigned long count) 963 { 964 while (count) { 965 count -= 1; 966 outb(*(const char *)src, addr); 967 src += 1; 968 /* addr += 1; */ 969 } 970 } 971 972 void outsw(unsigned long addr, const void *src, unsigned long count) 973 { 974 while (count) { 975 count -= 2; 976 outw(*(const short *)src, addr); 977 src += 2; 978 /* addr += 2; */ 979 } 980 } 981 982 void outsl(unsigned long addr, const void *src, unsigned long count) 983 { 984 while (count) { 985 count -= 4; 986 outl(*(const long *)src, addr); 987 src += 4; 988 /* addr += 4; */ 989 } 990 } 991 992 void insb(unsigned long addr, void *dst, unsigned long count) 993 { 994 while (count) { 995 count -= 1; 996 *(unsigned char *)dst = inb(addr); 997 dst += 1; 998 /* addr += 1; */ 999 } 1000 } 1001 1002 void insw(unsigned long addr, void *dst, unsigned long count) 1003 { 1004 while (count) { 1005 count -= 2; 1006 *(unsigned short *)dst = inw(addr); 1007 dst += 2; 1008 /* addr += 2; */ 1009 } 1010 } 1011 1012 void insl(unsigned long addr, void *dst, unsigned long count) 1013 { 1014 while (count) { 1015 count -= 4; 1016 /* 1017 * XXX I am sure we are in for an unaligned trap here. 1018 */ 1019 *(unsigned long *)dst = inl(addr); 1020 dst += 4; 1021 /* addr += 4; */ 1022 } 1023 } 1024 1025 subsys_initcall(pcic_init); 1026