1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 2a88b5ba8SSam Ravnborg /* pci_msi.c: Sparc64 MSI support common layer. 3a88b5ba8SSam Ravnborg * 4a88b5ba8SSam Ravnborg * Copyright (C) 2007 David S. Miller (davem@davemloft.net) 5a88b5ba8SSam Ravnborg */ 6a88b5ba8SSam Ravnborg #include <linux/kernel.h> 7a88b5ba8SSam Ravnborg #include <linux/interrupt.h> 85a0e3ad6STejun Heo #include <linux/slab.h> 9a88b5ba8SSam Ravnborg #include <linux/irq.h> 10a88b5ba8SSam Ravnborg 11a88b5ba8SSam Ravnborg #include "pci_impl.h" 12a88b5ba8SSam Ravnborg 13a88b5ba8SSam Ravnborg static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie) 14a88b5ba8SSam Ravnborg { 15a88b5ba8SSam Ravnborg struct sparc64_msiq_cookie *msiq_cookie = cookie; 16a88b5ba8SSam Ravnborg struct pci_pbm_info *pbm = msiq_cookie->pbm; 17a88b5ba8SSam Ravnborg unsigned long msiqid = msiq_cookie->msiqid; 18a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops; 19a88b5ba8SSam Ravnborg unsigned long orig_head, head; 20a88b5ba8SSam Ravnborg int err; 21a88b5ba8SSam Ravnborg 22a88b5ba8SSam Ravnborg ops = pbm->msi_ops; 23a88b5ba8SSam Ravnborg 24a88b5ba8SSam Ravnborg err = ops->get_head(pbm, msiqid, &head); 25a88b5ba8SSam Ravnborg if (unlikely(err < 0)) 26a88b5ba8SSam Ravnborg goto err_get_head; 27a88b5ba8SSam Ravnborg 28a88b5ba8SSam Ravnborg orig_head = head; 29a88b5ba8SSam Ravnborg for (;;) { 30a88b5ba8SSam Ravnborg unsigned long msi; 31a88b5ba8SSam Ravnborg 32a88b5ba8SSam Ravnborg err = ops->dequeue_msi(pbm, msiqid, &head, &msi); 33a88b5ba8SSam Ravnborg if (likely(err > 0)) { 3444ed3c0cSSam Ravnborg unsigned int irq; 35a88b5ba8SSam Ravnborg 3644ed3c0cSSam Ravnborg irq = pbm->msi_irq_table[msi - pbm->msi_first]; 3716741ea0SThomas Gleixner generic_handle_irq(irq); 38a88b5ba8SSam Ravnborg } 39a88b5ba8SSam Ravnborg 40a88b5ba8SSam Ravnborg if (unlikely(err < 0)) 41a88b5ba8SSam Ravnborg goto err_dequeue; 42a88b5ba8SSam Ravnborg 43a88b5ba8SSam Ravnborg if (err == 0) 44a88b5ba8SSam Ravnborg break; 45a88b5ba8SSam Ravnborg } 46a88b5ba8SSam Ravnborg if (likely(head != orig_head)) { 47a88b5ba8SSam Ravnborg err = ops->set_head(pbm, msiqid, head); 48a88b5ba8SSam Ravnborg if (unlikely(err < 0)) 49a88b5ba8SSam Ravnborg goto err_set_head; 50a88b5ba8SSam Ravnborg } 51a88b5ba8SSam Ravnborg return IRQ_HANDLED; 52a88b5ba8SSam Ravnborg 53a88b5ba8SSam Ravnborg err_get_head: 54a88b5ba8SSam Ravnborg printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n", 55a88b5ba8SSam Ravnborg msiqid, err); 56a88b5ba8SSam Ravnborg goto err_out; 57a88b5ba8SSam Ravnborg 58a88b5ba8SSam Ravnborg err_dequeue: 59a88b5ba8SSam Ravnborg printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] " 60a88b5ba8SSam Ravnborg "gives error %d\n", 61a88b5ba8SSam Ravnborg head, msiqid, err); 62a88b5ba8SSam Ravnborg goto err_out; 63a88b5ba8SSam Ravnborg 64a88b5ba8SSam Ravnborg err_set_head: 65a88b5ba8SSam Ravnborg printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] " 66a88b5ba8SSam Ravnborg "gives error %d\n", 67a88b5ba8SSam Ravnborg head, msiqid, err); 68a88b5ba8SSam Ravnborg goto err_out; 69a88b5ba8SSam Ravnborg 70a88b5ba8SSam Ravnborg err_out: 71a88b5ba8SSam Ravnborg return IRQ_NONE; 72a88b5ba8SSam Ravnborg } 73a88b5ba8SSam Ravnborg 74a88b5ba8SSam Ravnborg static u32 pick_msiq(struct pci_pbm_info *pbm) 75a88b5ba8SSam Ravnborg { 76a88b5ba8SSam Ravnborg static DEFINE_SPINLOCK(rotor_lock); 77a88b5ba8SSam Ravnborg unsigned long flags; 78a88b5ba8SSam Ravnborg u32 ret, rotor; 79a88b5ba8SSam Ravnborg 80a88b5ba8SSam Ravnborg spin_lock_irqsave(&rotor_lock, flags); 81a88b5ba8SSam Ravnborg 82a88b5ba8SSam Ravnborg rotor = pbm->msiq_rotor; 83a88b5ba8SSam Ravnborg ret = pbm->msiq_first + rotor; 84a88b5ba8SSam Ravnborg 85a88b5ba8SSam Ravnborg if (++rotor >= pbm->msiq_num) 86a88b5ba8SSam Ravnborg rotor = 0; 87a88b5ba8SSam Ravnborg pbm->msiq_rotor = rotor; 88a88b5ba8SSam Ravnborg 89a88b5ba8SSam Ravnborg spin_unlock_irqrestore(&rotor_lock, flags); 90a88b5ba8SSam Ravnborg 91a88b5ba8SSam Ravnborg return ret; 92a88b5ba8SSam Ravnborg } 93a88b5ba8SSam Ravnborg 94a88b5ba8SSam Ravnborg 95a88b5ba8SSam Ravnborg static int alloc_msi(struct pci_pbm_info *pbm) 96a88b5ba8SSam Ravnborg { 97a88b5ba8SSam Ravnborg int i; 98a88b5ba8SSam Ravnborg 99a88b5ba8SSam Ravnborg for (i = 0; i < pbm->msi_num; i++) { 100a88b5ba8SSam Ravnborg if (!test_and_set_bit(i, pbm->msi_bitmap)) 101a88b5ba8SSam Ravnborg return i + pbm->msi_first; 102a88b5ba8SSam Ravnborg } 103a88b5ba8SSam Ravnborg 104a88b5ba8SSam Ravnborg return -ENOENT; 105a88b5ba8SSam Ravnborg } 106a88b5ba8SSam Ravnborg 107a88b5ba8SSam Ravnborg static void free_msi(struct pci_pbm_info *pbm, int msi_num) 108a88b5ba8SSam Ravnborg { 109a88b5ba8SSam Ravnborg msi_num -= pbm->msi_first; 110a88b5ba8SSam Ravnborg clear_bit(msi_num, pbm->msi_bitmap); 111a88b5ba8SSam Ravnborg } 112a88b5ba8SSam Ravnborg 113a88b5ba8SSam Ravnborg static struct irq_chip msi_irq = { 11489a7183dSThomas Gleixner .name = "PCI-MSI", 115280510f1SThomas Gleixner .irq_mask = pci_msi_mask_irq, 116280510f1SThomas Gleixner .irq_unmask = pci_msi_unmask_irq, 117280510f1SThomas Gleixner .irq_enable = pci_msi_unmask_irq, 118280510f1SThomas Gleixner .irq_disable = pci_msi_mask_irq, 119a88b5ba8SSam Ravnborg /* XXX affinity XXX */ 120a88b5ba8SSam Ravnborg }; 121a88b5ba8SSam Ravnborg 12244ed3c0cSSam Ravnborg static int sparc64_setup_msi_irq(unsigned int *irq_p, 123a88b5ba8SSam Ravnborg struct pci_dev *pdev, 124a88b5ba8SSam Ravnborg struct msi_desc *entry) 125a88b5ba8SSam Ravnborg { 126a88b5ba8SSam Ravnborg struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; 127a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops = pbm->msi_ops; 128a88b5ba8SSam Ravnborg struct msi_msg msg; 129a88b5ba8SSam Ravnborg int msi, err; 130a88b5ba8SSam Ravnborg u32 msiqid; 131a88b5ba8SSam Ravnborg 13244ed3c0cSSam Ravnborg *irq_p = irq_alloc(0, 0); 133a88b5ba8SSam Ravnborg err = -ENOMEM; 13444ed3c0cSSam Ravnborg if (!*irq_p) 135a88b5ba8SSam Ravnborg goto out_err; 136a88b5ba8SSam Ravnborg 137394d441bSThomas Gleixner irq_set_chip_and_handler_name(*irq_p, &msi_irq, handle_simple_irq, 138394d441bSThomas Gleixner "MSI"); 139a88b5ba8SSam Ravnborg 140a88b5ba8SSam Ravnborg err = alloc_msi(pbm); 141a88b5ba8SSam Ravnborg if (unlikely(err < 0)) 14244ed3c0cSSam Ravnborg goto out_irq_free; 143a88b5ba8SSam Ravnborg 144a88b5ba8SSam Ravnborg msi = err; 145a88b5ba8SSam Ravnborg 146a88b5ba8SSam Ravnborg msiqid = pick_msiq(pbm); 147a88b5ba8SSam Ravnborg 148a88b5ba8SSam Ravnborg err = ops->msi_setup(pbm, msiqid, msi, 149a88b5ba8SSam Ravnborg (entry->msi_attrib.is_64 ? 1 : 0)); 150a88b5ba8SSam Ravnborg if (err) 151a88b5ba8SSam Ravnborg goto out_msi_free; 152a88b5ba8SSam Ravnborg 15344ed3c0cSSam Ravnborg pbm->msi_irq_table[msi - pbm->msi_first] = *irq_p; 154a88b5ba8SSam Ravnborg 155a88b5ba8SSam Ravnborg if (entry->msi_attrib.is_64) { 156a88b5ba8SSam Ravnborg msg.address_hi = pbm->msi64_start >> 32; 157a88b5ba8SSam Ravnborg msg.address_lo = pbm->msi64_start & 0xffffffff; 158a88b5ba8SSam Ravnborg } else { 159a88b5ba8SSam Ravnborg msg.address_hi = 0; 160a88b5ba8SSam Ravnborg msg.address_lo = pbm->msi32_start; 161a88b5ba8SSam Ravnborg } 162a88b5ba8SSam Ravnborg msg.data = msi; 163a88b5ba8SSam Ravnborg 164394d441bSThomas Gleixner irq_set_msi_desc(*irq_p, entry); 16583a18912SJiang Liu pci_write_msi_msg(*irq_p, &msg); 166a88b5ba8SSam Ravnborg 167a88b5ba8SSam Ravnborg return 0; 168a88b5ba8SSam Ravnborg 169a88b5ba8SSam Ravnborg out_msi_free: 170a88b5ba8SSam Ravnborg free_msi(pbm, msi); 171a88b5ba8SSam Ravnborg 17244ed3c0cSSam Ravnborg out_irq_free: 173394d441bSThomas Gleixner irq_set_chip(*irq_p, NULL); 17444ed3c0cSSam Ravnborg irq_free(*irq_p); 17544ed3c0cSSam Ravnborg *irq_p = 0; 176a88b5ba8SSam Ravnborg 177a88b5ba8SSam Ravnborg out_err: 178a88b5ba8SSam Ravnborg return err; 179a88b5ba8SSam Ravnborg } 180a88b5ba8SSam Ravnborg 18144ed3c0cSSam Ravnborg static void sparc64_teardown_msi_irq(unsigned int irq, 182a88b5ba8SSam Ravnborg struct pci_dev *pdev) 183a88b5ba8SSam Ravnborg { 184a88b5ba8SSam Ravnborg struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; 185a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops = pbm->msi_ops; 186a88b5ba8SSam Ravnborg unsigned int msi_num; 187a88b5ba8SSam Ravnborg int i, err; 188a88b5ba8SSam Ravnborg 189a88b5ba8SSam Ravnborg for (i = 0; i < pbm->msi_num; i++) { 19044ed3c0cSSam Ravnborg if (pbm->msi_irq_table[i] == irq) 191a88b5ba8SSam Ravnborg break; 192a88b5ba8SSam Ravnborg } 193a88b5ba8SSam Ravnborg if (i >= pbm->msi_num) { 194a88b5ba8SSam Ravnborg printk(KERN_ERR "%s: teardown: No MSI for irq %u\n", 19544ed3c0cSSam Ravnborg pbm->name, irq); 196a88b5ba8SSam Ravnborg return; 197a88b5ba8SSam Ravnborg } 198a88b5ba8SSam Ravnborg 199a88b5ba8SSam Ravnborg msi_num = pbm->msi_first + i; 200a88b5ba8SSam Ravnborg pbm->msi_irq_table[i] = ~0U; 201a88b5ba8SSam Ravnborg 202a88b5ba8SSam Ravnborg err = ops->msi_teardown(pbm, msi_num); 203a88b5ba8SSam Ravnborg if (err) { 204a88b5ba8SSam Ravnborg printk(KERN_ERR "%s: teardown: ops->teardown() on MSI %u, " 205a88b5ba8SSam Ravnborg "irq %u, gives error %d\n", 20644ed3c0cSSam Ravnborg pbm->name, msi_num, irq, err); 207a88b5ba8SSam Ravnborg return; 208a88b5ba8SSam Ravnborg } 209a88b5ba8SSam Ravnborg 210a88b5ba8SSam Ravnborg free_msi(pbm, msi_num); 211a88b5ba8SSam Ravnborg 212394d441bSThomas Gleixner irq_set_chip(irq, NULL); 21344ed3c0cSSam Ravnborg irq_free(irq); 214a88b5ba8SSam Ravnborg } 215a88b5ba8SSam Ravnborg 216a88b5ba8SSam Ravnborg static int msi_bitmap_alloc(struct pci_pbm_info *pbm) 217a88b5ba8SSam Ravnborg { 218a88b5ba8SSam Ravnborg unsigned long size, bits_per_ulong; 219a88b5ba8SSam Ravnborg 220a88b5ba8SSam Ravnborg bits_per_ulong = sizeof(unsigned long) * 8; 221a88b5ba8SSam Ravnborg size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1); 222a88b5ba8SSam Ravnborg size /= 8; 223a88b5ba8SSam Ravnborg BUG_ON(size % sizeof(unsigned long)); 224a88b5ba8SSam Ravnborg 225a88b5ba8SSam Ravnborg pbm->msi_bitmap = kzalloc(size, GFP_KERNEL); 226a88b5ba8SSam Ravnborg if (!pbm->msi_bitmap) 227a88b5ba8SSam Ravnborg return -ENOMEM; 228a88b5ba8SSam Ravnborg 229a88b5ba8SSam Ravnborg return 0; 230a88b5ba8SSam Ravnborg } 231a88b5ba8SSam Ravnborg 232a88b5ba8SSam Ravnborg static void msi_bitmap_free(struct pci_pbm_info *pbm) 233a88b5ba8SSam Ravnborg { 234a88b5ba8SSam Ravnborg kfree(pbm->msi_bitmap); 235a88b5ba8SSam Ravnborg pbm->msi_bitmap = NULL; 236a88b5ba8SSam Ravnborg } 237a88b5ba8SSam Ravnborg 238a88b5ba8SSam Ravnborg static int msi_table_alloc(struct pci_pbm_info *pbm) 239a88b5ba8SSam Ravnborg { 240a88b5ba8SSam Ravnborg int size, i; 241a88b5ba8SSam Ravnborg 242a88b5ba8SSam Ravnborg size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie); 243a88b5ba8SSam Ravnborg pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL); 244a88b5ba8SSam Ravnborg if (!pbm->msiq_irq_cookies) 245a88b5ba8SSam Ravnborg return -ENOMEM; 246a88b5ba8SSam Ravnborg 247a88b5ba8SSam Ravnborg for (i = 0; i < pbm->msiq_num; i++) { 248a88b5ba8SSam Ravnborg struct sparc64_msiq_cookie *p; 249a88b5ba8SSam Ravnborg 250a88b5ba8SSam Ravnborg p = &pbm->msiq_irq_cookies[i]; 251a88b5ba8SSam Ravnborg p->pbm = pbm; 252a88b5ba8SSam Ravnborg p->msiqid = pbm->msiq_first + i; 253a88b5ba8SSam Ravnborg } 254a88b5ba8SSam Ravnborg 255a88b5ba8SSam Ravnborg size = pbm->msi_num * sizeof(unsigned int); 256a88b5ba8SSam Ravnborg pbm->msi_irq_table = kzalloc(size, GFP_KERNEL); 257a88b5ba8SSam Ravnborg if (!pbm->msi_irq_table) { 258a88b5ba8SSam Ravnborg kfree(pbm->msiq_irq_cookies); 259a88b5ba8SSam Ravnborg pbm->msiq_irq_cookies = NULL; 260a88b5ba8SSam Ravnborg return -ENOMEM; 261a88b5ba8SSam Ravnborg } 262a88b5ba8SSam Ravnborg 263a88b5ba8SSam Ravnborg return 0; 264a88b5ba8SSam Ravnborg } 265a88b5ba8SSam Ravnborg 266a88b5ba8SSam Ravnborg static void msi_table_free(struct pci_pbm_info *pbm) 267a88b5ba8SSam Ravnborg { 268a88b5ba8SSam Ravnborg kfree(pbm->msiq_irq_cookies); 269a88b5ba8SSam Ravnborg pbm->msiq_irq_cookies = NULL; 270a88b5ba8SSam Ravnborg 271a88b5ba8SSam Ravnborg kfree(pbm->msi_irq_table); 272a88b5ba8SSam Ravnborg pbm->msi_irq_table = NULL; 273a88b5ba8SSam Ravnborg } 274a88b5ba8SSam Ravnborg 275a88b5ba8SSam Ravnborg static int bringup_one_msi_queue(struct pci_pbm_info *pbm, 276a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops, 277a88b5ba8SSam Ravnborg unsigned long msiqid, 278a88b5ba8SSam Ravnborg unsigned long devino) 279a88b5ba8SSam Ravnborg { 280a88b5ba8SSam Ravnborg int irq = ops->msiq_build_irq(pbm, msiqid, devino); 281a88b5ba8SSam Ravnborg int err, nid; 282a88b5ba8SSam Ravnborg 283a88b5ba8SSam Ravnborg if (irq < 0) 284a88b5ba8SSam Ravnborg return irq; 285a88b5ba8SSam Ravnborg 286a88b5ba8SSam Ravnborg nid = pbm->numa_node; 287a88b5ba8SSam Ravnborg if (nid != -1) { 288fb1fece5SKOSAKI Motohiro cpumask_t numa_mask; 289a88b5ba8SSam Ravnborg 290fb1fece5SKOSAKI Motohiro cpumask_copy(&numa_mask, cpumask_of_node(nid)); 2912ca1a615SRusty Russell irq_set_affinity(irq, &numa_mask); 292a88b5ba8SSam Ravnborg } 293a88b5ba8SSam Ravnborg err = request_irq(irq, sparc64_msiq_interrupt, 0, 294a88b5ba8SSam Ravnborg "MSIQ", 295a88b5ba8SSam Ravnborg &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]); 296a88b5ba8SSam Ravnborg if (err) 297a88b5ba8SSam Ravnborg return err; 298a88b5ba8SSam Ravnborg 299a88b5ba8SSam Ravnborg return 0; 300a88b5ba8SSam Ravnborg } 301a88b5ba8SSam Ravnborg 302a88b5ba8SSam Ravnborg static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm, 303a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops) 304a88b5ba8SSam Ravnborg { 305a88b5ba8SSam Ravnborg int i; 306a88b5ba8SSam Ravnborg 307a88b5ba8SSam Ravnborg for (i = 0; i < pbm->msiq_num; i++) { 308a88b5ba8SSam Ravnborg unsigned long msiqid = i + pbm->msiq_first; 309a88b5ba8SSam Ravnborg unsigned long devino = i + pbm->msiq_first_devino; 310a88b5ba8SSam Ravnborg int err; 311a88b5ba8SSam Ravnborg 312a88b5ba8SSam Ravnborg err = bringup_one_msi_queue(pbm, ops, msiqid, devino); 313a88b5ba8SSam Ravnborg if (err) 314a88b5ba8SSam Ravnborg return err; 315a88b5ba8SSam Ravnborg } 316a88b5ba8SSam Ravnborg 317a88b5ba8SSam Ravnborg return 0; 318a88b5ba8SSam Ravnborg } 319a88b5ba8SSam Ravnborg 320a88b5ba8SSam Ravnborg void sparc64_pbm_msi_init(struct pci_pbm_info *pbm, 321a88b5ba8SSam Ravnborg const struct sparc64_msiq_ops *ops) 322a88b5ba8SSam Ravnborg { 323a88b5ba8SSam Ravnborg const u32 *val; 324a88b5ba8SSam Ravnborg int len; 325a88b5ba8SSam Ravnborg 32661c7a080SGrant Likely val = of_get_property(pbm->op->dev.of_node, "#msi-eqs", &len); 327a88b5ba8SSam Ravnborg if (!val || len != 4) 328a88b5ba8SSam Ravnborg goto no_msi; 329a88b5ba8SSam Ravnborg pbm->msiq_num = *val; 330a88b5ba8SSam Ravnborg if (pbm->msiq_num) { 331a88b5ba8SSam Ravnborg const struct msiq_prop { 332a88b5ba8SSam Ravnborg u32 first_msiq; 333a88b5ba8SSam Ravnborg u32 num_msiq; 334a88b5ba8SSam Ravnborg u32 first_devino; 335a88b5ba8SSam Ravnborg } *mqp; 336a88b5ba8SSam Ravnborg const struct msi_range_prop { 337a88b5ba8SSam Ravnborg u32 first_msi; 338a88b5ba8SSam Ravnborg u32 num_msi; 339a88b5ba8SSam Ravnborg } *mrng; 340a88b5ba8SSam Ravnborg const struct addr_range_prop { 341a88b5ba8SSam Ravnborg u32 msi32_high; 342a88b5ba8SSam Ravnborg u32 msi32_low; 343a88b5ba8SSam Ravnborg u32 msi32_len; 344a88b5ba8SSam Ravnborg u32 msi64_high; 345a88b5ba8SSam Ravnborg u32 msi64_low; 346a88b5ba8SSam Ravnborg u32 msi64_len; 347a88b5ba8SSam Ravnborg } *arng; 348a88b5ba8SSam Ravnborg 34961c7a080SGrant Likely val = of_get_property(pbm->op->dev.of_node, "msi-eq-size", &len); 350a88b5ba8SSam Ravnborg if (!val || len != 4) 351a88b5ba8SSam Ravnborg goto no_msi; 352a88b5ba8SSam Ravnborg 353a88b5ba8SSam Ravnborg pbm->msiq_ent_count = *val; 354a88b5ba8SSam Ravnborg 35561c7a080SGrant Likely mqp = of_get_property(pbm->op->dev.of_node, 356a88b5ba8SSam Ravnborg "msi-eq-to-devino", &len); 357a88b5ba8SSam Ravnborg if (!mqp) 35861c7a080SGrant Likely mqp = of_get_property(pbm->op->dev.of_node, 359a88b5ba8SSam Ravnborg "msi-eq-devino", &len); 360a88b5ba8SSam Ravnborg if (!mqp || len != sizeof(struct msiq_prop)) 361a88b5ba8SSam Ravnborg goto no_msi; 362a88b5ba8SSam Ravnborg 363a88b5ba8SSam Ravnborg pbm->msiq_first = mqp->first_msiq; 364a88b5ba8SSam Ravnborg pbm->msiq_first_devino = mqp->first_devino; 365a88b5ba8SSam Ravnborg 36661c7a080SGrant Likely val = of_get_property(pbm->op->dev.of_node, "#msi", &len); 367a88b5ba8SSam Ravnborg if (!val || len != 4) 368a88b5ba8SSam Ravnborg goto no_msi; 369a88b5ba8SSam Ravnborg pbm->msi_num = *val; 370a88b5ba8SSam Ravnborg 37161c7a080SGrant Likely mrng = of_get_property(pbm->op->dev.of_node, "msi-ranges", &len); 372a88b5ba8SSam Ravnborg if (!mrng || len != sizeof(struct msi_range_prop)) 373a88b5ba8SSam Ravnborg goto no_msi; 374a88b5ba8SSam Ravnborg pbm->msi_first = mrng->first_msi; 375a88b5ba8SSam Ravnborg 37661c7a080SGrant Likely val = of_get_property(pbm->op->dev.of_node, "msi-data-mask", &len); 377a88b5ba8SSam Ravnborg if (!val || len != 4) 378a88b5ba8SSam Ravnborg goto no_msi; 379a88b5ba8SSam Ravnborg pbm->msi_data_mask = *val; 380a88b5ba8SSam Ravnborg 38161c7a080SGrant Likely val = of_get_property(pbm->op->dev.of_node, "msix-data-width", &len); 382a88b5ba8SSam Ravnborg if (!val || len != 4) 383a88b5ba8SSam Ravnborg goto no_msi; 384a88b5ba8SSam Ravnborg pbm->msix_data_width = *val; 385a88b5ba8SSam Ravnborg 38661c7a080SGrant Likely arng = of_get_property(pbm->op->dev.of_node, "msi-address-ranges", 387a88b5ba8SSam Ravnborg &len); 388a88b5ba8SSam Ravnborg if (!arng || len != sizeof(struct addr_range_prop)) 389a88b5ba8SSam Ravnborg goto no_msi; 390a88b5ba8SSam Ravnborg pbm->msi32_start = ((u64)arng->msi32_high << 32) | 391a88b5ba8SSam Ravnborg (u64) arng->msi32_low; 392a88b5ba8SSam Ravnborg pbm->msi64_start = ((u64)arng->msi64_high << 32) | 393a88b5ba8SSam Ravnborg (u64) arng->msi64_low; 394a88b5ba8SSam Ravnborg pbm->msi32_len = arng->msi32_len; 395a88b5ba8SSam Ravnborg pbm->msi64_len = arng->msi64_len; 396a88b5ba8SSam Ravnborg 397a88b5ba8SSam Ravnborg if (msi_bitmap_alloc(pbm)) 398a88b5ba8SSam Ravnborg goto no_msi; 399a88b5ba8SSam Ravnborg 400a88b5ba8SSam Ravnborg if (msi_table_alloc(pbm)) { 401a88b5ba8SSam Ravnborg msi_bitmap_free(pbm); 402a88b5ba8SSam Ravnborg goto no_msi; 403a88b5ba8SSam Ravnborg } 404a88b5ba8SSam Ravnborg 405a88b5ba8SSam Ravnborg if (ops->msiq_alloc(pbm)) { 406a88b5ba8SSam Ravnborg msi_table_free(pbm); 407a88b5ba8SSam Ravnborg msi_bitmap_free(pbm); 408a88b5ba8SSam Ravnborg goto no_msi; 409a88b5ba8SSam Ravnborg } 410a88b5ba8SSam Ravnborg 411a88b5ba8SSam Ravnborg if (sparc64_bringup_msi_queues(pbm, ops)) { 412a88b5ba8SSam Ravnborg ops->msiq_free(pbm); 413a88b5ba8SSam Ravnborg msi_table_free(pbm); 414a88b5ba8SSam Ravnborg msi_bitmap_free(pbm); 415a88b5ba8SSam Ravnborg goto no_msi; 416a88b5ba8SSam Ravnborg } 417a88b5ba8SSam Ravnborg 418a88b5ba8SSam Ravnborg printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] " 419a88b5ba8SSam Ravnborg "devino[0x%x]\n", 420a88b5ba8SSam Ravnborg pbm->name, 421a88b5ba8SSam Ravnborg pbm->msiq_first, pbm->msiq_num, 422a88b5ba8SSam Ravnborg pbm->msiq_ent_count, 423a88b5ba8SSam Ravnborg pbm->msiq_first_devino); 424a88b5ba8SSam Ravnborg printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] " 425a88b5ba8SSam Ravnborg "width[%u]\n", 426a88b5ba8SSam Ravnborg pbm->name, 427a88b5ba8SSam Ravnborg pbm->msi_first, pbm->msi_num, pbm->msi_data_mask, 428a88b5ba8SSam Ravnborg pbm->msix_data_width); 42990181136SSam Ravnborg printk(KERN_INFO "%s: MSI addr32[0x%llx:0x%x] " 43090181136SSam Ravnborg "addr64[0x%llx:0x%x]\n", 431a88b5ba8SSam Ravnborg pbm->name, 432a88b5ba8SSam Ravnborg pbm->msi32_start, pbm->msi32_len, 433a88b5ba8SSam Ravnborg pbm->msi64_start, pbm->msi64_len); 434a88b5ba8SSam Ravnborg printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n", 435a88b5ba8SSam Ravnborg pbm->name, 436a88b5ba8SSam Ravnborg __pa(pbm->msi_queues)); 437a88b5ba8SSam Ravnborg 438a88b5ba8SSam Ravnborg pbm->msi_ops = ops; 439a88b5ba8SSam Ravnborg pbm->setup_msi_irq = sparc64_setup_msi_irq; 440a88b5ba8SSam Ravnborg pbm->teardown_msi_irq = sparc64_teardown_msi_irq; 441a88b5ba8SSam Ravnborg } 442a88b5ba8SSam Ravnborg return; 443a88b5ba8SSam Ravnborg 444a88b5ba8SSam Ravnborg no_msi: 445a88b5ba8SSam Ravnborg pbm->msiq_num = 0; 446a88b5ba8SSam Ravnborg printk(KERN_INFO "%s: No MSI support.\n", pbm->name); 447a88b5ba8SSam Ravnborg } 448