1 /* 2 * leon_pci.c: LEON Host PCI support 3 * 4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom 5 * 6 * Code is partially derived from pcic.c 7 */ 8 9 #include <linux/of_device.h> 10 #include <linux/kernel.h> 11 #include <linux/pci.h> 12 #include <linux/export.h> 13 #include <asm/leon.h> 14 #include <asm/leon_pci.h> 15 16 /* The LEON architecture does not rely on a BIOS or bootloader to setup 17 * PCI for us. The Linux generic routines are used to setup resources, 18 * reset values of configuration-space register settings are preserved. 19 * 20 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is 21 * accessed through a Window which is translated to low 64KB in PCI space, the 22 * first 4KB is not used so 60KB is available. 23 */ 24 void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) 25 { 26 LIST_HEAD(resources); 27 struct pci_bus *root_bus; 28 struct pci_host_bridge *bridge; 29 int ret; 30 31 bridge = pci_alloc_host_bridge(0); 32 if (!bridge) 33 return; 34 35 pci_add_resource_offset(&resources, &info->io_space, 36 info->io_space.start - 0x1000); 37 pci_add_resource(&resources, &info->mem_space); 38 info->busn.flags = IORESOURCE_BUS; 39 pci_add_resource(&resources, &info->busn); 40 41 list_splice_init(&resources, &bridge->windows); 42 bridge->dev.parent = &ofdev->dev; 43 bridge->sysdata = info; 44 bridge->busnr = 0; 45 bridge->ops = info->ops; 46 bridge->swizzle_irq = pci_common_swizzle; 47 bridge->map_irq = info->map_irq; 48 49 ret = pci_scan_root_bus_bridge(bridge); 50 if (ret) { 51 pci_free_host_bridge(bridge); 52 return; 53 } 54 55 root_bus = bridge->bus; 56 57 /* Assign devices with resources */ 58 pci_assign_unassigned_resources(); 59 pci_bus_add_devices(root_bus); 60 } 61 62 void pcibios_fixup_bus(struct pci_bus *pbus) 63 { 64 struct pci_dev *dev; 65 int i, has_io, has_mem; 66 u16 cmd; 67 68 list_for_each_entry(dev, &pbus->devices, bus_list) { 69 /* 70 * We can not rely on that the bootloader has enabled I/O 71 * or memory access to PCI devices. Instead we enable it here 72 * if the device has BARs of respective type. 73 */ 74 has_io = has_mem = 0; 75 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 76 unsigned long f = dev->resource[i].flags; 77 if (f & IORESOURCE_IO) 78 has_io = 1; 79 else if (f & IORESOURCE_MEM) 80 has_mem = 1; 81 } 82 /* ROM BARs are mapped into 32-bit memory space */ 83 if (dev->resource[PCI_ROM_RESOURCE].end != 0) { 84 dev->resource[PCI_ROM_RESOURCE].flags |= 85 IORESOURCE_ROM_ENABLE; 86 has_mem = 1; 87 } 88 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd); 89 if (has_io && !(cmd & PCI_COMMAND_IO)) { 90 #ifdef CONFIG_PCI_DEBUG 91 printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n", 92 pci_name(dev)); 93 #endif 94 cmd |= PCI_COMMAND_IO; 95 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND, 96 cmd); 97 } 98 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) { 99 #ifdef CONFIG_PCI_DEBUG 100 printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev" 101 "%s\n", pci_name(dev)); 102 #endif 103 cmd |= PCI_COMMAND_MEMORY; 104 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND, 105 cmd); 106 } 107 } 108 } 109