1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB 4 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB 5 */ 6 7 #include <linux/kernel.h> 8 #include <linux/errno.h> 9 #include <linux/mutex.h> 10 #include <linux/of.h> 11 #include <linux/of_platform.h> 12 #include <linux/interrupt.h> 13 #include <linux/of_device.h> 14 #include <linux/clocksource.h> 15 #include <linux/clockchips.h> 16 17 #include <asm/oplib.h> 18 #include <asm/timer.h> 19 #include <asm/prom.h> 20 #include <asm/leon.h> 21 #include <asm/leon_amba.h> 22 #include <asm/traps.h> 23 #include <asm/cacheflush.h> 24 #include <asm/smp.h> 25 #include <asm/setup.h> 26 27 #include "kernel.h" 28 #include "prom.h" 29 #include "irq.h" 30 31 struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */ 32 struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */ 33 34 int leondebug_irq_disable; 35 int leon_debug_irqout; 36 static volatile u32 dummy_master_l10_counter; 37 unsigned long amba_system_id; 38 static DEFINE_SPINLOCK(leon_irq_lock); 39 40 static unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */ 41 static unsigned long leon3_gptimer_ackmask; /* For clearing pending bit */ 42 unsigned long leon3_gptimer_irq; /* interrupt controller irq number */ 43 unsigned int sparc_leon_eirq; 44 #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu]) 45 #define LEON_IACK (&leon3_irqctrl_regs->iclear) 46 #define LEON_DO_ACK_HW 1 47 48 /* Return the last ACKed IRQ by the Extended IRQ controller. It has already 49 * been (automatically) ACKed when the CPU takes the trap. 50 */ 51 static inline unsigned int leon_eirq_get(int cpu) 52 { 53 return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f; 54 } 55 56 /* Handle one or multiple IRQs from the extended interrupt controller */ 57 static void leon_handle_ext_irq(struct irq_desc *desc) 58 { 59 unsigned int eirq; 60 struct irq_bucket *p; 61 int cpu = sparc_leon3_cpuid(); 62 63 eirq = leon_eirq_get(cpu); 64 p = irq_map[eirq]; 65 if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */ 66 generic_handle_irq(p->irq); 67 } 68 69 /* The extended IRQ controller has been found, this function registers it */ 70 static void leon_eirq_setup(unsigned int eirq) 71 { 72 unsigned long mask, oldmask; 73 unsigned int veirq; 74 75 if (eirq < 1 || eirq > 0xf) { 76 printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq); 77 return; 78 } 79 80 veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0); 81 82 /* 83 * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ 84 * controller have a mask-bit of their own, so this is safe. 85 */ 86 irq_link(veirq); 87 mask = 1 << eirq; 88 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id)); 89 LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask)); 90 sparc_leon_eirq = eirq; 91 } 92 93 unsigned long leon_get_irqmask(unsigned int irq) 94 { 95 unsigned long mask; 96 97 if (!irq || ((irq > 0xf) && !sparc_leon_eirq) 98 || ((irq > 0x1f) && sparc_leon_eirq)) { 99 printk(KERN_ERR 100 "leon_get_irqmask: false irq number: %d\n", irq); 101 mask = 0; 102 } else { 103 mask = LEON_HARD_INT(irq); 104 } 105 return mask; 106 } 107 108 #ifdef CONFIG_SMP 109 static int irq_choose_cpu(const struct cpumask *affinity) 110 { 111 cpumask_t mask; 112 113 cpumask_and(&mask, cpu_online_mask, affinity); 114 if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask)) 115 return boot_cpu_id; 116 else 117 return cpumask_first(&mask); 118 } 119 #else 120 #define irq_choose_cpu(affinity) boot_cpu_id 121 #endif 122 123 static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest, 124 bool force) 125 { 126 unsigned long mask, oldmask, flags; 127 int oldcpu, newcpu; 128 129 mask = (unsigned long)data->chip_data; 130 oldcpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); 131 newcpu = irq_choose_cpu(dest); 132 133 if (oldcpu == newcpu) 134 goto out; 135 136 /* unmask on old CPU first before enabling on the selected CPU */ 137 spin_lock_irqsave(&leon_irq_lock, flags); 138 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu)); 139 LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask)); 140 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu)); 141 LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask)); 142 spin_unlock_irqrestore(&leon_irq_lock, flags); 143 out: 144 return IRQ_SET_MASK_OK; 145 } 146 147 static void leon_unmask_irq(struct irq_data *data) 148 { 149 unsigned long mask, oldmask, flags; 150 int cpu; 151 152 mask = (unsigned long)data->chip_data; 153 cpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); 154 spin_lock_irqsave(&leon_irq_lock, flags); 155 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); 156 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask)); 157 spin_unlock_irqrestore(&leon_irq_lock, flags); 158 } 159 160 static void leon_mask_irq(struct irq_data *data) 161 { 162 unsigned long mask, oldmask, flags; 163 int cpu; 164 165 mask = (unsigned long)data->chip_data; 166 cpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); 167 spin_lock_irqsave(&leon_irq_lock, flags); 168 oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); 169 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask)); 170 spin_unlock_irqrestore(&leon_irq_lock, flags); 171 } 172 173 static unsigned int leon_startup_irq(struct irq_data *data) 174 { 175 irq_link(data->irq); 176 leon_unmask_irq(data); 177 return 0; 178 } 179 180 static void leon_shutdown_irq(struct irq_data *data) 181 { 182 leon_mask_irq(data); 183 irq_unlink(data->irq); 184 } 185 186 /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */ 187 static void leon_eoi_irq(struct irq_data *data) 188 { 189 unsigned long mask = (unsigned long)data->chip_data; 190 191 if (mask & LEON_DO_ACK_HW) 192 LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW); 193 } 194 195 static struct irq_chip leon_irq = { 196 .name = "leon", 197 .irq_startup = leon_startup_irq, 198 .irq_shutdown = leon_shutdown_irq, 199 .irq_mask = leon_mask_irq, 200 .irq_unmask = leon_unmask_irq, 201 .irq_eoi = leon_eoi_irq, 202 .irq_set_affinity = leon_set_affinity, 203 }; 204 205 /* 206 * Build a LEON IRQ for the edge triggered LEON IRQ controller: 207 * Edge (normal) IRQ - handle_simple_irq, ack=DON'T-CARE, never ack 208 * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR 209 * Per-CPU Edge - handle_percpu_irq, ack=0 210 */ 211 unsigned int leon_build_device_irq(unsigned int real_irq, 212 irq_flow_handler_t flow_handler, 213 const char *name, int do_ack) 214 { 215 unsigned int irq; 216 unsigned long mask; 217 struct irq_desc *desc; 218 219 irq = 0; 220 mask = leon_get_irqmask(real_irq); 221 if (mask == 0) 222 goto out; 223 224 irq = irq_alloc(real_irq, real_irq); 225 if (irq == 0) 226 goto out; 227 228 if (do_ack) 229 mask |= LEON_DO_ACK_HW; 230 231 desc = irq_to_desc(irq); 232 if (!desc || !desc->handle_irq || desc->handle_irq == handle_bad_irq) { 233 irq_set_chip_and_handler_name(irq, &leon_irq, 234 flow_handler, name); 235 irq_set_chip_data(irq, (void *)mask); 236 } 237 238 out: 239 return irq; 240 } 241 242 static unsigned int _leon_build_device_irq(struct platform_device *op, 243 unsigned int real_irq) 244 { 245 return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0); 246 } 247 248 void leon_update_virq_handling(unsigned int virq, 249 irq_flow_handler_t flow_handler, 250 const char *name, int do_ack) 251 { 252 unsigned long mask = (unsigned long)irq_get_chip_data(virq); 253 254 mask &= ~LEON_DO_ACK_HW; 255 if (do_ack) 256 mask |= LEON_DO_ACK_HW; 257 258 irq_set_chip_and_handler_name(virq, &leon_irq, 259 flow_handler, name); 260 irq_set_chip_data(virq, (void *)mask); 261 } 262 263 static u32 leon_cycles_offset(void) 264 { 265 u32 rld, val, ctrl, off; 266 267 rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld); 268 val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val); 269 ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); 270 if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl)) { 271 val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val); 272 off = 2 * rld - val; 273 } else { 274 off = rld - val; 275 } 276 277 return off; 278 } 279 280 #ifdef CONFIG_SMP 281 282 /* smp clockevent irq */ 283 static irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused) 284 { 285 struct clock_event_device *ce; 286 int cpu = smp_processor_id(); 287 288 leon_clear_profile_irq(cpu); 289 290 if (cpu == boot_cpu_id) 291 timer_interrupt(irq, NULL); 292 293 ce = &per_cpu(sparc32_clockevent, cpu); 294 295 irq_enter(); 296 if (ce->event_handler) 297 ce->event_handler(ce); 298 irq_exit(); 299 300 return IRQ_HANDLED; 301 } 302 303 #endif /* CONFIG_SMP */ 304 305 void __init leon_init_timers(void) 306 { 307 int irq, eirq; 308 struct device_node *rootnp, *np, *nnp; 309 struct property *pp; 310 int len; 311 int icsel; 312 int ampopts; 313 int err; 314 u32 config; 315 u32 ctrl; 316 317 sparc_config.get_cycles_offset = leon_cycles_offset; 318 sparc_config.cs_period = 1000000 / HZ; 319 sparc_config.features |= FEAT_L10_CLOCKSOURCE; 320 321 #ifndef CONFIG_SMP 322 sparc_config.features |= FEAT_L10_CLOCKEVENT; 323 #endif 324 325 leondebug_irq_disable = 0; 326 leon_debug_irqout = 0; 327 master_l10_counter = (u32 __iomem *)&dummy_master_l10_counter; 328 dummy_master_l10_counter = 0; 329 330 rootnp = of_find_node_by_path("/ambapp0"); 331 if (!rootnp) 332 goto bad; 333 334 /* Find System ID: GRLIB build ID and optional CHIP ID */ 335 pp = of_find_property(rootnp, "systemid", &len); 336 if (pp) 337 amba_system_id = *(unsigned long *)pp->value; 338 339 /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */ 340 np = of_find_node_by_name(rootnp, "GAISLER_IRQMP"); 341 if (!np) { 342 np = of_find_node_by_name(rootnp, "01_00d"); 343 if (!np) 344 goto bad; 345 } 346 pp = of_find_property(np, "reg", &len); 347 if (!pp) 348 goto bad; 349 leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value; 350 351 /* Find GPTIMER Timer Registers base address otherwise bail out. */ 352 nnp = rootnp; 353 354 retry: 355 np = of_find_node_by_name(nnp, "GAISLER_GPTIMER"); 356 if (!np) { 357 np = of_find_node_by_name(nnp, "01_011"); 358 if (!np) 359 goto bad; 360 } 361 362 ampopts = 0; 363 pp = of_find_property(np, "ampopts", &len); 364 if (pp) { 365 ampopts = *(int *)pp->value; 366 if (ampopts == 0) { 367 /* Skip this instance, resource already 368 * allocated by other OS */ 369 nnp = np; 370 goto retry; 371 } 372 } 373 374 /* Select Timer-Instance on Timer Core. Default is zero */ 375 leon3_gptimer_idx = ampopts & 0x7; 376 377 pp = of_find_property(np, "reg", &len); 378 if (pp) 379 leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **) 380 pp->value; 381 pp = of_find_property(np, "interrupts", &len); 382 if (pp) 383 leon3_gptimer_irq = *(unsigned int *)pp->value; 384 385 if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq)) 386 goto bad; 387 388 ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); 389 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 390 ctrl | LEON3_GPTIMER_CTRL_PENDING); 391 ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); 392 393 if ((ctrl & LEON3_GPTIMER_CTRL_PENDING) != 0) 394 leon3_gptimer_ackmask = ~LEON3_GPTIMER_CTRL_PENDING; 395 else 396 leon3_gptimer_ackmask = ~0; 397 398 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0); 399 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld, 400 (((1000000 / HZ) - 1))); 401 LEON3_BYPASS_STORE_PA( 402 &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0); 403 404 /* 405 * The IRQ controller may (if implemented) consist of multiple 406 * IRQ controllers, each mapped on a 4Kb boundary. 407 * Each CPU may be routed to different IRQCTRLs, however 408 * we assume that all CPUs (in SMP system) is routed to the 409 * same IRQ Controller, and for non-SMP only one IRQCTRL is 410 * accessed anyway. 411 * In AMP systems, Linux must run on CPU0 for the time being. 412 */ 413 icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]); 414 icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf; 415 leon3_irqctrl_regs += icsel; 416 417 /* Mask all IRQs on boot-cpu IRQ controller */ 418 LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0); 419 420 /* Probe extended IRQ controller */ 421 eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus) 422 >> 16) & 0xf; 423 if (eirq != 0) 424 leon_eirq_setup(eirq); 425 426 #ifdef CONFIG_SMP 427 { 428 unsigned long flags; 429 430 /* 431 * In SMP, sun4m adds a IPI handler to IRQ trap handler that 432 * LEON never must take, sun4d and LEON overwrites the branch 433 * with a NOP. 434 */ 435 local_irq_save(flags); 436 patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */ 437 local_ops->cache_all(); 438 local_irq_restore(flags); 439 } 440 #endif 441 442 config = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config); 443 if (config & (1 << LEON3_GPTIMER_SEPIRQ)) 444 leon3_gptimer_irq += leon3_gptimer_idx; 445 else if ((config & LEON3_GPTIMER_TIMERS) > 1) 446 pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n"); 447 448 #ifdef CONFIG_SMP 449 /* Install per-cpu IRQ handler for broadcasted ticker */ 450 irq = leon_build_device_irq(leon3_gptimer_irq, handle_percpu_irq, 451 "per-cpu", 0); 452 err = request_irq(irq, leon_percpu_timer_ce_interrupt, 453 IRQF_PERCPU | IRQF_TIMER, "timer", NULL); 454 #else 455 irq = _leon_build_device_irq(NULL, leon3_gptimer_irq); 456 err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL); 457 #endif 458 if (err) { 459 pr_err("Unable to attach timer IRQ%d\n", irq); 460 prom_halt(); 461 } 462 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 463 LEON3_GPTIMER_EN | 464 LEON3_GPTIMER_RL | 465 LEON3_GPTIMER_LD | 466 LEON3_GPTIMER_IRQEN); 467 return; 468 bad: 469 printk(KERN_ERR "No Timer/irqctrl found\n"); 470 BUG(); 471 return; 472 } 473 474 static void leon_clear_clock_irq(void) 475 { 476 u32 ctrl; 477 478 ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); 479 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 480 ctrl & leon3_gptimer_ackmask); 481 } 482 483 static void leon_load_profile_irq(int cpu, unsigned int limit) 484 { 485 } 486 487 #ifdef CONFIG_SMP 488 void leon_clear_profile_irq(int cpu) 489 { 490 } 491 492 void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) 493 { 494 unsigned long mask, flags, *addr; 495 mask = leon_get_irqmask(irq_nr); 496 spin_lock_irqsave(&leon_irq_lock, flags); 497 addr = (unsigned long *)LEON_IMASK(cpu); 498 LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask)); 499 spin_unlock_irqrestore(&leon_irq_lock, flags); 500 } 501 502 #endif 503 504 void __init leon_init_IRQ(void) 505 { 506 sparc_config.init_timers = leon_init_timers; 507 sparc_config.build_device_irq = _leon_build_device_irq; 508 sparc_config.clock_rate = 1000000; 509 sparc_config.clear_clock_irq = leon_clear_clock_irq; 510 sparc_config.load_profile_irq = leon_load_profile_irq; 511 } 512