xref: /openbmc/linux/arch/sparc/kernel/irq.h (revision e3b9f1e8)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/platform_device.h>
3 
4 #include <asm/cpu_type.h>
5 
6 struct irq_bucket {
7         struct irq_bucket *next;
8         unsigned int real_irq;
9         unsigned int irq;
10         unsigned int pil;
11 };
12 
13 #define SUN4M_HARD_INT(x)       (0x000000001 << (x))
14 #define SUN4M_SOFT_INT(x)       (0x000010000 << (x))
15 
16 #define SUN4D_MAX_BOARD 10
17 #define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5)
18 
19 /* Map between the irq identifier used in hw to the
20  * irq_bucket. The map is sufficient large to hold
21  * the sun4d hw identifiers.
22  */
23 extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
24 
25 
26 /* sun4m specific type definitions */
27 
28 /* This maps direct to CPU specific interrupt registers */
29 struct sun4m_irq_percpu {
30 	u32	pending;
31 	u32	clear;
32 	u32	set;
33 };
34 
35 /* This maps direct to global interrupt registers */
36 struct sun4m_irq_global {
37 	u32	pending;
38 	u32	mask;
39 	u32	mask_clear;
40 	u32	mask_set;
41 	u32	interrupt_target;
42 };
43 
44 extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
45 extern struct sun4m_irq_global __iomem *sun4m_irq_global;
46 
47 /* The following definitions describe the individual platform features: */
48 #define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */
49 #define FEAT_L10_CLOCKEVENT  (1 << 1) /* L10 timer is used as a clockevent */
50 #define FEAT_L14_ONESHOT     (1 << 2) /* L14 timer clockevent can oneshot */
51 
52 /*
53  * Platform specific configuration
54  * The individual platforms assign their platform
55  * specifics in their init functions.
56  */
57 struct sparc_config {
58 	void (*init_timers)(void);
59 	unsigned int (*build_device_irq)(struct platform_device *op,
60 	                                 unsigned int real_irq);
61 
62 	/* generic clockevent features - see FEAT_* above */
63 	int features;
64 
65 	/* clock rate used for clock event timer */
66 	int clock_rate;
67 
68 	/* one period for clock source timer */
69 	unsigned int cs_period;
70 
71 	/* function to obtain offsett for cs period */
72 	unsigned int (*get_cycles_offset)(void);
73 
74 	void (*clear_clock_irq)(void);
75 	void (*load_profile_irq)(int cpu, unsigned int limit);
76 };
77 extern struct sparc_config sparc_config;
78 
79 unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
80 void irq_link(unsigned int irq);
81 void irq_unlink(unsigned int irq);
82 void handler_irq(unsigned int pil, struct pt_regs *regs);
83 
84 unsigned long leon_get_irqmask(unsigned int irq);
85 
86 /* irq_32.c */
87 void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs);
88 
89 /* sun4m_irq.c */
90 void sun4m_nmi(struct pt_regs *regs);
91 
92 /* sun4d_irq.c */
93 void sun4d_handler_irq(unsigned int pil, struct pt_regs *regs);
94 
95 #ifdef CONFIG_SMP
96 
97 /* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
98 #define SUN4D_IPI_IRQ 13
99 
100 void sun4d_ipi_interrupt(void);
101 
102 #endif
103