xref: /openbmc/linux/arch/sparc/kernel/ioport.c (revision 9c1f8594)
1 /*
2  * ioport.c:  Simple io mapping allocator.
3  *
4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5  * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6  *
7  * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
8  *
9  * 2000/01/29
10  * <rth> zait: as long as pci_alloc_consistent produces something addressable,
11  *	things are ok.
12  * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
13  *	pointer into the big page mapping
14  * <rth> zait: so what?
15  * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
16  * <zaitcev> Hmm
17  * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
18  *	So far so good.
19  * <zaitcev> Now, driver calls pci_free_consistent(with result of
20  *	remap_it_my_way()).
21  * <zaitcev> How do you find the address to pass to free_pages()?
22  * <rth> zait: walk the page tables?  It's only two or three level after all.
23  * <rth> zait: you have to walk them anyway to remove the mapping.
24  * <zaitcev> Hmm
25  * <zaitcev> Sounds reasonable
26  */
27 
28 #include <linux/module.h>
29 #include <linux/sched.h>
30 #include <linux/kernel.h>
31 #include <linux/errno.h>
32 #include <linux/types.h>
33 #include <linux/ioport.h>
34 #include <linux/mm.h>
35 #include <linux/slab.h>
36 #include <linux/pci.h>		/* struct pci_dev */
37 #include <linux/proc_fs.h>
38 #include <linux/seq_file.h>
39 #include <linux/scatterlist.h>
40 #include <linux/of_device.h>
41 
42 #include <asm/io.h>
43 #include <asm/vaddrs.h>
44 #include <asm/oplib.h>
45 #include <asm/prom.h>
46 #include <asm/page.h>
47 #include <asm/pgalloc.h>
48 #include <asm/dma.h>
49 #include <asm/iommu.h>
50 #include <asm/io-unit.h>
51 #include <asm/leon.h>
52 
53 /* This function must make sure that caches and memory are coherent after DMA
54  * On LEON systems without cache snooping it flushes the entire D-CACHE.
55  */
56 #ifndef CONFIG_SPARC_LEON
57 static inline void dma_make_coherent(unsigned long pa, unsigned long len)
58 {
59 }
60 #else
61 static inline void dma_make_coherent(unsigned long pa, unsigned long len)
62 {
63 	if (!sparc_leon3_snooping_enabled())
64 		leon_flush_dcache_all();
65 }
66 #endif
67 
68 static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
69 static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
70     unsigned long size, char *name);
71 static void _sparc_free_io(struct resource *res);
72 
73 static void register_proc_sparc_ioport(void);
74 
75 /* This points to the next to use virtual memory for DVMA mappings */
76 static struct resource _sparc_dvma = {
77 	.name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
78 };
79 /* This points to the start of I/O mappings, cluable from outside. */
80 /*ext*/ struct resource sparc_iomap = {
81 	.name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
82 };
83 
84 /*
85  * Our mini-allocator...
86  * Boy this is gross! We need it because we must map I/O for
87  * timers and interrupt controller before the kmalloc is available.
88  */
89 
90 #define XNMLN  15
91 #define XNRES  10	/* SS-10 uses 8 */
92 
93 struct xresource {
94 	struct resource xres;	/* Must be first */
95 	int xflag;		/* 1 == used */
96 	char xname[XNMLN+1];
97 };
98 
99 static struct xresource xresv[XNRES];
100 
101 static struct xresource *xres_alloc(void) {
102 	struct xresource *xrp;
103 	int n;
104 
105 	xrp = xresv;
106 	for (n = 0; n < XNRES; n++) {
107 		if (xrp->xflag == 0) {
108 			xrp->xflag = 1;
109 			return xrp;
110 		}
111 		xrp++;
112 	}
113 	return NULL;
114 }
115 
116 static void xres_free(struct xresource *xrp) {
117 	xrp->xflag = 0;
118 }
119 
120 /*
121  * These are typically used in PCI drivers
122  * which are trying to be cross-platform.
123  *
124  * Bus type is always zero on IIep.
125  */
126 void __iomem *ioremap(unsigned long offset, unsigned long size)
127 {
128 	char name[14];
129 
130 	sprintf(name, "phys_%08x", (u32)offset);
131 	return _sparc_alloc_io(0, offset, size, name);
132 }
133 EXPORT_SYMBOL(ioremap);
134 
135 /*
136  * Comlimentary to ioremap().
137  */
138 void iounmap(volatile void __iomem *virtual)
139 {
140 	unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
141 	struct resource *res;
142 
143 	/*
144 	 * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
145 	 * This probably warrants some sort of hashing.
146 	*/
147 	if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
148 		printk("free_io/iounmap: cannot free %lx\n", vaddr);
149 		return;
150 	}
151 	_sparc_free_io(res);
152 
153 	if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
154 		xres_free((struct xresource *)res);
155 	} else {
156 		kfree(res);
157 	}
158 }
159 EXPORT_SYMBOL(iounmap);
160 
161 void __iomem *of_ioremap(struct resource *res, unsigned long offset,
162 			 unsigned long size, char *name)
163 {
164 	return _sparc_alloc_io(res->flags & 0xF,
165 			       res->start + offset,
166 			       size, name);
167 }
168 EXPORT_SYMBOL(of_ioremap);
169 
170 void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
171 {
172 	iounmap(base);
173 }
174 EXPORT_SYMBOL(of_iounmap);
175 
176 /*
177  * Meat of mapping
178  */
179 static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
180     unsigned long size, char *name)
181 {
182 	static int printed_full;
183 	struct xresource *xres;
184 	struct resource *res;
185 	char *tack;
186 	int tlen;
187 	void __iomem *va;	/* P3 diag */
188 
189 	if (name == NULL) name = "???";
190 
191 	if ((xres = xres_alloc()) != 0) {
192 		tack = xres->xname;
193 		res = &xres->xres;
194 	} else {
195 		if (!printed_full) {
196 			printk("ioremap: done with statics, switching to malloc\n");
197 			printed_full = 1;
198 		}
199 		tlen = strlen(name);
200 		tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
201 		if (tack == NULL) return NULL;
202 		memset(tack, 0, sizeof(struct resource));
203 		res = (struct resource *) tack;
204 		tack += sizeof (struct resource);
205 	}
206 
207 	strlcpy(tack, name, XNMLN+1);
208 	res->name = tack;
209 
210 	va = _sparc_ioremap(res, busno, phys, size);
211 	/* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
212 	return va;
213 }
214 
215 /*
216  */
217 static void __iomem *
218 _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
219 {
220 	unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
221 
222 	if (allocate_resource(&sparc_iomap, res,
223 	    (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
224 	    sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
225 		/* Usually we cannot see printks in this case. */
226 		prom_printf("alloc_io_res(%s): cannot occupy\n",
227 		    (res->name != NULL)? res->name: "???");
228 		prom_halt();
229 	}
230 
231 	pa &= PAGE_MASK;
232 	sparc_mapiorange(bus, pa, res->start, resource_size(res));
233 
234 	return (void __iomem *)(unsigned long)(res->start + offset);
235 }
236 
237 /*
238  * Comlimentary to _sparc_ioremap().
239  */
240 static void _sparc_free_io(struct resource *res)
241 {
242 	unsigned long plen;
243 
244 	plen = resource_size(res);
245 	BUG_ON((plen & (PAGE_SIZE-1)) != 0);
246 	sparc_unmapiorange(res->start, plen);
247 	release_resource(res);
248 }
249 
250 #ifdef CONFIG_SBUS
251 
252 void sbus_set_sbus64(struct device *dev, int x)
253 {
254 	printk("sbus_set_sbus64: unsupported\n");
255 }
256 EXPORT_SYMBOL(sbus_set_sbus64);
257 
258 /*
259  * Allocate a chunk of memory suitable for DMA.
260  * Typically devices use them for control blocks.
261  * CPU may access them without any explicit flushing.
262  */
263 static void *sbus_alloc_coherent(struct device *dev, size_t len,
264 				 dma_addr_t *dma_addrp, gfp_t gfp)
265 {
266 	struct platform_device *op = to_platform_device(dev);
267 	unsigned long len_total = PAGE_ALIGN(len);
268 	unsigned long va;
269 	struct resource *res;
270 	int order;
271 
272 	/* XXX why are some lengths signed, others unsigned? */
273 	if (len <= 0) {
274 		return NULL;
275 	}
276 	/* XXX So what is maxphys for us and how do drivers know it? */
277 	if (len > 256*1024) {			/* __get_free_pages() limit */
278 		return NULL;
279 	}
280 
281 	order = get_order(len_total);
282 	if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0)
283 		goto err_nopages;
284 
285 	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
286 		goto err_nomem;
287 
288 	if (allocate_resource(&_sparc_dvma, res, len_total,
289 	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
290 		printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
291 		goto err_nova;
292 	}
293 
294 	// XXX The mmu_map_dma_area does this for us below, see comments.
295 	// sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
296 	/*
297 	 * XXX That's where sdev would be used. Currently we load
298 	 * all iommu tables with the same translations.
299 	 */
300 	if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
301 		goto err_noiommu;
302 
303 	res->name = op->dev.of_node->name;
304 
305 	return (void *)(unsigned long)res->start;
306 
307 err_noiommu:
308 	release_resource(res);
309 err_nova:
310 	kfree(res);
311 err_nomem:
312 	free_pages(va, order);
313 err_nopages:
314 	return NULL;
315 }
316 
317 static void sbus_free_coherent(struct device *dev, size_t n, void *p,
318 			       dma_addr_t ba)
319 {
320 	struct resource *res;
321 	struct page *pgv;
322 
323 	if ((res = lookup_resource(&_sparc_dvma,
324 	    (unsigned long)p)) == NULL) {
325 		printk("sbus_free_consistent: cannot free %p\n", p);
326 		return;
327 	}
328 
329 	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
330 		printk("sbus_free_consistent: unaligned va %p\n", p);
331 		return;
332 	}
333 
334 	n = PAGE_ALIGN(n);
335 	if (resource_size(res) != n) {
336 		printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
337 		    (long)resource_size(res), n);
338 		return;
339 	}
340 
341 	release_resource(res);
342 	kfree(res);
343 
344 	pgv = virt_to_page(p);
345 	mmu_unmap_dma_area(dev, ba, n);
346 
347 	__free_pages(pgv, get_order(n));
348 }
349 
350 /*
351  * Map a chunk of memory so that devices can see it.
352  * CPU view of this memory may be inconsistent with
353  * a device view and explicit flushing is necessary.
354  */
355 static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
356 				unsigned long offset, size_t len,
357 				enum dma_data_direction dir,
358 				struct dma_attrs *attrs)
359 {
360 	void *va = page_address(page) + offset;
361 
362 	/* XXX why are some lengths signed, others unsigned? */
363 	if (len <= 0) {
364 		return 0;
365 	}
366 	/* XXX So what is maxphys for us and how do drivers know it? */
367 	if (len > 256*1024) {			/* __get_free_pages() limit */
368 		return 0;
369 	}
370 	return mmu_get_scsi_one(dev, va, len);
371 }
372 
373 static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
374 			    enum dma_data_direction dir, struct dma_attrs *attrs)
375 {
376 	mmu_release_scsi_one(dev, ba, n);
377 }
378 
379 static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
380 		       enum dma_data_direction dir, struct dma_attrs *attrs)
381 {
382 	mmu_get_scsi_sgl(dev, sg, n);
383 
384 	/*
385 	 * XXX sparc64 can return a partial length here. sun4c should do this
386 	 * but it currently panics if it can't fulfill the request - Anton
387 	 */
388 	return n;
389 }
390 
391 static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
392 			  enum dma_data_direction dir, struct dma_attrs *attrs)
393 {
394 	mmu_release_scsi_sgl(dev, sg, n);
395 }
396 
397 static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
398 				 int n,	enum dma_data_direction dir)
399 {
400 	BUG();
401 }
402 
403 static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
404 				    int n, enum dma_data_direction dir)
405 {
406 	BUG();
407 }
408 
409 struct dma_map_ops sbus_dma_ops = {
410 	.alloc_coherent		= sbus_alloc_coherent,
411 	.free_coherent		= sbus_free_coherent,
412 	.map_page		= sbus_map_page,
413 	.unmap_page		= sbus_unmap_page,
414 	.map_sg			= sbus_map_sg,
415 	.unmap_sg		= sbus_unmap_sg,
416 	.sync_sg_for_cpu	= sbus_sync_sg_for_cpu,
417 	.sync_sg_for_device	= sbus_sync_sg_for_device,
418 };
419 
420 static int __init sparc_register_ioport(void)
421 {
422 	register_proc_sparc_ioport();
423 
424 	return 0;
425 }
426 
427 arch_initcall(sparc_register_ioport);
428 
429 #endif /* CONFIG_SBUS */
430 
431 
432 /* LEON reuses PCI DMA ops */
433 #if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON)
434 
435 /* Allocate and map kernel buffer using consistent mode DMA for a device.
436  * hwdev should be valid struct pci_dev pointer for PCI devices.
437  */
438 static void *pci32_alloc_coherent(struct device *dev, size_t len,
439 				  dma_addr_t *pba, gfp_t gfp)
440 {
441 	unsigned long len_total = PAGE_ALIGN(len);
442 	void *va;
443 	struct resource *res;
444 	int order;
445 
446 	if (len == 0) {
447 		return NULL;
448 	}
449 	if (len > 256*1024) {			/* __get_free_pages() limit */
450 		return NULL;
451 	}
452 
453 	order = get_order(len_total);
454 	va = (void *) __get_free_pages(GFP_KERNEL, order);
455 	if (va == NULL) {
456 		printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
457 		goto err_nopages;
458 	}
459 
460 	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
461 		printk("pci_alloc_consistent: no core\n");
462 		goto err_nomem;
463 	}
464 
465 	if (allocate_resource(&_sparc_dvma, res, len_total,
466 	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
467 		printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
468 		goto err_nova;
469 	}
470 	sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
471 
472 	*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
473 	return (void *) res->start;
474 
475 err_nova:
476 	kfree(res);
477 err_nomem:
478 	free_pages((unsigned long)va, order);
479 err_nopages:
480 	return NULL;
481 }
482 
483 /* Free and unmap a consistent DMA buffer.
484  * cpu_addr is what was returned from pci_alloc_consistent,
485  * size must be the same as what as passed into pci_alloc_consistent,
486  * and likewise dma_addr must be the same as what *dma_addrp was set to.
487  *
488  * References to the memory and mappings associated with cpu_addr/dma_addr
489  * past this call are illegal.
490  */
491 static void pci32_free_coherent(struct device *dev, size_t n, void *p,
492 				dma_addr_t ba)
493 {
494 	struct resource *res;
495 
496 	if ((res = lookup_resource(&_sparc_dvma,
497 	    (unsigned long)p)) == NULL) {
498 		printk("pci_free_consistent: cannot free %p\n", p);
499 		return;
500 	}
501 
502 	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
503 		printk("pci_free_consistent: unaligned va %p\n", p);
504 		return;
505 	}
506 
507 	n = PAGE_ALIGN(n);
508 	if (resource_size(res) != n) {
509 		printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
510 		    (long)resource_size(res), (long)n);
511 		return;
512 	}
513 
514 	dma_make_coherent(ba, n);
515 	sparc_unmapiorange((unsigned long)p, n);
516 
517 	release_resource(res);
518 	kfree(res);
519 	free_pages((unsigned long)phys_to_virt(ba), get_order(n));
520 }
521 
522 /*
523  * Same as pci_map_single, but with pages.
524  */
525 static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
526 				 unsigned long offset, size_t size,
527 				 enum dma_data_direction dir,
528 				 struct dma_attrs *attrs)
529 {
530 	/* IIep is write-through, not flushing. */
531 	return page_to_phys(page) + offset;
532 }
533 
534 static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
535 			     enum dma_data_direction dir, struct dma_attrs *attrs)
536 {
537 	if (dir != PCI_DMA_TODEVICE)
538 		dma_make_coherent(ba, PAGE_ALIGN(size));
539 }
540 
541 /* Map a set of buffers described by scatterlist in streaming
542  * mode for DMA.  This is the scather-gather version of the
543  * above pci_map_single interface.  Here the scatter gather list
544  * elements are each tagged with the appropriate dma address
545  * and length.  They are obtained via sg_dma_{address,length}(SG).
546  *
547  * NOTE: An implementation may be able to use a smaller number of
548  *       DMA address/length pairs than there are SG table elements.
549  *       (for example via virtual mapping capabilities)
550  *       The routine returns the number of addr/length pairs actually
551  *       used, at most nents.
552  *
553  * Device ownership issues as mentioned above for pci_map_single are
554  * the same here.
555  */
556 static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
557 			int nents, enum dma_data_direction dir,
558 			struct dma_attrs *attrs)
559 {
560 	struct scatterlist *sg;
561 	int n;
562 
563 	/* IIep is write-through, not flushing. */
564 	for_each_sg(sgl, sg, nents, n) {
565 		sg->dma_address = sg_phys(sg);
566 		sg->dma_length = sg->length;
567 	}
568 	return nents;
569 }
570 
571 /* Unmap a set of streaming mode DMA translations.
572  * Again, cpu read rules concerning calls here are the same as for
573  * pci_unmap_single() above.
574  */
575 static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
576 			   int nents, enum dma_data_direction dir,
577 			   struct dma_attrs *attrs)
578 {
579 	struct scatterlist *sg;
580 	int n;
581 
582 	if (dir != PCI_DMA_TODEVICE) {
583 		for_each_sg(sgl, sg, nents, n) {
584 			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
585 		}
586 	}
587 }
588 
589 /* Make physical memory consistent for a single
590  * streaming mode DMA translation before or after a transfer.
591  *
592  * If you perform a pci_map_single() but wish to interrogate the
593  * buffer using the cpu, yet do not wish to teardown the PCI dma
594  * mapping, you must call this function before doing so.  At the
595  * next point you give the PCI dma address back to the card, you
596  * must first perform a pci_dma_sync_for_device, and then the
597  * device again owns the buffer.
598  */
599 static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
600 				      size_t size, enum dma_data_direction dir)
601 {
602 	if (dir != PCI_DMA_TODEVICE) {
603 		dma_make_coherent(ba, PAGE_ALIGN(size));
604 	}
605 }
606 
607 static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
608 					 size_t size, enum dma_data_direction dir)
609 {
610 	if (dir != PCI_DMA_TODEVICE) {
611 		dma_make_coherent(ba, PAGE_ALIGN(size));
612 	}
613 }
614 
615 /* Make physical memory consistent for a set of streaming
616  * mode DMA translations after a transfer.
617  *
618  * The same as pci_dma_sync_single_* but for a scatter-gather list,
619  * same rules and usage.
620  */
621 static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
622 				  int nents, enum dma_data_direction dir)
623 {
624 	struct scatterlist *sg;
625 	int n;
626 
627 	if (dir != PCI_DMA_TODEVICE) {
628 		for_each_sg(sgl, sg, nents, n) {
629 			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
630 		}
631 	}
632 }
633 
634 static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
635 				     int nents, enum dma_data_direction dir)
636 {
637 	struct scatterlist *sg;
638 	int n;
639 
640 	if (dir != PCI_DMA_TODEVICE) {
641 		for_each_sg(sgl, sg, nents, n) {
642 			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
643 		}
644 	}
645 }
646 
647 struct dma_map_ops pci32_dma_ops = {
648 	.alloc_coherent		= pci32_alloc_coherent,
649 	.free_coherent		= pci32_free_coherent,
650 	.map_page		= pci32_map_page,
651 	.unmap_page		= pci32_unmap_page,
652 	.map_sg			= pci32_map_sg,
653 	.unmap_sg		= pci32_unmap_sg,
654 	.sync_single_for_cpu	= pci32_sync_single_for_cpu,
655 	.sync_single_for_device	= pci32_sync_single_for_device,
656 	.sync_sg_for_cpu	= pci32_sync_sg_for_cpu,
657 	.sync_sg_for_device	= pci32_sync_sg_for_device,
658 };
659 EXPORT_SYMBOL(pci32_dma_ops);
660 
661 #endif /* CONFIG_PCI || CONFIG_SPARC_LEON */
662 
663 #ifdef CONFIG_SPARC_LEON
664 struct dma_map_ops *dma_ops = &pci32_dma_ops;
665 #elif defined(CONFIG_SBUS)
666 struct dma_map_ops *dma_ops = &sbus_dma_ops;
667 #endif
668 
669 EXPORT_SYMBOL(dma_ops);
670 
671 
672 /*
673  * Return whether the given PCI device DMA address mask can be
674  * supported properly.  For example, if your device can only drive the
675  * low 24-bits during PCI bus mastering, then you would pass
676  * 0x00ffffff as the mask to this function.
677  */
678 int dma_supported(struct device *dev, u64 mask)
679 {
680 #ifdef CONFIG_PCI
681 	if (dev->bus == &pci_bus_type)
682 		return 1;
683 #endif
684 	return 0;
685 }
686 EXPORT_SYMBOL(dma_supported);
687 
688 #ifdef CONFIG_PROC_FS
689 
690 static int sparc_io_proc_show(struct seq_file *m, void *v)
691 {
692 	struct resource *root = m->private, *r;
693 	const char *nm;
694 
695 	for (r = root->child; r != NULL; r = r->sibling) {
696 		if ((nm = r->name) == 0) nm = "???";
697 		seq_printf(m, "%016llx-%016llx: %s\n",
698 				(unsigned long long)r->start,
699 				(unsigned long long)r->end, nm);
700 	}
701 
702 	return 0;
703 }
704 
705 static int sparc_io_proc_open(struct inode *inode, struct file *file)
706 {
707 	return single_open(file, sparc_io_proc_show, PDE(inode)->data);
708 }
709 
710 static const struct file_operations sparc_io_proc_fops = {
711 	.owner		= THIS_MODULE,
712 	.open		= sparc_io_proc_open,
713 	.read		= seq_read,
714 	.llseek		= seq_lseek,
715 	.release	= single_release,
716 };
717 #endif /* CONFIG_PROC_FS */
718 
719 static void register_proc_sparc_ioport(void)
720 {
721 #ifdef CONFIG_PROC_FS
722 	proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
723 	proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
724 #endif
725 }
726