1/* hvtramp.S: Hypervisor start-cpu trampoline code. 2 * 3 * Copyright (C) 2007, 2008 David S. Miller <davem@davemloft.net> 4 */ 5 6 7#include <asm/thread_info.h> 8#include <asm/hypervisor.h> 9#include <asm/scratchpad.h> 10#include <asm/spitfire.h> 11#include <asm/hvtramp.h> 12#include <asm/pstate.h> 13#include <asm/ptrace.h> 14#include <asm/head.h> 15#include <asm/asi.h> 16#include <asm/pil.h> 17 18 .align 8 19 .globl hv_cpu_startup, hv_cpu_startup_end 20 21 /* This code executes directly out of the hypervisor 22 * with physical addressing (va==pa). %o0 contains 23 * our client argument which for Linux points to 24 * a descriptor data structure which defines the 25 * MMU entries we need to load up. 26 * 27 * After we set things up we enable the MMU and call 28 * into the kernel. 29 * 30 * First setup basic privileged cpu state. 31 */ 32hv_cpu_startup: 33 SET_GL(0) 34 wrpr %g0, PIL_NORMAL_MAX, %pil 35 wrpr %g0, 0, %canrestore 36 wrpr %g0, 0, %otherwin 37 wrpr %g0, 6, %cansave 38 wrpr %g0, 6, %cleanwin 39 wrpr %g0, 0, %cwp 40 wrpr %g0, 0, %wstate 41 wrpr %g0, 0, %tl 42 43 sethi %hi(sparc64_ttable_tl0), %g1 44 wrpr %g1, %tba 45 46 mov %o0, %l0 47 48 lduw [%l0 + HVTRAMP_DESCR_CPU], %g1 49 mov SCRATCHPAD_CPUID, %g2 50 stxa %g1, [%g2] ASI_SCRATCHPAD 51 52 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_VA], %g2 53 stxa %g2, [%g0] ASI_SCRATCHPAD 54 55 mov 0, %l1 56 lduw [%l0 + HVTRAMP_DESCR_NUM_MAPPINGS], %l2 57 add %l0, HVTRAMP_DESCR_MAPS, %l3 58 591: ldx [%l3 + HVTRAMP_MAPPING_VADDR], %o0 60 clr %o1 61 ldx [%l3 + HVTRAMP_MAPPING_TTE], %o2 62 mov HV_MMU_IMMU | HV_MMU_DMMU, %o3 63 mov HV_FAST_MMU_MAP_PERM_ADDR, %o5 64 ta HV_FAST_TRAP 65 66 brnz,pn %o0, 80f 67 nop 68 69 add %l1, 1, %l1 70 cmp %l1, %l2 71 blt,a,pt %xcc, 1b 72 add %l3, HVTRAMP_MAPPING_SIZE, %l3 73 74 ldx [%l0 + HVTRAMP_DESCR_FAULT_INFO_PA], %o0 75 mov HV_FAST_MMU_FAULT_AREA_CONF, %o5 76 ta HV_FAST_TRAP 77 78 brnz,pn %o0, 80f 79 nop 80 81 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF), %pstate 82 83 ldx [%l0 + HVTRAMP_DESCR_THREAD_REG], %l6 84 85 mov 1, %o0 86 set 1f, %o1 87 mov HV_FAST_MMU_ENABLE, %o5 88 ta HV_FAST_TRAP 89 90 ba,pt %xcc, 80f 91 nop 92 931: 94 wr %g0, 0, %fprs 95 wr %g0, ASI_P, %asi 96 97 mov PRIMARY_CONTEXT, %g7 98 stxa %g0, [%g7] ASI_MMU 99 membar #Sync 100 101 mov SECONDARY_CONTEXT, %g7 102 stxa %g0, [%g7] ASI_MMU 103 membar #Sync 104 105 mov %l6, %g6 106 ldx [%g6 + TI_TASK], %g4 107 108 mov 1, %g5 109 sllx %g5, THREAD_SHIFT, %g5 110 sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5 111 add %g6, %g5, %sp 112 113 call init_irqwork_curcpu 114 nop 115 call hard_smp_processor_id 116 nop 117 118 call sun4v_register_mondo_queues 119 nop 120 121 call init_cur_cpu_trap 122 mov %g6, %o0 123 124 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF | PSTATE_IE), %pstate 125 126 call smp_callin 127 nop 128 129 call cpu_panic 130 nop 131 13280: ba,pt %xcc, 80b 133 nop 134 135 .align 8 136hv_cpu_startup_end: 137