xref: /openbmc/linux/arch/sparc/kernel/entry.S (revision a09d2831)
1/* arch/sparc/kernel/entry.S:  Sparc trap low-level entry points.
2 *
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost   (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek   (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
8 */
9
10#include <linux/errno.h>
11
12#include <asm/head.h>
13#include <asm/asi.h>
14#include <asm/smp.h>
15#include <asm/contregs.h>
16#include <asm/ptrace.h>
17#include <asm/asm-offsets.h>
18#include <asm/psr.h>
19#include <asm/vaddrs.h>
20#include <asm/memreg.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <asm/pgtsun4c.h>
24#include <asm/winmacro.h>
25#include <asm/signal.h>
26#include <asm/obio.h>
27#include <asm/mxcc.h>
28#include <asm/thread_info.h>
29#include <asm/param.h>
30#include <asm/unistd.h>
31
32#include <asm/asmmacro.h>
33
34#define curptr      g6
35
36/* These are just handy. */
37#define _SV	save	%sp, -STACKFRAME_SZ, %sp
38#define _RS     restore
39
40#define FLUSH_ALL_KERNEL_WINDOWS \
41	_SV; _SV; _SV; _SV; _SV; _SV; _SV; \
42	_RS; _RS; _RS; _RS; _RS; _RS; _RS;
43
44	.text
45
46#ifdef CONFIG_KGDB
47	.align	4
48	.globl		arch_kgdb_breakpoint
49	.type		arch_kgdb_breakpoint,#function
50arch_kgdb_breakpoint:
51	ta		0x7d
52	retl
53	 nop
54	.size		arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
55#endif
56
57#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
58	.align	4
59	.globl	floppy_hardint
60floppy_hardint:
61	/*
62	 * This code cannot touch registers %l0 %l1 and %l2
63	 * because SAVE_ALL depends on their values. It depends
64	 * on %l3 also, but we regenerate it before a call.
65	 * Other registers are:
66	 * %l3 -- base address of fdc registers
67	 * %l4 -- pdma_vaddr
68	 * %l5 -- scratch for ld/st address
69	 * %l6 -- pdma_size
70	 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
71	 */
72
73	/* Do we have work to do? */
74	sethi	%hi(doing_pdma), %l7
75	ld	[%l7 + %lo(doing_pdma)], %l7
76	cmp	%l7, 0
77	be	floppy_dosoftint
78	 nop
79
80	/* Load fdc register base */
81	sethi	%hi(fdc_status), %l3
82	ld	[%l3 + %lo(fdc_status)], %l3
83
84	/* Setup register addresses */
85	sethi	%hi(pdma_vaddr), %l5	! transfer buffer
86	ld	[%l5 + %lo(pdma_vaddr)], %l4
87	sethi	%hi(pdma_size), %l5	! bytes to go
88	ld	[%l5 + %lo(pdma_size)], %l6
89next_byte:
90  	ldub	[%l3], %l7
91
92	andcc	%l7, 0x80, %g0		! Does fifo still have data
93	bz	floppy_fifo_emptied	! fifo has been emptied...
94	 andcc	%l7, 0x20, %g0		! in non-dma mode still?
95	bz	floppy_overrun		! nope, overrun
96	 andcc	%l7, 0x40, %g0		! 0=write 1=read
97	bz	floppy_write
98	 sub	%l6, 0x1, %l6
99
100	/* Ok, actually read this byte */
101	ldub	[%l3 + 1], %l7
102	orcc	%g0, %l6, %g0
103	stb	%l7, [%l4]
104	bne	next_byte
105	 add	%l4, 0x1, %l4
106
107	b	floppy_tdone
108	 nop
109
110floppy_write:
111	/* Ok, actually write this byte */
112	ldub	[%l4], %l7
113	orcc	%g0, %l6, %g0
114	stb	%l7, [%l3 + 1]
115	bne	next_byte
116	 add	%l4, 0x1, %l4
117
118	/* fall through... */
119floppy_tdone:
120	sethi	%hi(pdma_vaddr), %l5
121	st	%l4, [%l5 + %lo(pdma_vaddr)]
122	sethi	%hi(pdma_size), %l5
123	st	%l6, [%l5 + %lo(pdma_size)]
124	/* Flip terminal count pin */
125	set	auxio_register, %l7
126	ld	[%l7], %l7
127
128	set	sparc_cpu_model, %l5
129	ld	[%l5], %l5
130	subcc   %l5, 1, %g0		/* enum { sun4c = 1 }; */
131	be	1f
132	 ldub	[%l7], %l5
133
134	or	%l5, 0xc2, %l5
135	stb	%l5, [%l7]
136	andn    %l5, 0x02, %l5
137	b	2f
138	 nop
139
1401:
141	or      %l5, 0xf4, %l5
142	stb     %l5, [%l7]
143	andn    %l5, 0x04, %l5
144
1452:
146	/* Kill some time so the bits set */
147	WRITE_PAUSE
148	WRITE_PAUSE
149
150	stb     %l5, [%l7]
151
152	/* Prevent recursion */
153	sethi	%hi(doing_pdma), %l7
154	b	floppy_dosoftint
155	 st	%g0, [%l7 + %lo(doing_pdma)]
156
157	/* We emptied the FIFO, but we haven't read everything
158	 * as of yet.  Store the current transfer address and
159	 * bytes left to read so we can continue when the next
160	 * fast IRQ comes in.
161	 */
162floppy_fifo_emptied:
163	sethi	%hi(pdma_vaddr), %l5
164	st	%l4, [%l5 + %lo(pdma_vaddr)]
165	sethi	%hi(pdma_size), %l7
166	st	%l6, [%l7 + %lo(pdma_size)]
167
168	/* Restore condition codes */
169	wr	%l0, 0x0, %psr
170	WRITE_PAUSE
171
172	jmp	%l1
173	rett	%l2
174
175floppy_overrun:
176	sethi	%hi(pdma_vaddr), %l5
177	st	%l4, [%l5 + %lo(pdma_vaddr)]
178	sethi	%hi(pdma_size), %l5
179	st	%l6, [%l5 + %lo(pdma_size)]
180	/* Prevent recursion */
181	sethi	%hi(doing_pdma), %l7
182	st	%g0, [%l7 + %lo(doing_pdma)]
183
184	/* fall through... */
185floppy_dosoftint:
186	rd	%wim, %l3
187	SAVE_ALL
188
189	/* Set all IRQs off. */
190	or	%l0, PSR_PIL, %l4
191	wr	%l4, 0x0, %psr
192	WRITE_PAUSE
193	wr	%l4, PSR_ET, %psr
194	WRITE_PAUSE
195
196	mov	11, %o0			! floppy irq level (unused anyway)
197	mov	%g0, %o1		! devid is not used in fast interrupts
198	call	sparc_floppy_irq
199	 add	%sp, STACKFRAME_SZ, %o2	! struct pt_regs *regs
200
201	RESTORE_ALL
202
203#endif /* (CONFIG_BLK_DEV_FD) */
204
205	/* Bad trap handler */
206	.globl	bad_trap_handler
207bad_trap_handler:
208	SAVE_ALL
209
210	wr	%l0, PSR_ET, %psr
211	WRITE_PAUSE
212
213	add	%sp, STACKFRAME_SZ, %o0	! pt_regs
214	call	do_hw_interrupt
215	 mov	%l7, %o1		! trap number
216
217	RESTORE_ALL
218
219/* For now all IRQ's not registered get sent here. handler_irq() will
220 * see if a routine is registered to handle this interrupt and if not
221 * it will say so on the console.
222 */
223
224	.align	4
225	.globl	real_irq_entry, patch_handler_irq
226real_irq_entry:
227	SAVE_ALL
228
229#ifdef CONFIG_SMP
230	.globl	patchme_maybe_smp_msg
231
232	cmp	%l7, 12
233patchme_maybe_smp_msg:
234	bgu	maybe_smp4m_msg
235	 nop
236#endif
237
238real_irq_continue:
239	or	%l0, PSR_PIL, %g2
240	wr	%g2, 0x0, %psr
241	WRITE_PAUSE
242	wr	%g2, PSR_ET, %psr
243	WRITE_PAUSE
244	mov	%l7, %o0		! irq level
245patch_handler_irq:
246	call	handler_irq
247	 add	%sp, STACKFRAME_SZ, %o1	! pt_regs ptr
248	or	%l0, PSR_PIL, %g2	! restore PIL after handler_irq
249	wr	%g2, PSR_ET, %psr	! keep ET up
250	WRITE_PAUSE
251
252	RESTORE_ALL
253
254#ifdef CONFIG_SMP
255	/* SMP per-cpu ticker interrupts are handled specially. */
256smp4m_ticker:
257	bne	real_irq_continue+4
258	 or	%l0, PSR_PIL, %g2
259	wr	%g2, 0x0, %psr
260	WRITE_PAUSE
261	wr	%g2, PSR_ET, %psr
262	WRITE_PAUSE
263	call	smp4m_percpu_timer_interrupt
264	 add	%sp, STACKFRAME_SZ, %o0
265	wr	%l0, PSR_ET, %psr
266	WRITE_PAUSE
267	RESTORE_ALL
268
269	/* Here is where we check for possible SMP IPI passed to us
270	 * on some level other than 15 which is the NMI and only used
271	 * for cross calls.  That has a separate entry point below.
272	 */
273maybe_smp4m_msg:
274	GET_PROCESSOR4M_ID(o3)
275	sethi	%hi(sun4m_irq_percpu), %l5
276	sll	%o3, 2, %o3
277	or	%l5, %lo(sun4m_irq_percpu), %o5
278	sethi	%hi(0x40000000), %o2
279	ld	[%o5 + %o3], %o1
280	ld	[%o1 + 0x00], %o3	! sun4m_irq_percpu[cpu]->pending
281	andcc	%o3, %o2, %g0
282	be,a	smp4m_ticker
283	 cmp	%l7, 14
284	st	%o2, [%o1 + 0x04]	! sun4m_irq_percpu[cpu]->clear=0x40000000
285	WRITE_PAUSE
286	ld	[%o1 + 0x00], %g0	! sun4m_irq_percpu[cpu]->pending
287	WRITE_PAUSE
288	or	%l0, PSR_PIL, %l4
289	wr	%l4, 0x0, %psr
290	WRITE_PAUSE
291	wr	%l4, PSR_ET, %psr
292	WRITE_PAUSE
293	call	smp_reschedule_irq
294	 nop
295
296	RESTORE_ALL
297
298	.align	4
299	.globl	linux_trap_ipi15_sun4m
300linux_trap_ipi15_sun4m:
301	SAVE_ALL
302	sethi	%hi(0x80000000), %o2
303	GET_PROCESSOR4M_ID(o0)
304	sethi	%hi(sun4m_irq_percpu), %l5
305	or	%l5, %lo(sun4m_irq_percpu), %o5
306	sll	%o0, 2, %o0
307	ld	[%o5 + %o0], %o5
308	ld	[%o5 + 0x00], %o3	! sun4m_irq_percpu[cpu]->pending
309	andcc	%o3, %o2, %g0
310	be	1f			! Must be an NMI async memory error
311	 st	%o2, [%o5 + 0x04]	! sun4m_irq_percpu[cpu]->clear=0x80000000
312	WRITE_PAUSE
313	ld	[%o5 + 0x00], %g0	! sun4m_irq_percpu[cpu]->pending
314	WRITE_PAUSE
315	or	%l0, PSR_PIL, %l4
316	wr	%l4, 0x0, %psr
317	WRITE_PAUSE
318	wr	%l4, PSR_ET, %psr
319	WRITE_PAUSE
320	call	smp4m_cross_call_irq
321	 nop
322	b	ret_trap_lockless_ipi
323	 clr	%l6
3241:
325	/* NMI async memory error handling. */
326	sethi	%hi(0x80000000), %l4
327	sethi	%hi(sun4m_irq_global), %o5
328	ld	[%o5 + %lo(sun4m_irq_global)], %l5
329	st	%l4, [%l5 + 0x0c]	! sun4m_irq_global->mask_set=0x80000000
330	WRITE_PAUSE
331	ld	[%l5 + 0x00], %g0	! sun4m_irq_global->pending
332	WRITE_PAUSE
333	or	%l0, PSR_PIL, %l4
334	wr	%l4, 0x0, %psr
335	WRITE_PAUSE
336	wr	%l4, PSR_ET, %psr
337	WRITE_PAUSE
338	call	sun4m_nmi
339	 nop
340	st	%l4, [%l5 + 0x08]	! sun4m_irq_global->mask_clear=0x80000000
341	WRITE_PAUSE
342	ld	[%l5 + 0x00], %g0	! sun4m_irq_global->pending
343	WRITE_PAUSE
344	RESTORE_ALL
345
346	.globl	smp4d_ticker
347	/* SMP per-cpu ticker interrupts are handled specially. */
348smp4d_ticker:
349	SAVE_ALL
350	or	%l0, PSR_PIL, %g2
351	sethi	%hi(CC_ICLR), %o0
352	sethi	%hi(1 << 14), %o1
353	or	%o0, %lo(CC_ICLR), %o0
354	stha	%o1, [%o0] ASI_M_MXCC	/* Clear PIL 14 in MXCC's ICLR */
355	wr	%g2, 0x0, %psr
356	WRITE_PAUSE
357	wr	%g2, PSR_ET, %psr
358	WRITE_PAUSE
359	call	smp4d_percpu_timer_interrupt
360	 add	%sp, STACKFRAME_SZ, %o0
361	wr	%l0, PSR_ET, %psr
362	WRITE_PAUSE
363	RESTORE_ALL
364
365	.align	4
366	.globl	linux_trap_ipi15_sun4d
367linux_trap_ipi15_sun4d:
368	SAVE_ALL
369	sethi	%hi(CC_BASE), %o4
370	sethi	%hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
371	or	%o4, (CC_EREG - CC_BASE), %o0
372	ldda	[%o0] ASI_M_MXCC, %o0
373	andcc	%o0, %o2, %g0
374	bne	1f
375	 sethi	%hi(BB_STAT2), %o2
376	lduba	[%o2] ASI_M_CTL, %o2
377	andcc	%o2, BB_STAT2_MASK, %g0
378	bne	2f
379	 or	%o4, (CC_ICLR - CC_BASE), %o0
380	sethi	%hi(1 << 15), %o1
381	stha	%o1, [%o0] ASI_M_MXCC	/* Clear PIL 15 in MXCC's ICLR */
382	or	%l0, PSR_PIL, %l4
383	wr	%l4, 0x0, %psr
384	WRITE_PAUSE
385	wr	%l4, PSR_ET, %psr
386	WRITE_PAUSE
387	call	smp4d_cross_call_irq
388	 nop
389	b	ret_trap_lockless_ipi
390	 clr	%l6
391
3921:	/* MXCC error */
3932:	/* BB error */
394	/* Disable PIL 15 */
395	set	CC_IMSK, %l4
396	lduha	[%l4] ASI_M_MXCC, %l5
397	sethi	%hi(1 << 15), %l7
398	or	%l5, %l7, %l5
399	stha	%l5, [%l4] ASI_M_MXCC
400	/* FIXME */
4011:	b,a	1b
402
403#ifdef CONFIG_SPARC_LEON
404
405	.globl	smpleon_ticker
406	/* SMP per-cpu ticker interrupts are handled specially. */
407smpleon_ticker:
408        SAVE_ALL
409	or	%l0, PSR_PIL, %g2
410	wr	%g2, 0x0, %psr
411	WRITE_PAUSE
412	wr	%g2, PSR_ET, %psr
413	WRITE_PAUSE
414	call	leon_percpu_timer_interrupt
415	 add	%sp, STACKFRAME_SZ, %o0
416	wr	%l0, PSR_ET, %psr
417	WRITE_PAUSE
418	RESTORE_ALL
419
420	.align	4
421	.globl	linux_trap_ipi15_leon
422linux_trap_ipi15_leon:
423	SAVE_ALL
424	or	%l0, PSR_PIL, %l4
425	wr	%l4, 0x0, %psr
426	WRITE_PAUSE
427	wr	%l4, PSR_ET, %psr
428	WRITE_PAUSE
429	call	leon_cross_call_irq
430	 nop
431	b	ret_trap_lockless_ipi
432	 clr	%l6
433
434#endif /* CONFIG_SPARC_LEON */
435
436#endif /* CONFIG_SMP */
437
438	/* This routine handles illegal instructions and privileged
439	 * instruction attempts from user code.
440	 */
441	.align	4
442	.globl	bad_instruction
443bad_instruction:
444	sethi	%hi(0xc1f80000), %l4
445	ld	[%l1], %l5
446	sethi	%hi(0x81d80000), %l7
447	and	%l5, %l4, %l5
448	cmp	%l5, %l7
449	be	1f
450	SAVE_ALL
451
452	wr	%l0, PSR_ET, %psr		! re-enable traps
453	WRITE_PAUSE
454
455	add	%sp, STACKFRAME_SZ, %o0
456	mov	%l1, %o1
457	mov	%l2, %o2
458	call	do_illegal_instruction
459	 mov	%l0, %o3
460
461	RESTORE_ALL
462
4631:	/* unimplemented flush - just skip */
464	jmpl	%l2, %g0
465	 rett	%l2 + 4
466
467	.align	4
468	.globl	priv_instruction
469priv_instruction:
470	SAVE_ALL
471
472	wr	%l0, PSR_ET, %psr
473	WRITE_PAUSE
474
475	add	%sp, STACKFRAME_SZ, %o0
476	mov	%l1, %o1
477	mov	%l2, %o2
478	call	do_priv_instruction
479	 mov	%l0, %o3
480
481	RESTORE_ALL
482
483	/* This routine handles unaligned data accesses. */
484	.align	4
485	.globl	mna_handler
486mna_handler:
487	andcc	%l0, PSR_PS, %g0
488	be	mna_fromuser
489	 nop
490
491	SAVE_ALL
492
493	wr	%l0, PSR_ET, %psr
494	WRITE_PAUSE
495
496	ld	[%l1], %o1
497	call	kernel_unaligned_trap
498	 add	%sp, STACKFRAME_SZ, %o0
499
500	RESTORE_ALL
501
502mna_fromuser:
503	SAVE_ALL
504
505	wr	%l0, PSR_ET, %psr		! re-enable traps
506	WRITE_PAUSE
507
508	ld	[%l1], %o1
509	call	user_unaligned_trap
510	 add	%sp, STACKFRAME_SZ, %o0
511
512	RESTORE_ALL
513
514	/* This routine handles floating point disabled traps. */
515	.align	4
516	.globl	fpd_trap_handler
517fpd_trap_handler:
518	SAVE_ALL
519
520	wr	%l0, PSR_ET, %psr		! re-enable traps
521	WRITE_PAUSE
522
523	add	%sp, STACKFRAME_SZ, %o0
524	mov	%l1, %o1
525	mov	%l2, %o2
526	call	do_fpd_trap
527	 mov	%l0, %o3
528
529	RESTORE_ALL
530
531	/* This routine handles Floating Point Exceptions. */
532	.align	4
533	.globl	fpe_trap_handler
534fpe_trap_handler:
535	set	fpsave_magic, %l5
536	cmp	%l1, %l5
537	be	1f
538	 sethi	%hi(fpsave), %l5
539	or	%l5, %lo(fpsave), %l5
540	cmp	%l1, %l5
541	bne	2f
542	 sethi	%hi(fpsave_catch2), %l5
543	or	%l5, %lo(fpsave_catch2), %l5
544	wr	%l0, 0x0, %psr
545	WRITE_PAUSE
546	jmp	%l5
547	 rett	%l5 + 4
5481:
549	sethi	%hi(fpsave_catch), %l5
550	or	%l5, %lo(fpsave_catch), %l5
551	wr	%l0, 0x0, %psr
552	WRITE_PAUSE
553	jmp	%l5
554	 rett	%l5 + 4
555
5562:
557	SAVE_ALL
558
559	wr	%l0, PSR_ET, %psr		! re-enable traps
560	WRITE_PAUSE
561
562	add	%sp, STACKFRAME_SZ, %o0
563	mov	%l1, %o1
564	mov	%l2, %o2
565	call	do_fpe_trap
566	 mov	%l0, %o3
567
568	RESTORE_ALL
569
570	/* This routine handles Tag Overflow Exceptions. */
571	.align	4
572	.globl	do_tag_overflow
573do_tag_overflow:
574	SAVE_ALL
575
576	wr	%l0, PSR_ET, %psr		! re-enable traps
577	WRITE_PAUSE
578
579	add	%sp, STACKFRAME_SZ, %o0
580	mov	%l1, %o1
581	mov	%l2, %o2
582	call	handle_tag_overflow
583	 mov	%l0, %o3
584
585	RESTORE_ALL
586
587	/* This routine handles Watchpoint Exceptions. */
588	.align	4
589	.globl	do_watchpoint
590do_watchpoint:
591	SAVE_ALL
592
593	wr	%l0, PSR_ET, %psr		! re-enable traps
594	WRITE_PAUSE
595
596	add	%sp, STACKFRAME_SZ, %o0
597	mov	%l1, %o1
598	mov	%l2, %o2
599	call	handle_watchpoint
600	 mov	%l0, %o3
601
602	RESTORE_ALL
603
604	/* This routine handles Register Access Exceptions. */
605	.align	4
606	.globl	do_reg_access
607do_reg_access:
608	SAVE_ALL
609
610	wr	%l0, PSR_ET, %psr		! re-enable traps
611	WRITE_PAUSE
612
613	add	%sp, STACKFRAME_SZ, %o0
614	mov	%l1, %o1
615	mov	%l2, %o2
616	call	handle_reg_access
617	 mov	%l0, %o3
618
619	RESTORE_ALL
620
621	/* This routine handles Co-Processor Disabled Exceptions. */
622	.align	4
623	.globl	do_cp_disabled
624do_cp_disabled:
625	SAVE_ALL
626
627	wr	%l0, PSR_ET, %psr		! re-enable traps
628	WRITE_PAUSE
629
630	add	%sp, STACKFRAME_SZ, %o0
631	mov	%l1, %o1
632	mov	%l2, %o2
633	call	handle_cp_disabled
634	 mov	%l0, %o3
635
636	RESTORE_ALL
637
638	/* This routine handles Co-Processor Exceptions. */
639	.align	4
640	.globl	do_cp_exception
641do_cp_exception:
642	SAVE_ALL
643
644	wr	%l0, PSR_ET, %psr		! re-enable traps
645	WRITE_PAUSE
646
647	add	%sp, STACKFRAME_SZ, %o0
648	mov	%l1, %o1
649	mov	%l2, %o2
650	call	handle_cp_exception
651	 mov	%l0, %o3
652
653	RESTORE_ALL
654
655	/* This routine handles Hardware Divide By Zero Exceptions. */
656	.align	4
657	.globl	do_hw_divzero
658do_hw_divzero:
659	SAVE_ALL
660
661	wr	%l0, PSR_ET, %psr		! re-enable traps
662	WRITE_PAUSE
663
664	add	%sp, STACKFRAME_SZ, %o0
665	mov	%l1, %o1
666	mov	%l2, %o2
667	call	handle_hw_divzero
668	 mov	%l0, %o3
669
670	RESTORE_ALL
671
672	.align	4
673	.globl	do_flush_windows
674do_flush_windows:
675	SAVE_ALL
676
677	wr	%l0, PSR_ET, %psr
678	WRITE_PAUSE
679
680	andcc	%l0, PSR_PS, %g0
681	bne	dfw_kernel
682	 nop
683
684	call	flush_user_windows
685	 nop
686
687	/* Advance over the trap instruction. */
688	ld	[%sp + STACKFRAME_SZ + PT_NPC], %l1
689	add	%l1, 0x4, %l2
690	st	%l1, [%sp + STACKFRAME_SZ + PT_PC]
691	st	%l2, [%sp + STACKFRAME_SZ + PT_NPC]
692
693	RESTORE_ALL
694
695	.globl	flush_patch_one
696
697	/* We get these for debugging routines using __builtin_return_address() */
698dfw_kernel:
699flush_patch_one:
700	FLUSH_ALL_KERNEL_WINDOWS
701
702	/* Advance over the trap instruction. */
703	ld	[%sp + STACKFRAME_SZ + PT_NPC], %l1
704	add	%l1, 0x4, %l2
705	st	%l1, [%sp + STACKFRAME_SZ + PT_PC]
706	st	%l2, [%sp + STACKFRAME_SZ + PT_NPC]
707
708	RESTORE_ALL
709
710	/* The getcc software trap.  The user wants the condition codes from
711	 * the %psr in register %g1.
712	 */
713
714	.align	4
715	.globl	getcc_trap_handler
716getcc_trap_handler:
717	srl	%l0, 20, %g1	! give user
718	and	%g1, 0xf, %g1	! only ICC bits in %psr
719	jmp	%l2		! advance over trap instruction
720	rett	%l2 + 0x4	! like this...
721
722	/* The setcc software trap.  The user has condition codes in %g1
723	 * that it would like placed in the %psr.  Be careful not to flip
724	 * any unintentional bits!
725	 */
726
727	.align	4
728	.globl	setcc_trap_handler
729setcc_trap_handler:
730	sll	%g1, 0x14, %l4
731	set	PSR_ICC, %l5
732	andn	%l0, %l5, %l0	! clear ICC bits in %psr
733	and	%l4, %l5, %l4	! clear non-ICC bits in user value
734	or	%l4, %l0, %l4	! or them in... mix mix mix
735
736	wr	%l4, 0x0, %psr	! set new %psr
737	WRITE_PAUSE		! TI scumbags...
738
739	jmp	%l2		! advance over trap instruction
740	rett	%l2 + 0x4	! like this...
741
742	.align	4
743	.globl	linux_trap_nmi_sun4c
744linux_trap_nmi_sun4c:
745	SAVE_ALL
746
747	/* Ugh, we need to clear the IRQ line.  This is now
748	 * a very sun4c specific trap handler...
749	 */
750	sethi	%hi(interrupt_enable), %l5
751	ld	[%l5 + %lo(interrupt_enable)], %l5
752	ldub	[%l5], %l6
753	andn	%l6, INTS_ENAB, %l6
754	stb	%l6, [%l5]
755
756	/* Now it is safe to re-enable traps without recursion. */
757	or	%l0, PSR_PIL, %l0
758	wr	%l0, PSR_ET, %psr
759	WRITE_PAUSE
760
761	/* Now call the c-code with the pt_regs frame ptr and the
762	 * memory error registers as arguments.  The ordering chosen
763	 * here is due to unlatching semantics.
764	 */
765	sethi	%hi(AC_SYNC_ERR), %o0
766	add	%o0, 0x4, %o0
767	lda	[%o0] ASI_CONTROL, %o2	! sync vaddr
768	sub	%o0, 0x4, %o0
769	lda	[%o0] ASI_CONTROL, %o1	! sync error
770	add	%o0, 0xc, %o0
771	lda	[%o0] ASI_CONTROL, %o4	! async vaddr
772	sub	%o0, 0x4, %o0
773	lda	[%o0] ASI_CONTROL, %o3	! async error
774	call	sparc_lvl15_nmi
775	 add	%sp, STACKFRAME_SZ, %o0
776
777	RESTORE_ALL
778
779	.align	4
780	.globl	invalid_segment_patch1_ff
781	.globl	invalid_segment_patch2_ff
782invalid_segment_patch1_ff:	cmp	%l4, 0xff
783invalid_segment_patch2_ff:	mov	0xff, %l3
784
785	.align	4
786	.globl	invalid_segment_patch1_1ff
787	.globl	invalid_segment_patch2_1ff
788invalid_segment_patch1_1ff:	cmp	%l4, 0x1ff
789invalid_segment_patch2_1ff:	mov	0x1ff, %l3
790
791	.align	4
792	.globl	num_context_patch1_16, num_context_patch2_16
793num_context_patch1_16:		mov	0x10, %l7
794num_context_patch2_16:		mov	0x10, %l7
795
796	.align	4
797	.globl	vac_linesize_patch_32
798vac_linesize_patch_32:		subcc	%l7, 32, %l7
799
800	.align	4
801	.globl	vac_hwflush_patch1_on, vac_hwflush_patch2_on
802
803/*
804 * Ugly, but we cant use hardware flushing on the sun4 and we'd require
805 * two instructions (Anton)
806 */
807vac_hwflush_patch1_on:		addcc	%l7, -PAGE_SIZE, %l7
808
809vac_hwflush_patch2_on:		sta	%g0, [%l3 + %l7] ASI_HWFLUSHSEG
810
811	.globl	invalid_segment_patch1, invalid_segment_patch2
812	.globl	num_context_patch1
813	.globl	vac_linesize_patch, vac_hwflush_patch1
814	.globl	vac_hwflush_patch2
815
816	.align	4
817	.globl	sun4c_fault
818
819! %l0 = %psr
820! %l1 = %pc
821! %l2 = %npc
822! %l3 = %wim
823! %l7 = 1 for textfault
824! We want error in %l5, vaddr in %l6
825sun4c_fault:
826	sethi	%hi(AC_SYNC_ERR), %l4
827	add	%l4, 0x4, %l6			! AC_SYNC_VA in %l6
828	lda	[%l6] ASI_CONTROL, %l5		! Address
829	lda	[%l4] ASI_CONTROL, %l6		! Error, retained for a bit
830
831	andn	%l5, 0xfff, %l5			! Encode all info into l7
832	srl	%l6, 14, %l4
833
834	and	%l4, 2, %l4
835	or	%l5, %l4, %l4
836
837	or	%l4, %l7, %l7			! l7 = [addr,write,txtfault]
838
839	andcc	%l0, PSR_PS, %g0
840	be	sun4c_fault_fromuser
841	 andcc	%l7, 1, %g0			! Text fault?
842
843	be	1f
844	 sethi	%hi(KERNBASE), %l4
845
846	mov	%l1, %l5			! PC
847
8481:
849	cmp	%l5, %l4
850	blu	sun4c_fault_fromuser
851	 sethi	%hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
852
853	/* If the kernel references a bum kernel pointer, or a pte which
854	 * points to a non existant page in ram, we will run this code
855	 * _forever_ and lock up the machine!!!!! So we must check for
856	 * this condition, the AC_SYNC_ERR bits are what we must examine.
857	 * Also a parity error would make this happen as well.  So we just
858	 * check that we are in fact servicing a tlb miss and not some
859	 * other type of fault for the kernel.
860	 */
861	andcc	%l6, 0x80, %g0
862	be	sun4c_fault_fromuser
863	 and	%l5, %l4, %l5
864
865	/* Test for NULL pte_t * in vmalloc area. */
866	sethi   %hi(VMALLOC_START), %l4
867	cmp     %l5, %l4
868	blu,a   invalid_segment_patch1
869	 lduXa	[%l5] ASI_SEGMAP, %l4
870
871	sethi   %hi(swapper_pg_dir), %l4
872	srl     %l5, SUN4C_PGDIR_SHIFT, %l6
873	or      %l4, %lo(swapper_pg_dir), %l4
874	sll     %l6, 2, %l6
875	ld      [%l4 + %l6], %l4
876	andcc   %l4, PAGE_MASK, %g0
877	be      sun4c_fault_fromuser
878	 lduXa  [%l5] ASI_SEGMAP, %l4
879
880invalid_segment_patch1:
881	cmp	%l4, 0x7f
882	bne	1f
883	 sethi	%hi(sun4c_kfree_ring), %l4
884	or	%l4, %lo(sun4c_kfree_ring), %l4
885	ld	[%l4 + 0x18], %l3
886	deccc	%l3			! do we have a free entry?
887	bcs,a	2f			! no, unmap one.
888	 sethi	%hi(sun4c_kernel_ring), %l4
889
890	st	%l3, [%l4 + 0x18]	! sun4c_kfree_ring.num_entries--
891
892	ld	[%l4 + 0x00], %l6	! entry = sun4c_kfree_ring.ringhd.next
893	st	%l5, [%l6 + 0x08]	! entry->vaddr = address
894
895	ld	[%l6 + 0x00], %l3	! next = entry->next
896	ld	[%l6 + 0x04], %l7	! entry->prev
897
898	st	%l7, [%l3 + 0x04]	! next->prev = entry->prev
899	st	%l3, [%l7 + 0x00]	! entry->prev->next = next
900
901	sethi	%hi(sun4c_kernel_ring), %l4
902	or	%l4, %lo(sun4c_kernel_ring), %l4
903					! head = &sun4c_kernel_ring.ringhd
904
905	ld	[%l4 + 0x00], %l7	! head->next
906
907	st	%l4, [%l6 + 0x04]	! entry->prev = head
908	st	%l7, [%l6 + 0x00]	! entry->next = head->next
909	st	%l6, [%l7 + 0x04]	! head->next->prev = entry
910
911	st	%l6, [%l4 + 0x00]	! head->next = entry
912
913	ld	[%l4 + 0x18], %l3
914	inc	%l3			! sun4c_kernel_ring.num_entries++
915	st	%l3, [%l4 + 0x18]
916	b	4f
917	 ld	[%l6 + 0x08], %l5
918
9192:
920	or	%l4, %lo(sun4c_kernel_ring), %l4
921					! head = &sun4c_kernel_ring.ringhd
922
923	ld	[%l4 + 0x04], %l6	! entry = head->prev
924
925	ld	[%l6 + 0x08], %l3	! tmp = entry->vaddr
926
927	! Flush segment from the cache.
928	sethi	%hi((64 * 1024)), %l7
9299:
930vac_hwflush_patch1:
931vac_linesize_patch:
932	subcc	%l7, 16, %l7
933	bne	9b
934vac_hwflush_patch2:
935	 sta	%g0, [%l3 + %l7] ASI_FLUSHSEG
936
937	st	%l5, [%l6 + 0x08]	! entry->vaddr = address
938
939	ld	[%l6 + 0x00], %l5	! next = entry->next
940	ld	[%l6 + 0x04], %l7	! entry->prev
941
942	st	%l7, [%l5 + 0x04]	! next->prev = entry->prev
943	st	%l5, [%l7 + 0x00]	! entry->prev->next = next
944	st	%l4, [%l6 + 0x04]	! entry->prev = head
945
946	ld	[%l4 + 0x00], %l7	! head->next
947
948	st	%l7, [%l6 + 0x00]	! entry->next = head->next
949	st	%l6, [%l7 + 0x04]	! head->next->prev = entry
950	st	%l6, [%l4 + 0x00]	! head->next = entry
951
952	mov	%l3, %l5		! address = tmp
953
9544:
955num_context_patch1:
956	mov	0x08, %l7
957
958	ld	[%l6 + 0x08], %l4
959	ldub	[%l6 + 0x0c], %l3
960	or	%l4, %l3, %l4		! encode new vaddr/pseg into l4
961
962	sethi	%hi(AC_CONTEXT), %l3
963	lduba	[%l3] ASI_CONTROL, %l6
964
965	/* Invalidate old mapping, instantiate new mapping,
966	 * for each context.  Registers l6/l7 are live across
967	 * this loop.
968	 */
9693:	deccc	%l7
970	sethi	%hi(AC_CONTEXT), %l3
971	stba	%l7, [%l3] ASI_CONTROL
972invalid_segment_patch2:
973	mov	0x7f, %l3
974	stXa	%l3, [%l5] ASI_SEGMAP
975	andn	%l4, 0x1ff, %l3
976	bne	3b
977	 stXa	%l4, [%l3] ASI_SEGMAP
978
979	sethi	%hi(AC_CONTEXT), %l3
980	stba	%l6, [%l3] ASI_CONTROL
981
982	andn	%l4, 0x1ff, %l5
983
9841:
985	sethi	%hi(VMALLOC_START), %l4
986	cmp	%l5, %l4
987
988	bgeu	1f
989	 mov	1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
990
991	sethi	%hi(KERNBASE), %l6
992
993	sub	%l5, %l6, %l4
994	srl	%l4, PAGE_SHIFT, %l4
995	sethi	%hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
996	or	%l3, %l4, %l3
997
998	sethi	%hi(PAGE_SIZE), %l4
999
10002:
1001	sta	%l3, [%l5] ASI_PTE
1002	deccc	%l7
1003	inc	%l3
1004	bne	2b
1005	 add	%l5, %l4, %l5
1006
1007	b	7f
1008	 sethi	%hi(sun4c_kernel_faults), %l4
1009
10101:
1011	srl	%l5, SUN4C_PGDIR_SHIFT, %l3
1012	sethi	%hi(swapper_pg_dir), %l4
1013	or	%l4, %lo(swapper_pg_dir), %l4
1014	sll	%l3, 2, %l3
1015	ld	[%l4 + %l3], %l4
1016	and	%l4, PAGE_MASK, %l4
1017
1018	srl	%l5, (PAGE_SHIFT - 2), %l6
1019	and	%l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
1020	add	%l6, %l4, %l6
1021
1022	sethi	%hi(PAGE_SIZE), %l4
1023
10242:
1025	ld	[%l6], %l3
1026	deccc	%l7
1027	sta	%l3, [%l5] ASI_PTE
1028	add	%l6, 0x4, %l6
1029	bne	2b
1030	 add	%l5, %l4, %l5
1031
1032	sethi	%hi(sun4c_kernel_faults), %l4
10337:
1034	ld	[%l4 + %lo(sun4c_kernel_faults)], %l3
1035	inc	%l3
1036	st	%l3, [%l4 + %lo(sun4c_kernel_faults)]
1037
1038	/* Restore condition codes */
1039	wr	%l0, 0x0, %psr
1040	WRITE_PAUSE
1041	jmp	%l1
1042	 rett	%l2
1043
1044sun4c_fault_fromuser:
1045	SAVE_ALL
1046	 nop
1047
1048	mov	%l7, %o1		! Decode the info from %l7
1049	mov	%l7, %o2
1050	and	%o1, 1, %o1		! arg2 = text_faultp
1051	mov	%l7, %o3
1052	and	%o2, 2, %o2		! arg3 = writep
1053	andn	%o3, 0xfff, %o3		! arg4 = faulting address
1054
1055	wr	%l0, PSR_ET, %psr
1056	WRITE_PAUSE
1057
1058	call	do_sun4c_fault
1059	 add	%sp, STACKFRAME_SZ, %o0	! arg1 = pt_regs ptr
1060
1061	RESTORE_ALL
1062
1063	.align	4
1064	.globl	srmmu_fault
1065srmmu_fault:
1066	mov	0x400, %l5
1067	mov	0x300, %l4
1068
1069	lda	[%l5] ASI_M_MMUREGS, %l6	! read sfar first
1070	lda	[%l4] ASI_M_MMUREGS, %l5	! read sfsr last
1071
1072	andn	%l6, 0xfff, %l6
1073	srl	%l5, 6, %l5			! and encode all info into l7
1074
1075	and	%l5, 2, %l5
1076	or	%l5, %l6, %l6
1077
1078	or	%l6, %l7, %l7			! l7 = [addr,write,txtfault]
1079
1080	SAVE_ALL
1081
1082	mov	%l7, %o1
1083	mov	%l7, %o2
1084	and	%o1, 1, %o1		! arg2 = text_faultp
1085	mov	%l7, %o3
1086	and	%o2, 2, %o2		! arg3 = writep
1087	andn	%o3, 0xfff, %o3		! arg4 = faulting address
1088
1089	wr	%l0, PSR_ET, %psr
1090	WRITE_PAUSE
1091
1092	call	do_sparc_fault
1093	 add	%sp, STACKFRAME_SZ, %o0	! arg1 = pt_regs ptr
1094
1095	RESTORE_ALL
1096
1097	.align	4
1098	.globl	sys_nis_syscall
1099sys_nis_syscall:
1100	mov	%o7, %l5
1101	add	%sp, STACKFRAME_SZ, %o0		! pt_regs *regs arg
1102	call	c_sys_nis_syscall
1103	 mov	%l5, %o7
1104
1105	.align	4
1106	.globl	sys_execve
1107sys_execve:
1108	mov	%o7, %l5
1109	add	%sp, STACKFRAME_SZ, %o0		! pt_regs *regs arg
1110	call	sparc_execve
1111	 mov	%l5, %o7
1112
1113	.globl	sunos_execv
1114sunos_execv:
1115	st	%g0, [%sp + STACKFRAME_SZ + PT_I2]
1116
1117	call	sparc_execve
1118	 add	%sp, STACKFRAME_SZ, %o0
1119
1120	b	ret_sys_call
1121	 ld	[%sp + STACKFRAME_SZ + PT_I0], %o0
1122
1123	.align	4
1124	.globl	sys_sparc_pipe
1125sys_sparc_pipe:
1126	mov	%o7, %l5
1127	add	%sp, STACKFRAME_SZ, %o0		! pt_regs *regs arg
1128	call	sparc_pipe
1129	 mov	%l5, %o7
1130
1131	.align	4
1132	.globl	sys_sigaltstack
1133sys_sigaltstack:
1134	mov	%o7, %l5
1135	mov	%fp, %o2
1136	call	do_sigaltstack
1137	 mov	%l5, %o7
1138
1139	.align	4
1140	.globl	sys_sigstack
1141sys_sigstack:
1142	mov	%o7, %l5
1143	mov	%fp, %o2
1144	call	do_sys_sigstack
1145	 mov	%l5, %o7
1146
1147	.align	4
1148	.globl	sys_sigreturn
1149sys_sigreturn:
1150	call	do_sigreturn
1151	 add	%sp, STACKFRAME_SZ, %o0
1152
1153	ld	[%curptr + TI_FLAGS], %l5
1154	andcc	%l5, _TIF_SYSCALL_TRACE, %g0
1155	be	1f
1156	 nop
1157
1158	call	syscall_trace
1159	 nop
1160
11611:
1162	/* We don't want to muck with user registers like a
1163	 * normal syscall, just return.
1164	 */
1165	RESTORE_ALL
1166
1167	.align	4
1168	.globl	sys_rt_sigreturn
1169sys_rt_sigreturn:
1170	call	do_rt_sigreturn
1171	 add	%sp, STACKFRAME_SZ, %o0
1172
1173	ld	[%curptr + TI_FLAGS], %l5
1174	andcc	%l5, _TIF_SYSCALL_TRACE, %g0
1175	be	1f
1176	 nop
1177
1178	add	%sp, STACKFRAME_SZ, %o0
1179	call	syscall_trace
1180	 mov	1, %o1
1181
11821:
1183	/* We are returning to a signal handler. */
1184	RESTORE_ALL
1185
1186	/* Now that we have a real sys_clone, sys_fork() is
1187	 * implemented in terms of it.  Our _real_ implementation
1188	 * of SunOS vfork() will use sys_vfork().
1189	 *
1190	 * XXX These three should be consolidated into mostly shared
1191	 * XXX code just like on sparc64... -DaveM
1192	 */
1193	.align	4
1194	.globl	sys_fork, flush_patch_two
1195sys_fork:
1196	mov	%o7, %l5
1197flush_patch_two:
1198	FLUSH_ALL_KERNEL_WINDOWS;
1199	ld	[%curptr + TI_TASK], %o4
1200	rd	%psr, %g4
1201	WRITE_PAUSE
1202	mov	SIGCHLD, %o0			! arg0:	clone flags
1203	rd	%wim, %g5
1204	WRITE_PAUSE
1205	mov	%fp, %o1			! arg1:	usp
1206	std	%g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1207	add	%sp, STACKFRAME_SZ, %o2		! arg2:	pt_regs ptr
1208	mov	0, %o3
1209	call	sparc_do_fork
1210	 mov	%l5, %o7
1211
1212	/* Whee, kernel threads! */
1213	.globl	sys_clone, flush_patch_three
1214sys_clone:
1215	mov	%o7, %l5
1216flush_patch_three:
1217	FLUSH_ALL_KERNEL_WINDOWS;
1218	ld	[%curptr + TI_TASK], %o4
1219	rd	%psr, %g4
1220	WRITE_PAUSE
1221
1222	/* arg0,1: flags,usp  -- loaded already */
1223	cmp	%o1, 0x0			! Is new_usp NULL?
1224	rd	%wim, %g5
1225	WRITE_PAUSE
1226	be,a	1f
1227	 mov	%fp, %o1			! yes, use callers usp
1228	andn	%o1, 7, %o1			! no, align to 8 bytes
12291:
1230	std	%g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1231	add	%sp, STACKFRAME_SZ, %o2		! arg2:	pt_regs ptr
1232	mov	0, %o3
1233	call	sparc_do_fork
1234	 mov	%l5, %o7
1235
1236	/* Whee, real vfork! */
1237	.globl	sys_vfork, flush_patch_four
1238sys_vfork:
1239flush_patch_four:
1240	FLUSH_ALL_KERNEL_WINDOWS;
1241	ld	[%curptr + TI_TASK], %o4
1242	rd	%psr, %g4
1243	WRITE_PAUSE
1244	rd	%wim, %g5
1245	WRITE_PAUSE
1246	std	%g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1247	sethi	%hi(0x4000 | 0x0100 | SIGCHLD), %o0
1248	mov	%fp, %o1
1249	or	%o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1250	sethi	%hi(sparc_do_fork), %l1
1251	mov	0, %o3
1252	jmpl	%l1 + %lo(sparc_do_fork), %g0
1253	 add	%sp, STACKFRAME_SZ, %o2
1254
1255        .align  4
1256linux_sparc_ni_syscall:
1257	sethi   %hi(sys_ni_syscall), %l7
1258	b       syscall_is_too_hard
1259	 or     %l7, %lo(sys_ni_syscall), %l7
1260
1261linux_fast_syscall:
1262	andn	%l7, 3, %l7
1263	mov	%i0, %o0
1264	mov	%i1, %o1
1265	mov 	%i2, %o2
1266	jmpl	%l7 + %g0, %g0
1267	 mov	%i3, %o3
1268
1269linux_syscall_trace:
1270	add	%sp, STACKFRAME_SZ, %o0
1271	call	syscall_trace
1272	 mov	0, %o1
1273	cmp	%o0, 0
1274	bne	3f
1275	 mov	-ENOSYS, %o0
1276	mov	%i0, %o0
1277	mov	%i1, %o1
1278	mov	%i2, %o2
1279	mov	%i3, %o3
1280	b	2f
1281	 mov	%i4, %o4
1282
1283	.globl	ret_from_fork
1284ret_from_fork:
1285	call	schedule_tail
1286	 mov	%g3, %o0
1287	b	ret_sys_call
1288	 ld	[%sp + STACKFRAME_SZ + PT_I0], %o0
1289
1290	/* Linux native system calls enter here... */
1291	.align	4
1292	.globl	linux_sparc_syscall
1293linux_sparc_syscall:
1294	sethi	%hi(PSR_SYSCALL), %l4
1295	or	%l0, %l4, %l0
1296	/* Direct access to user regs, must faster. */
1297	cmp	%g1, NR_syscalls
1298	bgeu	linux_sparc_ni_syscall
1299	 sll	%g1, 2, %l4
1300	ld	[%l7 + %l4], %l7
1301	andcc	%l7, 1, %g0
1302	bne	linux_fast_syscall
1303	 /* Just do first insn from SAVE_ALL in the delay slot */
1304
1305syscall_is_too_hard:
1306	SAVE_ALL_HEAD
1307	 rd	%wim, %l3
1308
1309	wr	%l0, PSR_ET, %psr
1310	mov	%i0, %o0
1311	mov	%i1, %o1
1312	mov	%i2, %o2
1313
1314	ld	[%curptr + TI_FLAGS], %l5
1315	mov	%i3, %o3
1316	andcc	%l5, _TIF_SYSCALL_TRACE, %g0
1317	mov	%i4, %o4
1318	bne	linux_syscall_trace
1319	 mov	%i0, %l5
13202:
1321	call	%l7
1322	 mov	%i5, %o5
1323
13243:
1325	st	%o0, [%sp + STACKFRAME_SZ + PT_I0]
1326
1327ret_sys_call:
1328	ld	[%curptr + TI_FLAGS], %l6
1329	cmp	%o0, -ERESTART_RESTARTBLOCK
1330	ld	[%sp + STACKFRAME_SZ + PT_PSR], %g3
1331	set	PSR_C, %g2
1332	bgeu	1f
1333	 andcc	%l6, _TIF_SYSCALL_TRACE, %g0
1334
1335	/* System call success, clear Carry condition code. */
1336	andn	%g3, %g2, %g3
1337	clr	%l6
1338	st	%g3, [%sp + STACKFRAME_SZ + PT_PSR]
1339	bne	linux_syscall_trace2
1340	 ld	[%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1341	add	%l1, 0x4, %l2			/* npc = npc+4 */
1342	st	%l1, [%sp + STACKFRAME_SZ + PT_PC]
1343	b	ret_trap_entry
1344	 st	%l2, [%sp + STACKFRAME_SZ + PT_NPC]
13451:
1346	/* System call failure, set Carry condition code.
1347	 * Also, get abs(errno) to return to the process.
1348	 */
1349	sub	%g0, %o0, %o0
1350	or	%g3, %g2, %g3
1351	st	%o0, [%sp + STACKFRAME_SZ + PT_I0]
1352	mov	1, %l6
1353	st	%g3, [%sp + STACKFRAME_SZ + PT_PSR]
1354	bne	linux_syscall_trace2
1355	 ld	[%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1356	add	%l1, 0x4, %l2			/* npc = npc+4 */
1357	st	%l1, [%sp + STACKFRAME_SZ + PT_PC]
1358	b	ret_trap_entry
1359	 st	%l2, [%sp + STACKFRAME_SZ + PT_NPC]
1360
1361linux_syscall_trace2:
1362	add	%sp, STACKFRAME_SZ, %o0
1363	mov	1, %o1
1364	call	syscall_trace
1365	 add	%l1, 0x4, %l2			/* npc = npc+4 */
1366	st	%l1, [%sp + STACKFRAME_SZ + PT_PC]
1367	b	ret_trap_entry
1368	 st	%l2, [%sp + STACKFRAME_SZ + PT_NPC]
1369
1370
1371/* Saving and restoring the FPU state is best done from lowlevel code.
1372 *
1373 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1374 *             void *fpqueue, unsigned long *fpqdepth)
1375 */
1376
1377	.globl	fpsave
1378fpsave:
1379	st	%fsr, [%o1]	! this can trap on us if fpu is in bogon state
1380	ld	[%o1], %g1
1381	set	0x2000, %g4
1382	andcc	%g1, %g4, %g0
1383	be	2f
1384	 mov	0, %g2
1385
1386	/* We have an fpqueue to save. */
13871:
1388	std	%fq, [%o2]
1389fpsave_magic:
1390	st	%fsr, [%o1]
1391	ld	[%o1], %g3
1392	andcc	%g3, %g4, %g0
1393	add	%g2, 1, %g2
1394	bne	1b
1395	 add	%o2, 8, %o2
1396
13972:
1398	st	%g2, [%o3]
1399
1400	std	%f0, [%o0 + 0x00]
1401	std	%f2, [%o0 + 0x08]
1402	std	%f4, [%o0 + 0x10]
1403	std	%f6, [%o0 + 0x18]
1404	std	%f8, [%o0 + 0x20]
1405	std	%f10, [%o0 + 0x28]
1406	std	%f12, [%o0 + 0x30]
1407	std	%f14, [%o0 + 0x38]
1408	std	%f16, [%o0 + 0x40]
1409	std	%f18, [%o0 + 0x48]
1410	std	%f20, [%o0 + 0x50]
1411	std	%f22, [%o0 + 0x58]
1412	std	%f24, [%o0 + 0x60]
1413	std	%f26, [%o0 + 0x68]
1414	std	%f28, [%o0 + 0x70]
1415	retl
1416	 std	%f30, [%o0 + 0x78]
1417
1418	/* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1419	 * code for pointing out this possible deadlock, while we save state
1420	 * above we could trap on the fsr store so our low level fpu trap
1421	 * code has to know how to deal with this.
1422	 */
1423fpsave_catch:
1424	b	fpsave_magic + 4
1425	 st	%fsr, [%o1]
1426
1427fpsave_catch2:
1428	b	fpsave + 4
1429	 st	%fsr, [%o1]
1430
1431	/* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1432
1433	.globl	fpload
1434fpload:
1435	ldd	[%o0 + 0x00], %f0
1436	ldd	[%o0 + 0x08], %f2
1437	ldd	[%o0 + 0x10], %f4
1438	ldd	[%o0 + 0x18], %f6
1439	ldd	[%o0 + 0x20], %f8
1440	ldd	[%o0 + 0x28], %f10
1441	ldd	[%o0 + 0x30], %f12
1442	ldd	[%o0 + 0x38], %f14
1443	ldd	[%o0 + 0x40], %f16
1444	ldd	[%o0 + 0x48], %f18
1445	ldd	[%o0 + 0x50], %f20
1446	ldd	[%o0 + 0x58], %f22
1447	ldd	[%o0 + 0x60], %f24
1448	ldd	[%o0 + 0x68], %f26
1449	ldd	[%o0 + 0x70], %f28
1450	ldd	[%o0 + 0x78], %f30
1451	ld	[%o1], %fsr
1452	retl
1453	 nop
1454
1455	/* __ndelay and __udelay take two arguments:
1456	 * 0 - nsecs or usecs to delay
1457	 * 1 - per_cpu udelay_val (loops per jiffy)
1458	 *
1459	 * Note that ndelay gives HZ times higher resolution but has a 10ms
1460	 * limit.  udelay can handle up to 1s.
1461	 */
1462	.globl	__ndelay
1463__ndelay:
1464	save	%sp, -STACKFRAME_SZ, %sp
1465	mov	%i0, %o0
1466	call	.umul			! round multiplier up so large ns ok
1467	 mov	0x1ae, %o1		! 2**32 / (1 000 000 000 / HZ)
1468	call	.umul
1469	 mov	%i1, %o1		! udelay_val
1470	ba	delay_continue
1471	 mov	%o1, %o0		! >>32 later for better resolution
1472
1473	.globl	__udelay
1474__udelay:
1475	save	%sp, -STACKFRAME_SZ, %sp
1476	mov	%i0, %o0
1477	sethi	%hi(0x10c7), %o1	! round multiplier up so large us ok
1478	call	.umul
1479	 or	%o1, %lo(0x10c7), %o1	! 2**32 / 1 000 000
1480	call	.umul
1481	 mov	%i1, %o1		! udelay_val
1482	sethi	%hi(0x028f4b62), %l0	! Add in rounding constant * 2**32,
1483	or	%g0, %lo(0x028f4b62), %l0
1484	addcc	%o0, %l0, %o0		! 2**32 * 0.009 999
1485	bcs,a	3f
1486	 add	%o1, 0x01, %o1
14873:
1488	call	.umul
1489	 mov	HZ, %o0			! >>32 earlier for wider range
1490
1491delay_continue:
1492	cmp	%o0, 0x0
14931:
1494	bne	1b
1495	 subcc	%o0, 1, %o0
1496
1497	ret
1498	restore
1499
1500	/* Handle a software breakpoint */
1501	/* We have to inform parent that child has stopped */
1502	.align 4
1503	.globl breakpoint_trap
1504breakpoint_trap:
1505	rd	%wim,%l3
1506	SAVE_ALL
1507	wr 	%l0, PSR_ET, %psr
1508	WRITE_PAUSE
1509
1510	st	%i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1511	call	sparc_breakpoint
1512	 add	%sp, STACKFRAME_SZ, %o0
1513
1514	RESTORE_ALL
1515
1516#ifdef CONFIG_KGDB
1517	.align	4
1518	.globl	kgdb_trap_low
1519	.type	kgdb_trap_low,#function
1520kgdb_trap_low:
1521	rd	%wim,%l3
1522	SAVE_ALL
1523	wr 	%l0, PSR_ET, %psr
1524	WRITE_PAUSE
1525
1526	call	kgdb_trap
1527	 add	%sp, STACKFRAME_SZ, %o0
1528
1529	RESTORE_ALL
1530	.size	kgdb_trap_low,.-kgdb_trap_low
1531#endif
1532
1533	.align	4
1534	.globl	flush_patch_exception
1535flush_patch_exception:
1536	FLUSH_ALL_KERNEL_WINDOWS;
1537	ldd	[%o0], %o6
1538	jmpl	%o7 + 0xc, %g0			! see asm-sparc/processor.h
1539	 mov	1, %g1				! signal EFAULT condition
1540
1541	.align	4
1542	.globl	kill_user_windows, kuw_patch1_7win
1543	.globl	kuw_patch1
1544kuw_patch1_7win:	sll	%o3, 6, %o3
1545
1546	/* No matter how much overhead this routine has in the worst
1547	 * case scenerio, it is several times better than taking the
1548	 * traps with the old method of just doing flush_user_windows().
1549	 */
1550kill_user_windows:
1551	ld	[%g6 + TI_UWINMASK], %o0	! get current umask
1552	orcc	%g0, %o0, %g0			! if no bits set, we are done
1553	be	3f				! nothing to do
1554	 rd	%psr, %o5			! must clear interrupts
1555	or	%o5, PSR_PIL, %o4		! or else that could change
1556	wr	%o4, 0x0, %psr			! the uwinmask state
1557	WRITE_PAUSE				! burn them cycles
15581:
1559	ld	[%g6 + TI_UWINMASK], %o0	! get consistent state
1560	orcc	%g0, %o0, %g0			! did an interrupt come in?
1561	be	4f				! yep, we are done
1562	 rd	%wim, %o3			! get current wim
1563	srl	%o3, 1, %o4			! simulate a save
1564kuw_patch1:
1565	sll	%o3, 7, %o3			! compute next wim
1566	or	%o4, %o3, %o3			! result
1567	andncc	%o0, %o3, %o0			! clean this bit in umask
1568	bne	kuw_patch1			! not done yet
1569	 srl	%o3, 1, %o4			! begin another save simulation
1570	wr	%o3, 0x0, %wim			! set the new wim
1571	st	%g0, [%g6 + TI_UWINMASK]	! clear uwinmask
15724:
1573	wr	%o5, 0x0, %psr			! re-enable interrupts
1574	WRITE_PAUSE				! burn baby burn
15753:
1576	retl					! return
1577	 st	%g0, [%g6 + TI_W_SAVED]		! no windows saved
1578
1579	.align	4
1580	.globl	restore_current
1581restore_current:
1582	LOAD_CURRENT(g6, o0)
1583	retl
1584	 nop
1585
1586#ifdef CONFIG_PCI
1587#include <asm/pcic.h>
1588
1589	.align	4
1590	.globl	linux_trap_ipi15_pcic
1591linux_trap_ipi15_pcic:
1592	rd	%wim, %l3
1593	SAVE_ALL
1594
1595	/*
1596	 * First deactivate NMI
1597	 * or we cannot drop ET, cannot get window spill traps.
1598	 * The busy loop is necessary because the PIO error
1599	 * sometimes does not go away quickly and we trap again.
1600	 */
1601	sethi	%hi(pcic_regs), %o1
1602	ld	[%o1 + %lo(pcic_regs)], %o2
1603
1604	! Get pending status for printouts later.
1605	ld	[%o2 + PCI_SYS_INT_PENDING], %o0
1606
1607	mov	PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1608	stb	%o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
16091:
1610	ld	[%o2 + PCI_SYS_INT_PENDING], %o1
1611	andcc	%o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1612	bne	1b
1613	 nop
1614
1615	or	%l0, PSR_PIL, %l4
1616	wr	%l4, 0x0, %psr
1617	WRITE_PAUSE
1618	wr	%l4, PSR_ET, %psr
1619	WRITE_PAUSE
1620
1621	call	pcic_nmi
1622	 add	%sp, STACKFRAME_SZ, %o1	! struct pt_regs *regs
1623	RESTORE_ALL
1624
1625	.globl	pcic_nmi_trap_patch
1626pcic_nmi_trap_patch:
1627	sethi	%hi(linux_trap_ipi15_pcic), %l3
1628	jmpl	%l3 + %lo(linux_trap_ipi15_pcic), %g0
1629	 rd	%psr, %l0
1630	.word	0
1631
1632#endif /* CONFIG_PCI */
1633
1634	.globl	flushw_all
1635flushw_all:
1636	save	%sp, -0x40, %sp
1637	save	%sp, -0x40, %sp
1638	save	%sp, -0x40, %sp
1639	save	%sp, -0x40, %sp
1640	save	%sp, -0x40, %sp
1641	save	%sp, -0x40, %sp
1642	save	%sp, -0x40, %sp
1643	restore
1644	restore
1645	restore
1646	restore
1647	restore
1648	restore
1649	ret
1650	 restore
1651
1652/* End of entry.S */
1653