1/* SPDX-License-Identifier: GPL-2.0 */ 2/* arch/sparc/kernel/entry.S: Sparc trap low-level entry points. 3 * 4 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) 5 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 7 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 8 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au) 9 */ 10 11#include <linux/linkage.h> 12#include <linux/errno.h> 13#include <linux/pgtable.h> 14 15#include <asm/head.h> 16#include <asm/asi.h> 17#include <asm/smp.h> 18#include <asm/contregs.h> 19#include <asm/ptrace.h> 20#include <asm/asm-offsets.h> 21#include <asm/psr.h> 22#include <asm/vaddrs.h> 23#include <asm/page.h> 24#include <asm/winmacro.h> 25#include <asm/signal.h> 26#include <asm/obio.h> 27#include <asm/mxcc.h> 28#include <asm/thread_info.h> 29#include <asm/param.h> 30#include <asm/unistd.h> 31 32#include <asm/asmmacro.h> 33#include <asm/export.h> 34 35#define curptr g6 36 37/* These are just handy. */ 38#define _SV save %sp, -STACKFRAME_SZ, %sp 39#define _RS restore 40 41#define FLUSH_ALL_KERNEL_WINDOWS \ 42 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \ 43 _RS; _RS; _RS; _RS; _RS; _RS; _RS; 44 45 .text 46 47#ifdef CONFIG_KGDB 48 .align 4 49 .globl arch_kgdb_breakpoint 50 .type arch_kgdb_breakpoint,#function 51arch_kgdb_breakpoint: 52 ta 0x7d 53 retl 54 nop 55 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint 56#endif 57 58#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE) 59 .align 4 60 .globl floppy_hardint 61floppy_hardint: 62 /* 63 * This code cannot touch registers %l0 %l1 and %l2 64 * because SAVE_ALL depends on their values. It depends 65 * on %l3 also, but we regenerate it before a call. 66 * Other registers are: 67 * %l3 -- base address of fdc registers 68 * %l4 -- pdma_vaddr 69 * %l5 -- scratch for ld/st address 70 * %l6 -- pdma_size 71 * %l7 -- scratch [floppy byte, ld/st address, aux. data] 72 */ 73 74 /* Do we have work to do? */ 75 sethi %hi(doing_pdma), %l7 76 ld [%l7 + %lo(doing_pdma)], %l7 77 cmp %l7, 0 78 be floppy_dosoftint 79 nop 80 81 /* Load fdc register base */ 82 sethi %hi(fdc_status), %l3 83 ld [%l3 + %lo(fdc_status)], %l3 84 85 /* Setup register addresses */ 86 sethi %hi(pdma_vaddr), %l5 ! transfer buffer 87 ld [%l5 + %lo(pdma_vaddr)], %l4 88 sethi %hi(pdma_size), %l5 ! bytes to go 89 ld [%l5 + %lo(pdma_size)], %l6 90next_byte: 91 ldub [%l3], %l7 92 93 andcc %l7, 0x80, %g0 ! Does fifo still have data 94 bz floppy_fifo_emptied ! fifo has been emptied... 95 andcc %l7, 0x20, %g0 ! in non-dma mode still? 96 bz floppy_overrun ! nope, overrun 97 andcc %l7, 0x40, %g0 ! 0=write 1=read 98 bz floppy_write 99 sub %l6, 0x1, %l6 100 101 /* Ok, actually read this byte */ 102 ldub [%l3 + 1], %l7 103 orcc %g0, %l6, %g0 104 stb %l7, [%l4] 105 bne next_byte 106 add %l4, 0x1, %l4 107 108 b floppy_tdone 109 nop 110 111floppy_write: 112 /* Ok, actually write this byte */ 113 ldub [%l4], %l7 114 orcc %g0, %l6, %g0 115 stb %l7, [%l3 + 1] 116 bne next_byte 117 add %l4, 0x1, %l4 118 119 /* fall through... */ 120floppy_tdone: 121 sethi %hi(pdma_vaddr), %l5 122 st %l4, [%l5 + %lo(pdma_vaddr)] 123 sethi %hi(pdma_size), %l5 124 st %l6, [%l5 + %lo(pdma_size)] 125 /* Flip terminal count pin */ 126 set auxio_register, %l7 127 ld [%l7], %l7 128 129 ldub [%l7], %l5 130 131 or %l5, 0xc2, %l5 132 stb %l5, [%l7] 133 andn %l5, 0x02, %l5 134 1352: 136 /* Kill some time so the bits set */ 137 WRITE_PAUSE 138 WRITE_PAUSE 139 140 stb %l5, [%l7] 141 142 /* Prevent recursion */ 143 sethi %hi(doing_pdma), %l7 144 b floppy_dosoftint 145 st %g0, [%l7 + %lo(doing_pdma)] 146 147 /* We emptied the FIFO, but we haven't read everything 148 * as of yet. Store the current transfer address and 149 * bytes left to read so we can continue when the next 150 * fast IRQ comes in. 151 */ 152floppy_fifo_emptied: 153 sethi %hi(pdma_vaddr), %l5 154 st %l4, [%l5 + %lo(pdma_vaddr)] 155 sethi %hi(pdma_size), %l7 156 st %l6, [%l7 + %lo(pdma_size)] 157 158 /* Restore condition codes */ 159 wr %l0, 0x0, %psr 160 WRITE_PAUSE 161 162 jmp %l1 163 rett %l2 164 165floppy_overrun: 166 sethi %hi(pdma_vaddr), %l5 167 st %l4, [%l5 + %lo(pdma_vaddr)] 168 sethi %hi(pdma_size), %l5 169 st %l6, [%l5 + %lo(pdma_size)] 170 /* Prevent recursion */ 171 sethi %hi(doing_pdma), %l7 172 st %g0, [%l7 + %lo(doing_pdma)] 173 174 /* fall through... */ 175floppy_dosoftint: 176 rd %wim, %l3 177 SAVE_ALL 178 179 /* Set all IRQs off. */ 180 or %l0, PSR_PIL, %l4 181 wr %l4, 0x0, %psr 182 WRITE_PAUSE 183 wr %l4, PSR_ET, %psr 184 WRITE_PAUSE 185 186 mov 11, %o0 ! floppy irq level (unused anyway) 187 mov %g0, %o1 ! devid is not used in fast interrupts 188 call sparc_floppy_irq 189 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs 190 191 RESTORE_ALL 192 193#endif /* (CONFIG_BLK_DEV_FD) */ 194 195 /* Bad trap handler */ 196 .globl bad_trap_handler 197bad_trap_handler: 198 SAVE_ALL 199 200 wr %l0, PSR_ET, %psr 201 WRITE_PAUSE 202 203 add %sp, STACKFRAME_SZ, %o0 ! pt_regs 204 call do_hw_interrupt 205 mov %l7, %o1 ! trap number 206 207 RESTORE_ALL 208 209/* For now all IRQ's not registered get sent here. handler_irq() will 210 * see if a routine is registered to handle this interrupt and if not 211 * it will say so on the console. 212 */ 213 214 .align 4 215 .globl real_irq_entry, patch_handler_irq 216real_irq_entry: 217 SAVE_ALL 218 219#ifdef CONFIG_SMP 220 .globl patchme_maybe_smp_msg 221 222 cmp %l7, 11 223patchme_maybe_smp_msg: 224 bgu maybe_smp4m_msg 225 nop 226#endif 227 228real_irq_continue: 229 or %l0, PSR_PIL, %g2 230 wr %g2, 0x0, %psr 231 WRITE_PAUSE 232 wr %g2, PSR_ET, %psr 233 WRITE_PAUSE 234 mov %l7, %o0 ! irq level 235patch_handler_irq: 236 call handler_irq 237 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr 238 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq 239 wr %g2, PSR_ET, %psr ! keep ET up 240 WRITE_PAUSE 241 242 RESTORE_ALL 243 244#ifdef CONFIG_SMP 245 /* SMP per-cpu ticker interrupts are handled specially. */ 246smp4m_ticker: 247 bne real_irq_continue+4 248 or %l0, PSR_PIL, %g2 249 wr %g2, 0x0, %psr 250 WRITE_PAUSE 251 wr %g2, PSR_ET, %psr 252 WRITE_PAUSE 253 call smp4m_percpu_timer_interrupt 254 add %sp, STACKFRAME_SZ, %o0 255 wr %l0, PSR_ET, %psr 256 WRITE_PAUSE 257 RESTORE_ALL 258 259#define GET_PROCESSOR4M_ID(reg) \ 260 rd %tbr, %reg; \ 261 srl %reg, 12, %reg; \ 262 and %reg, 3, %reg; 263 264 /* Here is where we check for possible SMP IPI passed to us 265 * on some level other than 15 which is the NMI and only used 266 * for cross calls. That has a separate entry point below. 267 * 268 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*. 269 */ 270maybe_smp4m_msg: 271 GET_PROCESSOR4M_ID(o3) 272 sethi %hi(sun4m_irq_percpu), %l5 273 sll %o3, 2, %o3 274 or %l5, %lo(sun4m_irq_percpu), %o5 275 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs 276 ld [%o5 + %o3], %o1 277 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending 278 andcc %o3, %o2, %g0 279 be,a smp4m_ticker 280 cmp %l7, 14 281 /* Soft-IRQ IPI */ 282 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000 283 WRITE_PAUSE 284 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending 285 WRITE_PAUSE 286 or %l0, PSR_PIL, %l4 287 wr %l4, 0x0, %psr 288 WRITE_PAUSE 289 wr %l4, PSR_ET, %psr 290 WRITE_PAUSE 291 srl %o3, 28, %o2 ! shift for simpler checks below 292maybe_smp4m_msg_check_single: 293 andcc %o2, 0x1, %g0 294 beq,a maybe_smp4m_msg_check_mask 295 andcc %o2, 0x2, %g0 296 call smp_call_function_single_interrupt 297 nop 298 andcc %o2, 0x2, %g0 299maybe_smp4m_msg_check_mask: 300 beq,a maybe_smp4m_msg_check_resched 301 andcc %o2, 0x4, %g0 302 call smp_call_function_interrupt 303 nop 304 andcc %o2, 0x4, %g0 305maybe_smp4m_msg_check_resched: 306 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */ 307 beq,a maybe_smp4m_msg_out 308 nop 309 call smp_resched_interrupt 310 nop 311maybe_smp4m_msg_out: 312 RESTORE_ALL 313 314 .align 4 315 .globl linux_trap_ipi15_sun4m 316linux_trap_ipi15_sun4m: 317 SAVE_ALL 318 sethi %hi(0x80000000), %o2 319 GET_PROCESSOR4M_ID(o0) 320 sethi %hi(sun4m_irq_percpu), %l5 321 or %l5, %lo(sun4m_irq_percpu), %o5 322 sll %o0, 2, %o0 323 ld [%o5 + %o0], %o5 324 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending 325 andcc %o3, %o2, %g0 326 be sun4m_nmi_error ! Must be an NMI async memory error 327 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000 328 WRITE_PAUSE 329 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending 330 WRITE_PAUSE 331 or %l0, PSR_PIL, %l4 332 wr %l4, 0x0, %psr 333 WRITE_PAUSE 334 wr %l4, PSR_ET, %psr 335 WRITE_PAUSE 336 call smp4m_cross_call_irq 337 nop 338 b ret_trap_lockless_ipi 339 clr %l6 340 341 .globl smp4d_ticker 342 /* SMP per-cpu ticker interrupts are handled specially. */ 343smp4d_ticker: 344 SAVE_ALL 345 or %l0, PSR_PIL, %g2 346 sethi %hi(CC_ICLR), %o0 347 sethi %hi(1 << 14), %o1 348 or %o0, %lo(CC_ICLR), %o0 349 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */ 350 wr %g2, 0x0, %psr 351 WRITE_PAUSE 352 wr %g2, PSR_ET, %psr 353 WRITE_PAUSE 354 call smp4d_percpu_timer_interrupt 355 add %sp, STACKFRAME_SZ, %o0 356 wr %l0, PSR_ET, %psr 357 WRITE_PAUSE 358 RESTORE_ALL 359 360 .align 4 361 .globl linux_trap_ipi15_sun4d 362linux_trap_ipi15_sun4d: 363 SAVE_ALL 364 sethi %hi(CC_BASE), %o4 365 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2 366 or %o4, (CC_EREG - CC_BASE), %o0 367 ldda [%o0] ASI_M_MXCC, %o0 368 andcc %o0, %o2, %g0 369 bne 1f 370 sethi %hi(BB_STAT2), %o2 371 lduba [%o2] ASI_M_CTL, %o2 372 andcc %o2, BB_STAT2_MASK, %g0 373 bne 2f 374 or %o4, (CC_ICLR - CC_BASE), %o0 375 sethi %hi(1 << 15), %o1 376 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */ 377 or %l0, PSR_PIL, %l4 378 wr %l4, 0x0, %psr 379 WRITE_PAUSE 380 wr %l4, PSR_ET, %psr 381 WRITE_PAUSE 382 call smp4d_cross_call_irq 383 nop 384 b ret_trap_lockless_ipi 385 clr %l6 386 3871: /* MXCC error */ 3882: /* BB error */ 389 /* Disable PIL 15 */ 390 set CC_IMSK, %l4 391 lduha [%l4] ASI_M_MXCC, %l5 392 sethi %hi(1 << 15), %l7 393 or %l5, %l7, %l5 394 stha %l5, [%l4] ASI_M_MXCC 395 /* FIXME */ 3961: b,a 1b 397 398 .globl smpleon_ipi 399 .extern leon_ipi_interrupt 400 /* SMP per-cpu IPI interrupts are handled specially. */ 401smpleon_ipi: 402 SAVE_ALL 403 or %l0, PSR_PIL, %g2 404 wr %g2, 0x0, %psr 405 WRITE_PAUSE 406 wr %g2, PSR_ET, %psr 407 WRITE_PAUSE 408 call leonsmp_ipi_interrupt 409 add %sp, STACKFRAME_SZ, %o1 ! pt_regs 410 wr %l0, PSR_ET, %psr 411 WRITE_PAUSE 412 RESTORE_ALL 413 414 .align 4 415 .globl linux_trap_ipi15_leon 416linux_trap_ipi15_leon: 417 SAVE_ALL 418 or %l0, PSR_PIL, %l4 419 wr %l4, 0x0, %psr 420 WRITE_PAUSE 421 wr %l4, PSR_ET, %psr 422 WRITE_PAUSE 423 call leon_cross_call_irq 424 nop 425 b ret_trap_lockless_ipi 426 clr %l6 427 428#endif /* CONFIG_SMP */ 429 430 /* This routine handles illegal instructions and privileged 431 * instruction attempts from user code. 432 */ 433 .align 4 434 .globl bad_instruction 435bad_instruction: 436 sethi %hi(0xc1f80000), %l4 437 ld [%l1], %l5 438 sethi %hi(0x81d80000), %l7 439 and %l5, %l4, %l5 440 cmp %l5, %l7 441 be 1f 442 SAVE_ALL 443 444 wr %l0, PSR_ET, %psr ! re-enable traps 445 WRITE_PAUSE 446 447 add %sp, STACKFRAME_SZ, %o0 448 mov %l1, %o1 449 mov %l2, %o2 450 call do_illegal_instruction 451 mov %l0, %o3 452 453 RESTORE_ALL 454 4551: /* unimplemented flush - just skip */ 456 jmpl %l2, %g0 457 rett %l2 + 4 458 459 .align 4 460 .globl priv_instruction 461priv_instruction: 462 SAVE_ALL 463 464 wr %l0, PSR_ET, %psr 465 WRITE_PAUSE 466 467 add %sp, STACKFRAME_SZ, %o0 468 mov %l1, %o1 469 mov %l2, %o2 470 call do_priv_instruction 471 mov %l0, %o3 472 473 RESTORE_ALL 474 475 /* This routine handles unaligned data accesses. */ 476 .align 4 477 .globl mna_handler 478mna_handler: 479 andcc %l0, PSR_PS, %g0 480 be mna_fromuser 481 nop 482 483 SAVE_ALL 484 485 wr %l0, PSR_ET, %psr 486 WRITE_PAUSE 487 488 ld [%l1], %o1 489 call kernel_unaligned_trap 490 add %sp, STACKFRAME_SZ, %o0 491 492 RESTORE_ALL 493 494mna_fromuser: 495 SAVE_ALL 496 497 wr %l0, PSR_ET, %psr ! re-enable traps 498 WRITE_PAUSE 499 500 ld [%l1], %o1 501 call user_unaligned_trap 502 add %sp, STACKFRAME_SZ, %o0 503 504 RESTORE_ALL 505 506 /* This routine handles floating point disabled traps. */ 507 .align 4 508 .globl fpd_trap_handler 509fpd_trap_handler: 510 SAVE_ALL 511 512 wr %l0, PSR_ET, %psr ! re-enable traps 513 WRITE_PAUSE 514 515 add %sp, STACKFRAME_SZ, %o0 516 mov %l1, %o1 517 mov %l2, %o2 518 call do_fpd_trap 519 mov %l0, %o3 520 521 RESTORE_ALL 522 523 /* This routine handles Floating Point Exceptions. */ 524 .align 4 525 .globl fpe_trap_handler 526fpe_trap_handler: 527 set fpsave_magic, %l5 528 cmp %l1, %l5 529 be 1f 530 sethi %hi(fpsave), %l5 531 or %l5, %lo(fpsave), %l5 532 cmp %l1, %l5 533 bne 2f 534 sethi %hi(fpsave_catch2), %l5 535 or %l5, %lo(fpsave_catch2), %l5 536 wr %l0, 0x0, %psr 537 WRITE_PAUSE 538 jmp %l5 539 rett %l5 + 4 5401: 541 sethi %hi(fpsave_catch), %l5 542 or %l5, %lo(fpsave_catch), %l5 543 wr %l0, 0x0, %psr 544 WRITE_PAUSE 545 jmp %l5 546 rett %l5 + 4 547 5482: 549 SAVE_ALL 550 551 wr %l0, PSR_ET, %psr ! re-enable traps 552 WRITE_PAUSE 553 554 add %sp, STACKFRAME_SZ, %o0 555 mov %l1, %o1 556 mov %l2, %o2 557 call do_fpe_trap 558 mov %l0, %o3 559 560 RESTORE_ALL 561 562 /* This routine handles Tag Overflow Exceptions. */ 563 .align 4 564 .globl do_tag_overflow 565do_tag_overflow: 566 SAVE_ALL 567 568 wr %l0, PSR_ET, %psr ! re-enable traps 569 WRITE_PAUSE 570 571 add %sp, STACKFRAME_SZ, %o0 572 mov %l1, %o1 573 mov %l2, %o2 574 call handle_tag_overflow 575 mov %l0, %o3 576 577 RESTORE_ALL 578 579 /* This routine handles Watchpoint Exceptions. */ 580 .align 4 581 .globl do_watchpoint 582do_watchpoint: 583 SAVE_ALL 584 585 wr %l0, PSR_ET, %psr ! re-enable traps 586 WRITE_PAUSE 587 588 add %sp, STACKFRAME_SZ, %o0 589 mov %l1, %o1 590 mov %l2, %o2 591 call handle_watchpoint 592 mov %l0, %o3 593 594 RESTORE_ALL 595 596 /* This routine handles Register Access Exceptions. */ 597 .align 4 598 .globl do_reg_access 599do_reg_access: 600 SAVE_ALL 601 602 wr %l0, PSR_ET, %psr ! re-enable traps 603 WRITE_PAUSE 604 605 add %sp, STACKFRAME_SZ, %o0 606 mov %l1, %o1 607 mov %l2, %o2 608 call handle_reg_access 609 mov %l0, %o3 610 611 RESTORE_ALL 612 613 /* This routine handles Co-Processor Disabled Exceptions. */ 614 .align 4 615 .globl do_cp_disabled 616do_cp_disabled: 617 SAVE_ALL 618 619 wr %l0, PSR_ET, %psr ! re-enable traps 620 WRITE_PAUSE 621 622 add %sp, STACKFRAME_SZ, %o0 623 mov %l1, %o1 624 mov %l2, %o2 625 call handle_cp_disabled 626 mov %l0, %o3 627 628 RESTORE_ALL 629 630 /* This routine handles Co-Processor Exceptions. */ 631 .align 4 632 .globl do_cp_exception 633do_cp_exception: 634 SAVE_ALL 635 636 wr %l0, PSR_ET, %psr ! re-enable traps 637 WRITE_PAUSE 638 639 add %sp, STACKFRAME_SZ, %o0 640 mov %l1, %o1 641 mov %l2, %o2 642 call handle_cp_exception 643 mov %l0, %o3 644 645 RESTORE_ALL 646 647 /* This routine handles Hardware Divide By Zero Exceptions. */ 648 .align 4 649 .globl do_hw_divzero 650do_hw_divzero: 651 SAVE_ALL 652 653 wr %l0, PSR_ET, %psr ! re-enable traps 654 WRITE_PAUSE 655 656 add %sp, STACKFRAME_SZ, %o0 657 mov %l1, %o1 658 mov %l2, %o2 659 call handle_hw_divzero 660 mov %l0, %o3 661 662 RESTORE_ALL 663 664 .align 4 665 .globl do_flush_windows 666do_flush_windows: 667 SAVE_ALL 668 669 wr %l0, PSR_ET, %psr 670 WRITE_PAUSE 671 672 andcc %l0, PSR_PS, %g0 673 bne dfw_kernel 674 nop 675 676 call flush_user_windows 677 nop 678 679 /* Advance over the trap instruction. */ 680 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 681 add %l1, 0x4, %l2 682 st %l1, [%sp + STACKFRAME_SZ + PT_PC] 683 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 684 685 RESTORE_ALL 686 687 .globl flush_patch_one 688 689 /* We get these for debugging routines using __builtin_return_address() */ 690dfw_kernel: 691flush_patch_one: 692 FLUSH_ALL_KERNEL_WINDOWS 693 694 /* Advance over the trap instruction. */ 695 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 696 add %l1, 0x4, %l2 697 st %l1, [%sp + STACKFRAME_SZ + PT_PC] 698 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 699 700 RESTORE_ALL 701 702 /* The getcc software trap. The user wants the condition codes from 703 * the %psr in register %g1. 704 */ 705 706 .align 4 707 .globl getcc_trap_handler 708getcc_trap_handler: 709 srl %l0, 20, %g1 ! give user 710 and %g1, 0xf, %g1 ! only ICC bits in %psr 711 jmp %l2 ! advance over trap instruction 712 rett %l2 + 0x4 ! like this... 713 714 /* The setcc software trap. The user has condition codes in %g1 715 * that it would like placed in the %psr. Be careful not to flip 716 * any unintentional bits! 717 */ 718 719 .align 4 720 .globl setcc_trap_handler 721setcc_trap_handler: 722 sll %g1, 0x14, %l4 723 set PSR_ICC, %l5 724 andn %l0, %l5, %l0 ! clear ICC bits in %psr 725 and %l4, %l5, %l4 ! clear non-ICC bits in user value 726 or %l4, %l0, %l4 ! or them in... mix mix mix 727 728 wr %l4, 0x0, %psr ! set new %psr 729 WRITE_PAUSE ! TI scumbags... 730 731 jmp %l2 ! advance over trap instruction 732 rett %l2 + 0x4 ! like this... 733 734sun4m_nmi_error: 735 /* NMI async memory error handling. */ 736 sethi %hi(0x80000000), %l4 737 sethi %hi(sun4m_irq_global), %o5 738 ld [%o5 + %lo(sun4m_irq_global)], %l5 739 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000 740 WRITE_PAUSE 741 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending 742 WRITE_PAUSE 743 or %l0, PSR_PIL, %l4 744 wr %l4, 0x0, %psr 745 WRITE_PAUSE 746 wr %l4, PSR_ET, %psr 747 WRITE_PAUSE 748 call sun4m_nmi 749 nop 750 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000 751 WRITE_PAUSE 752 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending 753 WRITE_PAUSE 754 RESTORE_ALL 755 756#ifndef CONFIG_SMP 757 .align 4 758 .globl linux_trap_ipi15_sun4m 759linux_trap_ipi15_sun4m: 760 SAVE_ALL 761 762 ba sun4m_nmi_error 763 nop 764#endif /* CONFIG_SMP */ 765 766 .align 4 767 .globl srmmu_fault 768srmmu_fault: 769 mov 0x400, %l5 770 mov 0x300, %l4 771 772LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first 773SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first 774 775LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last 776SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last 777 778 andn %l6, 0xfff, %l6 779 srl %l5, 6, %l5 ! and encode all info into l7 780 781 and %l5, 2, %l5 782 or %l5, %l6, %l6 783 784 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault] 785 786 SAVE_ALL 787 788 mov %l7, %o1 789 mov %l7, %o2 790 and %o1, 1, %o1 ! arg2 = text_faultp 791 mov %l7, %o3 792 and %o2, 2, %o2 ! arg3 = writep 793 andn %o3, 0xfff, %o3 ! arg4 = faulting address 794 795 wr %l0, PSR_ET, %psr 796 WRITE_PAUSE 797 798 call do_sparc_fault 799 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr 800 801 RESTORE_ALL 802 803 .align 4 804sunos_execv: 805 .globl sunos_execv 806 b sys_execve 807 clr %i2 808 809 .align 4 810 .globl sys_sigstack 811sys_sigstack: 812 mov %o7, %l5 813 mov %fp, %o2 814 call do_sys_sigstack 815 mov %l5, %o7 816 817 .align 4 818 .globl sys_sigreturn 819sys_sigreturn: 820 call do_sigreturn 821 add %sp, STACKFRAME_SZ, %o0 822 823 ld [%curptr + TI_FLAGS], %l5 824 andcc %l5, _TIF_SYSCALL_TRACE, %g0 825 be 1f 826 nop 827 828 call syscall_trace 829 mov 1, %o1 830 8311: 832 /* We don't want to muck with user registers like a 833 * normal syscall, just return. 834 */ 835 RESTORE_ALL 836 837 .align 4 838 .globl sys_rt_sigreturn 839sys_rt_sigreturn: 840 call do_rt_sigreturn 841 add %sp, STACKFRAME_SZ, %o0 842 843 ld [%curptr + TI_FLAGS], %l5 844 andcc %l5, _TIF_SYSCALL_TRACE, %g0 845 be 1f 846 nop 847 848 add %sp, STACKFRAME_SZ, %o0 849 call syscall_trace 850 mov 1, %o1 851 8521: 853 /* We are returning to a signal handler. */ 854 RESTORE_ALL 855 856 /* Now that we have a real sys_clone, sys_fork() is 857 * implemented in terms of it. Our _real_ implementation 858 * of SunOS vfork() will use sys_vfork(). 859 * 860 * XXX These three should be consolidated into mostly shared 861 * XXX code just like on sparc64... -DaveM 862 */ 863 .align 4 864 .globl sys_fork, flush_patch_two 865sys_fork: 866 mov %o7, %l5 867flush_patch_two: 868 FLUSH_ALL_KERNEL_WINDOWS; 869 ld [%curptr + TI_TASK], %o4 870 rd %psr, %g4 871 WRITE_PAUSE 872 mov SIGCHLD, %o0 ! arg0: clone flags 873 rd %wim, %g5 874 WRITE_PAUSE 875 mov %fp, %o1 ! arg1: usp 876 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr] 877 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr 878 mov 0, %o3 879 call sparc_do_fork 880 mov %l5, %o7 881 882 /* Whee, kernel threads! */ 883 .globl sys_clone, flush_patch_three 884sys_clone: 885 mov %o7, %l5 886flush_patch_three: 887 FLUSH_ALL_KERNEL_WINDOWS; 888 ld [%curptr + TI_TASK], %o4 889 rd %psr, %g4 890 WRITE_PAUSE 891 892 /* arg0,1: flags,usp -- loaded already */ 893 cmp %o1, 0x0 ! Is new_usp NULL? 894 rd %wim, %g5 895 WRITE_PAUSE 896 be,a 1f 897 mov %fp, %o1 ! yes, use callers usp 898 andn %o1, 7, %o1 ! no, align to 8 bytes 8991: 900 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr] 901 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr 902 mov 0, %o3 903 call sparc_do_fork 904 mov %l5, %o7 905 906 /* Whee, real vfork! */ 907 .globl sys_vfork, flush_patch_four 908sys_vfork: 909flush_patch_four: 910 FLUSH_ALL_KERNEL_WINDOWS; 911 ld [%curptr + TI_TASK], %o4 912 rd %psr, %g4 913 WRITE_PAUSE 914 rd %wim, %g5 915 WRITE_PAUSE 916 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr] 917 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0 918 mov %fp, %o1 919 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0 920 sethi %hi(sparc_do_fork), %l1 921 mov 0, %o3 922 jmpl %l1 + %lo(sparc_do_fork), %g0 923 add %sp, STACKFRAME_SZ, %o2 924 925 .align 4 926linux_sparc_ni_syscall: 927 sethi %hi(sys_ni_syscall), %l7 928 b do_syscall 929 or %l7, %lo(sys_ni_syscall), %l7 930 931linux_syscall_trace: 932 add %sp, STACKFRAME_SZ, %o0 933 call syscall_trace 934 mov 0, %o1 935 cmp %o0, 0 936 bne 3f 937 mov -ENOSYS, %o0 938 939 /* Syscall tracing can modify the registers. */ 940 ld [%sp + STACKFRAME_SZ + PT_G1], %g1 941 sethi %hi(sys_call_table), %l7 942 ld [%sp + STACKFRAME_SZ + PT_I0], %i0 943 or %l7, %lo(sys_call_table), %l7 944 ld [%sp + STACKFRAME_SZ + PT_I1], %i1 945 ld [%sp + STACKFRAME_SZ + PT_I2], %i2 946 ld [%sp + STACKFRAME_SZ + PT_I3], %i3 947 ld [%sp + STACKFRAME_SZ + PT_I4], %i4 948 ld [%sp + STACKFRAME_SZ + PT_I5], %i5 949 cmp %g1, NR_syscalls 950 bgeu 3f 951 mov -ENOSYS, %o0 952 953 sll %g1, 2, %l4 954 mov %i0, %o0 955 ld [%l7 + %l4], %l7 956 mov %i1, %o1 957 mov %i2, %o2 958 mov %i3, %o3 959 b 2f 960 mov %i4, %o4 961 962 .globl ret_from_fork 963ret_from_fork: 964 call schedule_tail 965 ld [%g3 + TI_TASK], %o0 966 b ret_sys_call 967 ld [%sp + STACKFRAME_SZ + PT_I0], %o0 968 969 .globl ret_from_kernel_thread 970ret_from_kernel_thread: 971 call schedule_tail 972 ld [%g3 + TI_TASK], %o0 973 ld [%sp + STACKFRAME_SZ + PT_G1], %l0 974 call %l0 975 ld [%sp + STACKFRAME_SZ + PT_G2], %o0 976 rd %psr, %l1 977 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0 978 andn %l0, PSR_CWP, %l0 979 nop 980 and %l1, PSR_CWP, %l1 981 or %l0, %l1, %l0 982 st %l0, [%sp + STACKFRAME_SZ + PT_PSR] 983 b ret_sys_call 984 mov 0, %o0 985 986 /* Linux native system calls enter here... */ 987 .align 4 988 .globl linux_sparc_syscall 989linux_sparc_syscall: 990 sethi %hi(PSR_SYSCALL), %l4 991 or %l0, %l4, %l0 992 /* Direct access to user regs, must faster. */ 993 cmp %g1, NR_syscalls 994 bgeu linux_sparc_ni_syscall 995 sll %g1, 2, %l4 996 ld [%l7 + %l4], %l7 997 998do_syscall: 999 SAVE_ALL_HEAD 1000 rd %wim, %l3 1001 1002 wr %l0, PSR_ET, %psr 1003 mov %i0, %o0 1004 mov %i1, %o1 1005 mov %i2, %o2 1006 1007 ld [%curptr + TI_FLAGS], %l5 1008 mov %i3, %o3 1009 andcc %l5, _TIF_SYSCALL_TRACE, %g0 1010 mov %i4, %o4 1011 bne linux_syscall_trace 1012 mov %i0, %l5 10132: 1014 call %l7 1015 mov %i5, %o5 1016 10173: 1018 st %o0, [%sp + STACKFRAME_SZ + PT_I0] 1019 1020ret_sys_call: 1021 ld [%curptr + TI_FLAGS], %l6 1022 cmp %o0, -ERESTART_RESTARTBLOCK 1023 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3 1024 set PSR_C, %g2 1025 bgeu 1f 1026 andcc %l6, _TIF_SYSCALL_TRACE, %g0 1027 1028 /* System call success, clear Carry condition code. */ 1029 andn %g3, %g2, %g3 1030 clr %l6 1031 st %g3, [%sp + STACKFRAME_SZ + PT_PSR] 1032 bne linux_syscall_trace2 1033 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */ 1034 add %l1, 0x4, %l2 /* npc = npc+4 */ 1035 st %l1, [%sp + STACKFRAME_SZ + PT_PC] 1036 b ret_trap_entry 1037 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 10381: 1039 /* System call failure, set Carry condition code. 1040 * Also, get abs(errno) to return to the process. 1041 */ 1042 sub %g0, %o0, %o0 1043 or %g3, %g2, %g3 1044 st %o0, [%sp + STACKFRAME_SZ + PT_I0] 1045 mov 1, %l6 1046 st %g3, [%sp + STACKFRAME_SZ + PT_PSR] 1047 bne linux_syscall_trace2 1048 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */ 1049 add %l1, 0x4, %l2 /* npc = npc+4 */ 1050 st %l1, [%sp + STACKFRAME_SZ + PT_PC] 1051 b ret_trap_entry 1052 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 1053 1054linux_syscall_trace2: 1055 add %sp, STACKFRAME_SZ, %o0 1056 mov 1, %o1 1057 call syscall_trace 1058 add %l1, 0x4, %l2 /* npc = npc+4 */ 1059 st %l1, [%sp + STACKFRAME_SZ + PT_PC] 1060 b ret_trap_entry 1061 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 1062 1063 1064/* Saving and restoring the FPU state is best done from lowlevel code. 1065 * 1066 * void fpsave(unsigned long *fpregs, unsigned long *fsr, 1067 * void *fpqueue, unsigned long *fpqdepth) 1068 */ 1069 1070 .globl fpsave 1071fpsave: 1072 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state 1073 ld [%o1], %g1 1074 set 0x2000, %g4 1075 andcc %g1, %g4, %g0 1076 be 2f 1077 mov 0, %g2 1078 1079 /* We have an fpqueue to save. */ 10801: 1081 std %fq, [%o2] 1082fpsave_magic: 1083 st %fsr, [%o1] 1084 ld [%o1], %g3 1085 andcc %g3, %g4, %g0 1086 add %g2, 1, %g2 1087 bne 1b 1088 add %o2, 8, %o2 1089 10902: 1091 st %g2, [%o3] 1092 1093 std %f0, [%o0 + 0x00] 1094 std %f2, [%o0 + 0x08] 1095 std %f4, [%o0 + 0x10] 1096 std %f6, [%o0 + 0x18] 1097 std %f8, [%o0 + 0x20] 1098 std %f10, [%o0 + 0x28] 1099 std %f12, [%o0 + 0x30] 1100 std %f14, [%o0 + 0x38] 1101 std %f16, [%o0 + 0x40] 1102 std %f18, [%o0 + 0x48] 1103 std %f20, [%o0 + 0x50] 1104 std %f22, [%o0 + 0x58] 1105 std %f24, [%o0 + 0x60] 1106 std %f26, [%o0 + 0x68] 1107 std %f28, [%o0 + 0x70] 1108 retl 1109 std %f30, [%o0 + 0x78] 1110 1111 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd 1112 * code for pointing out this possible deadlock, while we save state 1113 * above we could trap on the fsr store so our low level fpu trap 1114 * code has to know how to deal with this. 1115 */ 1116fpsave_catch: 1117 b fpsave_magic + 4 1118 st %fsr, [%o1] 1119 1120fpsave_catch2: 1121 b fpsave + 4 1122 st %fsr, [%o1] 1123 1124 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */ 1125 1126 .globl fpload 1127fpload: 1128 ldd [%o0 + 0x00], %f0 1129 ldd [%o0 + 0x08], %f2 1130 ldd [%o0 + 0x10], %f4 1131 ldd [%o0 + 0x18], %f6 1132 ldd [%o0 + 0x20], %f8 1133 ldd [%o0 + 0x28], %f10 1134 ldd [%o0 + 0x30], %f12 1135 ldd [%o0 + 0x38], %f14 1136 ldd [%o0 + 0x40], %f16 1137 ldd [%o0 + 0x48], %f18 1138 ldd [%o0 + 0x50], %f20 1139 ldd [%o0 + 0x58], %f22 1140 ldd [%o0 + 0x60], %f24 1141 ldd [%o0 + 0x68], %f26 1142 ldd [%o0 + 0x70], %f28 1143 ldd [%o0 + 0x78], %f30 1144 ld [%o1], %fsr 1145 retl 1146 nop 1147 1148 /* __ndelay and __udelay take two arguments: 1149 * 0 - nsecs or usecs to delay 1150 * 1 - per_cpu udelay_val (loops per jiffy) 1151 * 1152 * Note that ndelay gives HZ times higher resolution but has a 10ms 1153 * limit. udelay can handle up to 1s. 1154 */ 1155 .globl __ndelay 1156__ndelay: 1157 save %sp, -STACKFRAME_SZ, %sp 1158 mov %i0, %o0 ! round multiplier up so large ns ok 1159 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ) 1160 umul %o0, %o1, %o0 1161 rd %y, %o1 1162 mov %i1, %o1 ! udelay_val 1163 umul %o0, %o1, %o0 1164 rd %y, %o1 1165 ba delay_continue 1166 mov %o1, %o0 ! >>32 later for better resolution 1167 1168 .globl __udelay 1169__udelay: 1170 save %sp, -STACKFRAME_SZ, %sp 1171 mov %i0, %o0 1172 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok 1173 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000 1174 umul %o0, %o1, %o0 1175 rd %y, %o1 1176 mov %i1, %o1 ! udelay_val 1177 umul %o0, %o1, %o0 1178 rd %y, %o1 1179 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32, 1180 or %g0, %lo(0x028f4b62), %l0 1181 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999 1182 bcs,a 3f 1183 add %o1, 0x01, %o1 11843: 1185 mov HZ, %o0 ! >>32 earlier for wider range 1186 umul %o0, %o1, %o0 1187 rd %y, %o1 1188 1189delay_continue: 1190 cmp %o0, 0x0 11911: 1192 bne 1b 1193 subcc %o0, 1, %o0 1194 1195 ret 1196 restore 1197EXPORT_SYMBOL(__udelay) 1198EXPORT_SYMBOL(__ndelay) 1199 1200 /* Handle a software breakpoint */ 1201 /* We have to inform parent that child has stopped */ 1202 .align 4 1203 .globl breakpoint_trap 1204breakpoint_trap: 1205 rd %wim,%l3 1206 SAVE_ALL 1207 wr %l0, PSR_ET, %psr 1208 WRITE_PAUSE 1209 1210 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls 1211 call sparc_breakpoint 1212 add %sp, STACKFRAME_SZ, %o0 1213 1214 RESTORE_ALL 1215 1216#ifdef CONFIG_KGDB 1217 ENTRY(kgdb_trap_low) 1218 rd %wim,%l3 1219 SAVE_ALL 1220 wr %l0, PSR_ET, %psr 1221 WRITE_PAUSE 1222 1223 mov %l7, %o0 ! trap_level 1224 call kgdb_trap 1225 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs 1226 1227 RESTORE_ALL 1228 ENDPROC(kgdb_trap_low) 1229#endif 1230 1231 .align 4 1232 .globl flush_patch_exception 1233flush_patch_exception: 1234 FLUSH_ALL_KERNEL_WINDOWS; 1235 ldd [%o0], %o6 1236 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h 1237 mov 1, %g1 ! signal EFAULT condition 1238 1239 .align 4 1240 .globl kill_user_windows, kuw_patch1_7win 1241 .globl kuw_patch1 1242kuw_patch1_7win: sll %o3, 6, %o3 1243 1244 /* No matter how much overhead this routine has in the worst 1245 * case scenario, it is several times better than taking the 1246 * traps with the old method of just doing flush_user_windows(). 1247 */ 1248kill_user_windows: 1249 ld [%g6 + TI_UWINMASK], %o0 ! get current umask 1250 orcc %g0, %o0, %g0 ! if no bits set, we are done 1251 be 3f ! nothing to do 1252 rd %psr, %o5 ! must clear interrupts 1253 or %o5, PSR_PIL, %o4 ! or else that could change 1254 wr %o4, 0x0, %psr ! the uwinmask state 1255 WRITE_PAUSE ! burn them cycles 12561: 1257 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state 1258 orcc %g0, %o0, %g0 ! did an interrupt come in? 1259 be 4f ! yep, we are done 1260 rd %wim, %o3 ! get current wim 1261 srl %o3, 1, %o4 ! simulate a save 1262kuw_patch1: 1263 sll %o3, 7, %o3 ! compute next wim 1264 or %o4, %o3, %o3 ! result 1265 andncc %o0, %o3, %o0 ! clean this bit in umask 1266 bne kuw_patch1 ! not done yet 1267 srl %o3, 1, %o4 ! begin another save simulation 1268 wr %o3, 0x0, %wim ! set the new wim 1269 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask 12704: 1271 wr %o5, 0x0, %psr ! re-enable interrupts 1272 WRITE_PAUSE ! burn baby burn 12733: 1274 retl ! return 1275 st %g0, [%g6 + TI_W_SAVED] ! no windows saved 1276 1277 .align 4 1278 .globl restore_current 1279restore_current: 1280 LOAD_CURRENT(g6, o0) 1281 retl 1282 nop 1283 1284#ifdef CONFIG_PCIC_PCI 1285#include <asm/pcic.h> 1286 1287 .align 4 1288 .globl linux_trap_ipi15_pcic 1289linux_trap_ipi15_pcic: 1290 rd %wim, %l3 1291 SAVE_ALL 1292 1293 /* 1294 * First deactivate NMI 1295 * or we cannot drop ET, cannot get window spill traps. 1296 * The busy loop is necessary because the PIO error 1297 * sometimes does not go away quickly and we trap again. 1298 */ 1299 sethi %hi(pcic_regs), %o1 1300 ld [%o1 + %lo(pcic_regs)], %o2 1301 1302 ! Get pending status for printouts later. 1303 ld [%o2 + PCI_SYS_INT_PENDING], %o0 1304 1305 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1 1306 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR] 13071: 1308 ld [%o2 + PCI_SYS_INT_PENDING], %o1 1309 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0 1310 bne 1b 1311 nop 1312 1313 or %l0, PSR_PIL, %l4 1314 wr %l4, 0x0, %psr 1315 WRITE_PAUSE 1316 wr %l4, PSR_ET, %psr 1317 WRITE_PAUSE 1318 1319 call pcic_nmi 1320 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs 1321 RESTORE_ALL 1322 1323 .globl pcic_nmi_trap_patch 1324pcic_nmi_trap_patch: 1325 sethi %hi(linux_trap_ipi15_pcic), %l3 1326 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0 1327 rd %psr, %l0 1328 .word 0 1329 1330#endif /* CONFIG_PCIC_PCI */ 1331 1332 .globl flushw_all 1333flushw_all: 1334 save %sp, -0x40, %sp 1335 save %sp, -0x40, %sp 1336 save %sp, -0x40, %sp 1337 save %sp, -0x40, %sp 1338 save %sp, -0x40, %sp 1339 save %sp, -0x40, %sp 1340 save %sp, -0x40, %sp 1341 restore 1342 restore 1343 restore 1344 restore 1345 restore 1346 restore 1347 ret 1348 restore 1349 1350#ifdef CONFIG_SMP 1351ENTRY(hard_smp_processor_id) 1352661: rd %tbr, %g1 1353 srl %g1, 12, %o0 1354 and %o0, 3, %o0 1355 .section .cpuid_patch, "ax" 1356 /* Instruction location. */ 1357 .word 661b 1358 /* SUN4D implementation. */ 1359 lda [%g0] ASI_M_VIKING_TMP1, %o0 1360 nop 1361 nop 1362 /* LEON implementation. */ 1363 rd %asr17, %o0 1364 srl %o0, 0x1c, %o0 1365 nop 1366 .previous 1367 retl 1368 nop 1369ENDPROC(hard_smp_processor_id) 1370#endif 1371 1372/* End of entry.S */ 1373