xref: /openbmc/linux/arch/sparc/include/uapi/asm/pstate.h (revision d9fd5a71)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _SPARC64_PSTATE_H
3 #define _SPARC64_PSTATE_H
4 
5 #include <linux/const.h>
6 
7 /* The V9 PSTATE Register (with SpitFire extensions).
8  *
9  * -----------------------------------------------------------------------
10  * | Resv | IG | MG | CLE | TLE |  MM  | RED | PEF | AM | PRIV | IE | AG |
11  * -----------------------------------------------------------------------
12  *  63  12  11   10    9     8    7   6   5     4     3     2     1    0
13  */
14 /* IG on V9 conflicts with MCDE on M7. PSTATE_MCDE will only be used on
15  * processors that support ADI which do not use IG, hence there is no
16  * functional conflict
17  */
18 #define PSTATE_IG   _AC(0x0000000000000800,UL) /* Interrupt Globals.	*/
19 #define PSTATE_MCDE _AC(0x0000000000000800,UL) /* MCD Enable		*/
20 #define PSTATE_MG   _AC(0x0000000000000400,UL) /* MMU Globals.		*/
21 #define PSTATE_CLE  _AC(0x0000000000000200,UL) /* Current Little Endian.*/
22 #define PSTATE_TLE  _AC(0x0000000000000100,UL) /* Trap Little Endian.	*/
23 #define PSTATE_MM   _AC(0x00000000000000c0,UL) /* Memory Model.		*/
24 #define PSTATE_TSO  _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder	*/
25 #define PSTATE_PSO  _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder	*/
26 #define PSTATE_RMO  _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
27 #define PSTATE_RED  _AC(0x0000000000000020,UL) /* Reset Error Debug.	*/
28 #define PSTATE_PEF  _AC(0x0000000000000010,UL) /* Floating Point Enable.*/
29 #define PSTATE_AM   _AC(0x0000000000000008,UL) /* Address Mask.		*/
30 #define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege.		*/
31 #define PSTATE_IE   _AC(0x0000000000000002,UL) /* Interrupt Enable.	*/
32 #define PSTATE_AG   _AC(0x0000000000000001,UL) /* Alternate Globals.	*/
33 
34 /* The V9 TSTATE Register (with SpitFire and Linux extensions).
35  *
36  * ---------------------------------------------------------------------
37  * |  Resv |  GL  |  CCR  |  ASI  |  %pil  |  PSTATE  |  Resv  |  CWP  |
38  * ---------------------------------------------------------------------
39  *  63   43 42  40 39   32 31   24 23    20 19       8 7      5 4     0
40  */
41 #define TSTATE_GL	_AC(0x0000070000000000,UL) /* Global reg level  */
42 #define TSTATE_CCR	_AC(0x000000ff00000000,UL) /* Condition Codes.	*/
43 #define TSTATE_XCC	_AC(0x000000f000000000,UL) /* Condition Codes.	*/
44 #define TSTATE_XNEG	_AC(0x0000008000000000,UL) /* %xcc Negative.	*/
45 #define TSTATE_XZERO	_AC(0x0000004000000000,UL) /* %xcc Zero.	*/
46 #define TSTATE_XOVFL	_AC(0x0000002000000000,UL) /* %xcc Overflow.	*/
47 #define TSTATE_XCARRY	_AC(0x0000001000000000,UL) /* %xcc Carry.	*/
48 #define TSTATE_ICC	_AC(0x0000000f00000000,UL) /* Condition Codes.	*/
49 #define TSTATE_INEG	_AC(0x0000000800000000,UL) /* %icc Negative.	*/
50 #define TSTATE_IZERO	_AC(0x0000000400000000,UL) /* %icc Zero.	*/
51 #define TSTATE_IOVFL	_AC(0x0000000200000000,UL) /* %icc Overflow.	*/
52 #define TSTATE_ICARRY	_AC(0x0000000100000000,UL) /* %icc Carry.	*/
53 #define TSTATE_ASI	_AC(0x00000000ff000000,UL) /* AddrSpace ID.	*/
54 #define TSTATE_PIL	_AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/
55 #define TSTATE_PSTATE	_AC(0x00000000000fff00,UL) /* PSTATE.		*/
56 /* IG on V9 conflicts with MCDE on M7. TSTATE_MCDE will only be used on
57  * processors that support ADI which do not support IG, hence there is
58  * no functional conflict
59  */
60 #define TSTATE_IG	_AC(0x0000000000080000,UL) /* Interrupt Globals.*/
61 #define TSTATE_MCDE	_AC(0x0000000000080000,UL) /* MCD enable.       */
62 #define TSTATE_MG	_AC(0x0000000000040000,UL) /* MMU Globals.	*/
63 #define TSTATE_CLE	_AC(0x0000000000020000,UL) /* CurrLittleEndian.	*/
64 #define TSTATE_TLE	_AC(0x0000000000010000,UL) /* TrapLittleEndian.	*/
65 #define TSTATE_MM	_AC(0x000000000000c000,UL) /* Memory Model.	*/
66 #define TSTATE_TSO	_AC(0x0000000000000000,UL) /* MM: TSO		*/
67 #define TSTATE_PSO	_AC(0x0000000000004000,UL) /* MM: PSO		*/
68 #define TSTATE_RMO	_AC(0x0000000000008000,UL) /* MM: RMO		*/
69 #define TSTATE_RED	_AC(0x0000000000002000,UL) /* Reset Error Debug.*/
70 #define TSTATE_PEF	_AC(0x0000000000001000,UL) /* FPU Enable.	*/
71 #define TSTATE_AM	_AC(0x0000000000000800,UL) /* Address Mask.	*/
72 #define TSTATE_PRIV	_AC(0x0000000000000400,UL) /* Privilege.	*/
73 #define TSTATE_IE	_AC(0x0000000000000200,UL) /* Interrupt Enable.	*/
74 #define TSTATE_AG	_AC(0x0000000000000100,UL) /* Alternate Globals.*/
75 #define TSTATE_SYSCALL	_AC(0x0000000000000020,UL) /* in syscall trap   */
76 #define TSTATE_CWP	_AC(0x000000000000001f,UL) /* Curr Win-Pointer.	*/
77 
78 /* Floating-Point Registers State Register.
79  *
80  * --------------------------------
81  * |  Resv  |  FEF  |  DU  |  DL  |
82  * --------------------------------
83  *  63     3    2       1      0
84  */
85 #define FPRS_FEF	_AC(0x0000000000000004,UL) /* FPU Enable.	*/
86 #define FPRS_DU		_AC(0x0000000000000002,UL) /* Dirty Upper.	*/
87 #define FPRS_DL		_AC(0x0000000000000001,UL) /* Dirty Lower.	*/
88 
89 /* Version Register.
90  *
91  * ------------------------------------------------------
92  * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN |
93  * ------------------------------------------------------
94  *  63   48 47  32 31  24 23  16 15    8 7    5 4      0
95  */
96 #define VERS_MANUF	_AC(0xffff000000000000,UL) /* Manufacturer.	*/
97 #define VERS_IMPL	_AC(0x0000ffff00000000,UL) /* Implementation.	*/
98 #define VERS_MASK	_AC(0x00000000ff000000,UL) /* Mask Set Revision.*/
99 #define VERS_MAXTL	_AC(0x000000000000ff00,UL) /* Max Trap Level.	*/
100 #define VERS_MAXWIN	_AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/
101 
102 /* Compatibility Feature Register (%asr26), SPARC-T4 and later  */
103 #define CFR_AES		_AC(0x0000000000000001,UL) /* Supports AES opcodes     */
104 #define CFR_DES		_AC(0x0000000000000002,UL) /* Supports DES opcodes     */
105 #define CFR_KASUMI	_AC(0x0000000000000004,UL) /* Supports KASUMI opcodes  */
106 #define CFR_CAMELLIA	_AC(0x0000000000000008,UL) /* Supports CAMELLIA opcodes*/
107 #define CFR_MD5		_AC(0x0000000000000010,UL) /* Supports MD5 opcodes     */
108 #define CFR_SHA1	_AC(0x0000000000000020,UL) /* Supports SHA1 opcodes    */
109 #define CFR_SHA256	_AC(0x0000000000000040,UL) /* Supports SHA256 opcodes  */
110 #define CFR_SHA512	_AC(0x0000000000000080,UL) /* Supports SHA512 opcodes  */
111 #define CFR_MPMUL	_AC(0x0000000000000100,UL) /* Supports MPMUL opcodes   */
112 #define CFR_MONTMUL	_AC(0x0000000000000200,UL) /* Supports MONTMUL opcodes */
113 #define CFR_MONTSQR	_AC(0x0000000000000400,UL) /* Supports MONTSQR opcodes */
114 #define CFR_CRC32C	_AC(0x0000000000000800,UL) /* Supports CRC32C opcodes  */
115 
116 #endif /* !(_SPARC64_PSTATE_H) */
117