xref: /openbmc/linux/arch/sparc/include/asm/psr.h (revision 9cfc5c90)
1 /*
2  * psr.h: This file holds the macros for masking off various parts of
3  *        the processor status register on the Sparc. This is valid
4  *        for Version 8. On the V9 this is renamed to the PSTATE
5  *        register and its members are accessed as fields like
6  *        PSTATE.PRIV for the current CPU privilege level.
7  *
8  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
9  */
10 #ifndef __LINUX_SPARC_PSR_H
11 #define __LINUX_SPARC_PSR_H
12 
13 #include <uapi/asm/psr.h>
14 
15 
16 #ifndef __ASSEMBLY__
17 /* Get the %psr register. */
18 static inline unsigned int get_psr(void)
19 {
20 	unsigned int psr;
21 	__asm__ __volatile__(
22 		"rd	%%psr, %0\n\t"
23 		"nop\n\t"
24 		"nop\n\t"
25 		"nop\n\t"
26 	: "=r" (psr)
27 	: /* no inputs */
28 	: "memory");
29 
30 	return psr;
31 }
32 
33 static inline void put_psr(unsigned int new_psr)
34 {
35 	__asm__ __volatile__(
36 		"wr	%0, 0x0, %%psr\n\t"
37 		"nop\n\t"
38 		"nop\n\t"
39 		"nop\n\t"
40 	: /* no outputs */
41 	: "r" (new_psr)
42 	: "memory", "cc");
43 }
44 
45 /* Get the %fsr register.  Be careful, make sure the floating point
46  * enable bit is set in the %psr when you execute this or you will
47  * incur a trap.
48  */
49 
50 extern unsigned int fsr_storage;
51 
52 static inline unsigned int get_fsr(void)
53 {
54 	unsigned int fsr = 0;
55 
56 	__asm__ __volatile__(
57 		"st	%%fsr, %1\n\t"
58 		"ld	%1, %0\n\t"
59 	: "=r" (fsr)
60 	: "m" (fsr_storage));
61 
62 	return fsr;
63 }
64 
65 #endif /* !(__ASSEMBLY__) */
66 
67 #endif /* !(__LINUX_SPARC_PSR_H) */
68