1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a439fe51SSam Ravnborg /* 3a439fe51SSam Ravnborg * psr.h: This file holds the macros for masking off various parts of 4a439fe51SSam Ravnborg * the processor status register on the Sparc. This is valid 5a439fe51SSam Ravnborg * for Version 8. On the V9 this is renamed to the PSTATE 6a439fe51SSam Ravnborg * register and its members are accessed as fields like 7a439fe51SSam Ravnborg * PSTATE.PRIV for the current CPU privilege level. 8a439fe51SSam Ravnborg * 9a439fe51SSam Ravnborg * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 10a439fe51SSam Ravnborg */ 11a439fe51SSam Ravnborg #ifndef __LINUX_SPARC_PSR_H 12a439fe51SSam Ravnborg #define __LINUX_SPARC_PSR_H 13a439fe51SSam Ravnborg 1454579826SDavid Howells #include <uapi/asm/psr.h> 15a439fe51SSam Ravnborg 16a439fe51SSam Ravnborg 17a439fe51SSam Ravnborg #ifndef __ASSEMBLY__ 18a439fe51SSam Ravnborg /* Get the %psr register. */ get_psr(void)19a439fe51SSam Ravnborgstatic inline unsigned int get_psr(void) 20a439fe51SSam Ravnborg { 21a439fe51SSam Ravnborg unsigned int psr; 22a439fe51SSam Ravnborg __asm__ __volatile__( 23a439fe51SSam Ravnborg "rd %%psr, %0\n\t" 24a439fe51SSam Ravnborg "nop\n\t" 25a439fe51SSam Ravnborg "nop\n\t" 26a439fe51SSam Ravnborg "nop\n\t" 27a439fe51SSam Ravnborg : "=r" (psr) 28a439fe51SSam Ravnborg : /* no inputs */ 29a439fe51SSam Ravnborg : "memory"); 30a439fe51SSam Ravnborg 31a439fe51SSam Ravnborg return psr; 32a439fe51SSam Ravnborg } 33a439fe51SSam Ravnborg put_psr(unsigned int new_psr)34a439fe51SSam Ravnborgstatic inline void put_psr(unsigned int new_psr) 35a439fe51SSam Ravnborg { 36a439fe51SSam Ravnborg __asm__ __volatile__( 37a439fe51SSam Ravnborg "wr %0, 0x0, %%psr\n\t" 38a439fe51SSam Ravnborg "nop\n\t" 39a439fe51SSam Ravnborg "nop\n\t" 40a439fe51SSam Ravnborg "nop\n\t" 41a439fe51SSam Ravnborg : /* no outputs */ 42a439fe51SSam Ravnborg : "r" (new_psr) 43a439fe51SSam Ravnborg : "memory", "cc"); 44a439fe51SSam Ravnborg } 45a439fe51SSam Ravnborg 46a439fe51SSam Ravnborg /* Get the %fsr register. Be careful, make sure the floating point 47a439fe51SSam Ravnborg * enable bit is set in the %psr when you execute this or you will 48a439fe51SSam Ravnborg * incur a trap. 49a439fe51SSam Ravnborg */ 50a439fe51SSam Ravnborg 51a439fe51SSam Ravnborg extern unsigned int fsr_storage; 52a439fe51SSam Ravnborg get_fsr(void)53a439fe51SSam Ravnborgstatic inline unsigned int get_fsr(void) 54a439fe51SSam Ravnborg { 55a439fe51SSam Ravnborg unsigned int fsr = 0; 56a439fe51SSam Ravnborg 57a439fe51SSam Ravnborg __asm__ __volatile__( 58a439fe51SSam Ravnborg "st %%fsr, %1\n\t" 59a439fe51SSam Ravnborg "ld %1, %0\n\t" 60a439fe51SSam Ravnborg : "=r" (fsr) 61a439fe51SSam Ravnborg : "m" (fsr_storage)); 62a439fe51SSam Ravnborg 63a439fe51SSam Ravnborg return fsr; 64a439fe51SSam Ravnborg } 65a439fe51SSam Ravnborg 66a439fe51SSam Ravnborg #endif /* !(__ASSEMBLY__) */ 67a439fe51SSam Ravnborg 68a439fe51SSam Ravnborg #endif /* !(__LINUX_SPARC_PSR_H) */ 69