1 #ifndef __SPARC64_MMU_CONTEXT_H 2 #define __SPARC64_MMU_CONTEXT_H 3 4 /* Derived heavily from Linus's Alpha/AXP ASN code... */ 5 6 #ifndef __ASSEMBLY__ 7 8 #include <linux/spinlock.h> 9 #include <asm/spitfire.h> 10 #include <asm-generic/mm_hooks.h> 11 12 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 13 { 14 } 15 16 extern spinlock_t ctx_alloc_lock; 17 extern unsigned long tlb_context_cache; 18 extern unsigned long mmu_context_bmap[]; 19 20 extern void get_new_mmu_context(struct mm_struct *mm); 21 #ifdef CONFIG_SMP 22 extern void smp_new_mmu_context_version(void); 23 #else 24 #define smp_new_mmu_context_version() do { } while (0) 25 #endif 26 27 extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); 28 extern void destroy_context(struct mm_struct *mm); 29 30 extern void __tsb_context_switch(unsigned long pgd_pa, 31 struct tsb_config *tsb_base, 32 struct tsb_config *tsb_huge, 33 unsigned long tsb_descr_pa); 34 35 static inline void tsb_context_switch(struct mm_struct *mm) 36 { 37 __tsb_context_switch(__pa(mm->pgd), 38 &mm->context.tsb_block[0], 39 #ifdef CONFIG_HUGETLB_PAGE 40 (mm->context.tsb_block[1].tsb ? 41 &mm->context.tsb_block[1] : 42 NULL) 43 #else 44 NULL 45 #endif 46 , __pa(&mm->context.tsb_descr[0])); 47 } 48 49 extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss); 50 #ifdef CONFIG_SMP 51 extern void smp_tsb_sync(struct mm_struct *mm); 52 #else 53 #define smp_tsb_sync(__mm) do { } while (0) 54 #endif 55 56 /* Set MMU context in the actual hardware. */ 57 #define load_secondary_context(__mm) \ 58 __asm__ __volatile__( \ 59 "\n661: stxa %0, [%1] %2\n" \ 60 " .section .sun4v_1insn_patch, \"ax\"\n" \ 61 " .word 661b\n" \ 62 " stxa %0, [%1] %3\n" \ 63 " .previous\n" \ 64 " flush %%g6\n" \ 65 : /* No outputs */ \ 66 : "r" (CTX_HWBITS((__mm)->context)), \ 67 "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU)) 68 69 extern void __flush_tlb_mm(unsigned long, unsigned long); 70 71 /* Switch the current MM context. Interrupts are disabled. */ 72 static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) 73 { 74 unsigned long ctx_valid, flags; 75 int cpu; 76 77 if (unlikely(mm == &init_mm)) 78 return; 79 80 spin_lock_irqsave(&mm->context.lock, flags); 81 ctx_valid = CTX_VALID(mm->context); 82 if (!ctx_valid) 83 get_new_mmu_context(mm); 84 85 /* We have to be extremely careful here or else we will miss 86 * a TSB grow if we switch back and forth between a kernel 87 * thread and an address space which has it's TSB size increased 88 * on another processor. 89 * 90 * It is possible to play some games in order to optimize the 91 * switch, but the safest thing to do is to unconditionally 92 * perform the secondary context load and the TSB context switch. 93 * 94 * For reference the bad case is, for address space "A": 95 * 96 * CPU 0 CPU 1 97 * run address space A 98 * set cpu0's bits in cpu_vm_mask 99 * switch to kernel thread, borrow 100 * address space A via entry_lazy_tlb 101 * run address space A 102 * set cpu1's bit in cpu_vm_mask 103 * flush_tlb_pending() 104 * reset cpu_vm_mask to just cpu1 105 * TSB grow 106 * run address space A 107 * context was valid, so skip 108 * TSB context switch 109 * 110 * At that point cpu0 continues to use a stale TSB, the one from 111 * before the TSB grow performed on cpu1. cpu1 did not cross-call 112 * cpu0 to update it's TSB because at that point the cpu_vm_mask 113 * only had cpu1 set in it. 114 */ 115 load_secondary_context(mm); 116 tsb_context_switch(mm); 117 118 /* Any time a processor runs a context on an address space 119 * for the first time, we must flush that context out of the 120 * local TLB. 121 */ 122 cpu = smp_processor_id(); 123 if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) { 124 cpumask_set_cpu(cpu, mm_cpumask(mm)); 125 __flush_tlb_mm(CTX_HWBITS(mm->context), 126 SECONDARY_CONTEXT); 127 } 128 spin_unlock_irqrestore(&mm->context.lock, flags); 129 } 130 131 #define deactivate_mm(tsk,mm) do { } while (0) 132 133 /* Activate a new MM instance for the current task. */ 134 static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) 135 { 136 unsigned long flags; 137 int cpu; 138 139 spin_lock_irqsave(&mm->context.lock, flags); 140 if (!CTX_VALID(mm->context)) 141 get_new_mmu_context(mm); 142 cpu = smp_processor_id(); 143 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))) 144 cpumask_set_cpu(cpu, mm_cpumask(mm)); 145 146 load_secondary_context(mm); 147 __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); 148 tsb_context_switch(mm); 149 spin_unlock_irqrestore(&mm->context.lock, flags); 150 } 151 152 #endif /* !(__ASSEMBLY__) */ 153 154 #endif /* !(__SPARC64_MMU_CONTEXT_H) */ 155