1 #ifndef __SPARC64_MMU_CONTEXT_H 2 #define __SPARC64_MMU_CONTEXT_H 3 4 /* Derived heavily from Linus's Alpha/AXP ASN code... */ 5 6 #ifndef __ASSEMBLY__ 7 8 #include <linux/spinlock.h> 9 #include <linux/mm_types.h> 10 11 #include <asm/spitfire.h> 12 #include <asm-generic/mm_hooks.h> 13 14 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 15 { 16 } 17 18 extern spinlock_t ctx_alloc_lock; 19 extern unsigned long tlb_context_cache; 20 extern unsigned long mmu_context_bmap[]; 21 22 void get_new_mmu_context(struct mm_struct *mm); 23 #ifdef CONFIG_SMP 24 void smp_new_mmu_context_version(void); 25 #else 26 #define smp_new_mmu_context_version() do { } while (0) 27 #endif 28 29 int init_new_context(struct task_struct *tsk, struct mm_struct *mm); 30 void destroy_context(struct mm_struct *mm); 31 32 void __tsb_context_switch(unsigned long pgd_pa, 33 struct tsb_config *tsb_base, 34 struct tsb_config *tsb_huge, 35 unsigned long tsb_descr_pa); 36 37 static inline void tsb_context_switch(struct mm_struct *mm) 38 { 39 __tsb_context_switch(__pa(mm->pgd), 40 &mm->context.tsb_block[MM_TSB_BASE], 41 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 42 (mm->context.tsb_block[MM_TSB_HUGE].tsb ? 43 &mm->context.tsb_block[MM_TSB_HUGE] : 44 NULL) 45 #else 46 NULL 47 #endif 48 , __pa(&mm->context.tsb_descr[MM_TSB_BASE])); 49 } 50 51 void tsb_grow(struct mm_struct *mm, 52 unsigned long tsb_index, 53 unsigned long mm_rss); 54 #ifdef CONFIG_SMP 55 void smp_tsb_sync(struct mm_struct *mm); 56 #else 57 #define smp_tsb_sync(__mm) do { } while (0) 58 #endif 59 60 /* Set MMU context in the actual hardware. */ 61 #define load_secondary_context(__mm) \ 62 __asm__ __volatile__( \ 63 "\n661: stxa %0, [%1] %2\n" \ 64 " .section .sun4v_1insn_patch, \"ax\"\n" \ 65 " .word 661b\n" \ 66 " stxa %0, [%1] %3\n" \ 67 " .previous\n" \ 68 " flush %%g6\n" \ 69 : /* No outputs */ \ 70 : "r" (CTX_HWBITS((__mm)->context)), \ 71 "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU)) 72 73 void __flush_tlb_mm(unsigned long, unsigned long); 74 75 /* Switch the current MM context. */ 76 static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) 77 { 78 unsigned long ctx_valid, flags; 79 int cpu; 80 81 if (unlikely(mm == &init_mm)) 82 return; 83 84 spin_lock_irqsave(&mm->context.lock, flags); 85 ctx_valid = CTX_VALID(mm->context); 86 if (!ctx_valid) 87 get_new_mmu_context(mm); 88 89 /* We have to be extremely careful here or else we will miss 90 * a TSB grow if we switch back and forth between a kernel 91 * thread and an address space which has it's TSB size increased 92 * on another processor. 93 * 94 * It is possible to play some games in order to optimize the 95 * switch, but the safest thing to do is to unconditionally 96 * perform the secondary context load and the TSB context switch. 97 * 98 * For reference the bad case is, for address space "A": 99 * 100 * CPU 0 CPU 1 101 * run address space A 102 * set cpu0's bits in cpu_vm_mask 103 * switch to kernel thread, borrow 104 * address space A via entry_lazy_tlb 105 * run address space A 106 * set cpu1's bit in cpu_vm_mask 107 * flush_tlb_pending() 108 * reset cpu_vm_mask to just cpu1 109 * TSB grow 110 * run address space A 111 * context was valid, so skip 112 * TSB context switch 113 * 114 * At that point cpu0 continues to use a stale TSB, the one from 115 * before the TSB grow performed on cpu1. cpu1 did not cross-call 116 * cpu0 to update it's TSB because at that point the cpu_vm_mask 117 * only had cpu1 set in it. 118 */ 119 load_secondary_context(mm); 120 tsb_context_switch(mm); 121 122 /* Any time a processor runs a context on an address space 123 * for the first time, we must flush that context out of the 124 * local TLB. 125 */ 126 cpu = smp_processor_id(); 127 if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) { 128 cpumask_set_cpu(cpu, mm_cpumask(mm)); 129 __flush_tlb_mm(CTX_HWBITS(mm->context), 130 SECONDARY_CONTEXT); 131 } 132 spin_unlock_irqrestore(&mm->context.lock, flags); 133 } 134 135 #define deactivate_mm(tsk,mm) do { } while (0) 136 137 /* Activate a new MM instance for the current task. */ 138 static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) 139 { 140 unsigned long flags; 141 int cpu; 142 143 spin_lock_irqsave(&mm->context.lock, flags); 144 if (!CTX_VALID(mm->context)) 145 get_new_mmu_context(mm); 146 cpu = smp_processor_id(); 147 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))) 148 cpumask_set_cpu(cpu, mm_cpumask(mm)); 149 150 load_secondary_context(mm); 151 __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); 152 tsb_context_switch(mm); 153 spin_unlock_irqrestore(&mm->context.lock, flags); 154 } 155 156 #endif /* !(__ASSEMBLY__) */ 157 158 #endif /* !(__SPARC64_MMU_CONTEXT_H) */ 159